40results about How to "Lower BER" patented technology

This invention generally relates to novel compositions and methods for the treatment of certain cancers. Additionally, this invention relates to novel compositions and methods to screen drugs for the treatment of certain cancers. Specifically, the invention contemplates that temozolomide and methoxyamine, in combination or in sequence, shall be used as a treatment for certain tumors that are resistant to treatment by temozolomide alone.

Tap coefficients for fractionally-spaced equalizers are updated iteratively using error statistics from an input bit stream and an output bit stream, such as from a forward error correction circuit. The process continues until the errors converge to a sufficiently small number. Knowledge of the error patterns are used apriori to adaptively change the tap coefficients in a feedforward filter.

A communications network which is capable of effectively and efficiently handling fading between mobile wireless user terminals of a packet-switched network with minimal overhead and packet loss, and a method for using the same. The communications network employs an origination mobile terminal and surrounding macroscopic mobile terminals and / or surrounding fixed infrastructure. Communication is established between the origination mobile terminal and surrounding macroscopic mobile terminals and / or surrounding fixed infrastructure. The communication is established via modified request to send (RTS) and clear to send (CTS) messages, wherein the modified messages provide for an additional two sets of k unicast addresses where k equals the maximum number of routes available per route entry in the origination mobile terminal's route table.

An optical receiver configuration and method of controlling an optical signal receiver adjusts a decision threshold to reduce the bit error rate (BER). The receiver includes a comparator having a data input and a digital data output. An error detection & correction circuit provides an error signal representative of the number of corrected “1”s and “0”s in the data output from the comparator. Based on the error signal, a control circuit modifies the comparator decision threshold in a direction to reduce the BER of the receiver. Dynamic modification of the decision threshold may also be accomplished. A total percentage error indicator is preferably used as the basis of changing the decision threshold value. The total percentage error indicator may be used to variably adjust the decision threshold by an amount that varies according to the magnitude of the total percentage error indicator to thereby more quickly arrive at an acceptable decision threshold and prevent overshoot. A searching method may also be used to determine the usable range of the comparator before tuning the decision threshold.

A premodulation precoding method precodes a data sequence in a Gaussian minimum shift keying (GMSK) modulator to improve the bit error rate performance of a coherent Viterbi receivers generating estimates of the communicated data sequence without the use of differential decoding while preserving the spectrum of 2-ary and 4-ary GMSK signals over a wide range of bandwidth time products.

The invention relates to an SCMA (sparse code multiple access) simple codebook design method under a Gauss channel and belongs to the communication system technical field. The method is mainly applied to conditions under Gaussian channels. The method includes the following steps that: the total constellation diagram of all users on each resource block is designed; a subset segmentation method in trellis coded modulation (TCM) is utilized to generate constellations corresponding to the users; a mapping matrix is constructed; the constellations of the users and the mapping matrix are combined tougher to construct a constellation matrix; and a codebook is generated according to the constellation matrix. With the method of the invention adopted, it can be ensured that the minimum Euclidean distance between constellation points between the users is maximized, and at the same time, it can be ensured that the minimum Euclidean distance between constellation points of the users is maximized; the bit error rate (BER) of a system can be low; and the performance of the system is also favorable under a high overload rate condition.

A device that includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory. The controller includes a non-transitory computer readable medium and a processor. The controller includes computer executable instructions stored in the computer readable medium to, using the processor, retrieve a flash memory page from the non-volatile memory, determine a memory parameter associated with the flash memory pages, determine a read threshold voltage scanning order based on the memory parameter, and perform read threshold voltage calibration according to the read threshold voltage scanning order.

A method significantly reduces the average power for radio communication in a communication system, such as a system that has applications requiring low communication latency. The method may use a low power radio communication circuit (e.g., a non-heterodyne receiver) to wait for a communication request, taking advantage of the low power consumption of the radio communication circuit. Subsequent to receiving and validating the communication request, the communication system may switch to a more efficient—but higher power—communication circuit. Thus, effective communication is achieved without making undesirable tradeoffs, such as reduced sensitivity.

A precoding method, a precoding apparatus, a Frequency Domain Equalization (FDE) method, and an FDE apparatus are provided in the embodiments of the present invention. The precoding method includes: performing offset modulation for a transmitting signal vector; calculating a precoding matrix according to the offset-modulated transmitting signal vector and a receiver decision signal vector, where the precoding matrix is used for performing precoding for the transmitting signal vector; and performing precoding for the transmitting signal vector according to the precoding matrix. Linear precoding is performed by using the offset-modulated signal on the transmitter, and therefore, the interference caused by multiple antennas and multipath propagation is reduced, the system BER is reduced, and the complexity of implementation is low.

An optical receiver configuration and method of controlling an optical signal receiver adjusts a decision threshold to reduce the bit error rate (BER). The receiver includes a comparator having a data input and a digital data output. An error detection & correction circuit provides an error signal representative of the number of corrected “1”s and “0”s in the data output from the comparator. Based on the error signal, a control circuit modifies the comparator decision threshold in a direction to reduce the BER of the receiver. Dynamic modification of the decision threshold may also be accomplished. A relative percentage error indicator is preferably used as the basis of changing the decision threshold value. The relative percentage error indicator may be used to determine how much to adjust the decision threshold at each iteration of the method to more quickly arrive at an acceptable decision threshold and prevent overshoot. A searching method may also be used to determine the usable range of the comparator before tuning the decision threshold.

Disclosed is an OFDM (orthogonal frequency division multiplexing) wireless communication system operable on a frequency selective channel, and a channel compensation method. An IDFT (inverse discrete Fourier transform) unit of a transmitter includes first through third N-point IDFT units, and performs IDFT on a binary information signal twice. A DFT (discrete Fourier transform) unit of a receiver includes first through third N-point DFT units, a channel predictor and interpolator, and a channel compensator, and performs DFT on the signal received from the transmitter twice.

A spread-spectrum code division multiple access interference canceller for reducing interference in a direct sequence CDMA, employed at a base station receiver having N chip-code channels. The interference canceller includes a plurality of correlators or matched filters, a plurality of spread-spectrum-processing circuits, subtracting circuits, and channel correlators or channel-matched filters. Using a plurality of chip-code signals, the plurality of correlators despreads the spread-spectrum CDMA signal as a plurality of despread signals, respectively. The spread-spectrum-processing circuits use a timed version of the chip-code signals, for spread-spectrum processing the despread signals, respectively, with a chip-code-signal corresponding to a respective despread signal. For recovering a code channel using an ith chip-code-signal, the subtracting circuits subtracts from the spread-spectrum CDMA signal, the N−1 spread-spectrum-processed-despread signals generating a subtracted signal. The N−1 spread-spectrum-processed-despread signals exclude the spread-spectrum-processed-despread signal of the ith channel. The channel correlator or channel-matched filter despreads the subtracted signal.

A method significantly reduces the average power for radio communication in a communication system, such as a system that has applications requiring low communication latency. The method may use a low power radio communication circuit (e.g., a non-heterodyne receiver) to wait for a communication request, taking advantage of the low power consumption of the radio communication circuit. Subsequent to receiving and validating the communication request, the communication system may switch to a more efficient—but higher power—communication circuit. Thus, effective communication is achieved without making undesirable tradeoffs, such as reduced sensitivity.

A synchronization method in a Ultra Wideband (UWB) receiver includes receiving a signal through a multipath channel, and synchronizing with a first multipath component of the received signal by computing a correlation value between the received signal and a template signal of the receiver in a predetermined search range. Since multipath components received at the receiver after the first multipath component of the received signal have lower power than that of the first multipath component, the synchronization with the first multipath component of the received signal may improve the performance in processes after the synchronization process.

A method and a system for performing pre-emphasis of one or more optical channels respectively carrying one or more optical signals, by effecting bit rate of the one or more of the signals, thereby adjusting BER value thereof.

The invention relates to an antenna selection-based multi-antenna network coding relay transmission method, which belongs to the technical field of wireless communication. The method comprises that: two users in a wireless communication network transmit information sequences to a base station and a relay in an orthogonal channel, and the base station and the relay perform channel estimation according to the information sequences to obtain a channel matrix, and decode the information sequences; the base station estimates the quality of each antenna data stream according to the channel matrix, generates a relay packet for network coding and transmits the relay packet to the relay, and the relay transmits a network coding data stream to the base station; and the base station performs joint decoding according to the information sequences and a relay forwarding sequence to finish relay transmission. The method provided by the invention improves the transmission efficiency of a system so asto increase a frequency spectrum utilization rate by utilizing multi-antenna transmission and network coding, and reduces a bit error rate and improves the reliability of the system by utilizing the transmission quality of the antenna data streams and the characteristics of network coding-based cooperative relay.

The invention provides a clock and data recovery (CDR) circuit, including: a phase locked loop (PLL) circuit, providing a reference voltage; a first delay device, delaying an input data according to a control signal so as to generate a first delay signal; an edge detector, generating an edge signal according to the first delay signal and the input data; a second delay device, delaying the edge signal so as to generate a second delay signal; a first gated voltage-controlled oscillator, generating an output recovery clock according to the second delay signal and the reference voltage; a phase detector, detecting a phase difference between the first delay signal and the output recovery clock so as to generate a phase signal and a output recovery data; and an amplifier, amplifying the phase signal by a factor so as to generate the control signal.

The invention provides a detecting algorithm based on planisphere reduction in a high order modulation MIMO system. The problem that a detecting algorithm in the high order modulation MIMO system is high in complexity is solved. According to the detecting algorithm, a planisphere is reduced, tree expansion is performed according to the reduced planisphere, and the planisphere reduction scheme can be selected in a self-adaptive mode according to the state of a channel. The advantages of the detecting algorithm in an actual value model are fully used. The simulation results show that the self-adaptive detecting algorithm based on planisphere reduction is low in BER, greatly reduces the complexity of the detecting algorithm and has the advantages in the aspects of the BER and complexity. Compromise between the BER and the complexity of the algorithm can be achieved by adjusting parameters, and the detecting algorithm is suitable for the high order modulation MIMO system.

The invention belongs to the technical field of communication anti-jamming, and particularly relates to a spatial modulation (SM) technology, an antenna selection technology and a multiple input and multiple output (MIMO) modulation technology. An antenna selection method is mainly characterized in that a receiving end obtains an optimal transmitting antenna set and an optimal receiving antenna set according to an estimated channel matrix H. According to the estimated channel matrix in a receiver, receiving antennas are used for receiving in sequence. When each receiving antenna is selected and activated respectively, the sum of transmitting antennas with the maximum module values is taken as the transmitting antenna set according to the transmitting antennas with the maximum module values in required number. After selection of the transmitting antennas, the transmitting antennas are required to be positioned on each receiving antenna, and a certain number of receiving antennas with the maximum module values is put into the receiving antenna set according to the module value sum of a channel coefficient. The antenna selection method is based on the thought of system capacity maximization at the cost of little increase in complexity, the BER (Bit Error Rate) of a system is effectively lowered, and the communication reliability of the system is enhanced.

A system and method are provided for using disparity measurements to control the adjustment of a data slicer threshold. The method receives a serial stream of pseudorandom digital data signals having an average DC value, and compares data signal amplitudes to a slicer threshold value. In response to the slicer threshold value comparison, data signal “1” and “0” values are determined. A first sum of determined “1” values is created, and a second sum of determined “0” values is created. The slicer threshold value is adjusted in response to the comparison of the first and second sums. More explicitly, the slicer threshold value is adjusted to make “1” values more likely in response to the second sum being larger than the first sum. Alternately, the slicer threshold value is adjusted to make “0 ” values more likely in response to the second sum being smaller than the first sum.

A hard disk drive or other disk-based storage device comprises a storage disk, a read / write head configured to read data from and write data to the storage disk, and control circuitry coupled to the read / write head and configured to process data received from and supplied to the read / write head and to control positioning of the read / write head relative to the storage disk. The control circuitry is further configured to adjust at least one parameter of a write signal for a target bit to be written to the storage disk based on respective magnetization polarities of one or more adjacent bits previously written to the storage disk.

The invention discloses an ECC (error correction code) decoding controlling method used for data communication. In view of the unpredictability of the signal quality at the data receiving end, at least two check matrices with different correcting capabilities are reconstructed to adapt to the different signal quality encoded data. Accordingly, when the data receiving end receives encode data, in accordance with the signal quality of the encoded data, a check matrix with appropriate correcting ability is selected to decode. So with regard to the relatively high signal quality encoded data, only the using of the check matrix with low correcting ability is capable of ensuring that the error rate is low enough, and the power dissipation and time delay of decoding at the data receiving end are saved. Consequently, not only can enough low BER(bit error rate) at the data receiving end be ensured, but also the power dissipation and time delay of decoding at the data receiving end is taken into consideration as long as the signal quality at the data receiving end has a certain randomness.

The present invention relates to a clock-embedded or source synchronous semiconductor transmitting and receiving apparatus and to a semiconductor system including same. The semiconductor apparatus according to one embodiment of the present invention includes: a data providing unit for providing differential data; a multi-phase clock generator for generating a first clock signal provided to the data providing unit, and a second clock signal having a different phase from the first clock signal; and a combining unit for receiving the differential data and the second clock signal and combining same to generate a combined signal, wherein the second clock signal is a single clock signal and has n (here, n is an integer of two or greater) times a symbol period of the differential data, the first and second clock signals have a 90 degree phase difference, and the combination signal is transmitted to the outside through differential transmission lines.

A method for processing a plurality of received copies of the same original data, the method comprising performing maximum ratio combining on equivalent data portions of the received copies to derive at least one further equivalent data portion. The received and the constructed copies are then divided into sub-portions and combinations of divided sub-portions are assembled to provide reconstructed data portions. An error rate assessment is performed on the reconstructed data portions; and on this basis one is selected as an output.

Disclosed is an OFDM (orthogonal frequency division multiplexing) wireless communication system operable on a frequency selective channel, and a channel compensation method. An IDFT (inverse discrete Fourier transform) unit of a transmitter includes first through third N-point IDFT units, and performs IDFT on a binary information signal twice. A DFT (discrete Fourier transform) unit of a receiver includes first through third N-point DFT units, a channel predictor and interpolator, and a channel compensator, and performs DFT on the signal received from the transmitter twice.

The embodiment of the invention discloses a data block processing method and apparatus and a computer-readable storage medium. The data block processing method includes: judging whether each data block has data writing in a preset time or not; When there is a target data block in which no data is written within a preset time, invalid data can be filled in the target data block, and a flag for stopping the writing of data is set for the target data block, and no new data is written in the target data block at this time, thereby reducing the influence of the new data writing on the target data block. And the invalid data is filled in the target data block, which improves the reliability of the actual data in the target data block. Especially in the read-intensive application scenario, it effectively reduces the BER when reading data blocks, so as to ensure that the read BER of data blocks is maintained at a low level, ensure the whole disk error rate and QOS, and effectively improve thecompetitiveness of SSD products.

A system and method are provided for using disparity measurements to control the adjustment of a data slicer threshold. The method receives a serial stream of pseudorandom digital data signals having an average DC value, and compares data signal amplitudes to a slicer threshold value. In response to the slicer threshold value comparison, data signal “1” and “0” values are determined. A first sum of determined “1” values is created, and a second sum of determined “0” values is created. The slicer threshold value is adjusted in response to the comparison of the first and second sums. More explicitly, the slicer threshold value is adjusted to make “1” values more likely in response to the second sum being larger than the first sum. Alternately, the slicer threshold value is adjusted to make “0” values more likely in response to the second sum being smaller than the first sum.

The invention relates to the field of satellite communications, and solves the technical problem of poor reliability and high complexity of the coding process. A channel coding method for error control comprises a PLG code with a polarization code as the outer code and an LDGM code as the inner code, and the polarization code and the LDGM code are in serial concatenation. A channel coding method for error control provided by the invention has low implementation complexity and closes against the Shannon limit performance with no error floors; the polarization code with high code rate is used asthe outer code and the LDGM code is used as the inner code by a cascade method to reach extremely low BER and prevent the possibility of error floors; and both polarization code and LDGM code are decoded by a BP algorithm, and the PLG code is effectively constructed by using a Gaussian approximation method (GA), which greatly simplifies the analysis for the performance of BER.