A lateral short-channel DMOS according to the present invention is a lateral short-channel DMOS in which an N−-type
semiconductor region is formed, with the surface of the N−-type
semiconductor region becoming almost completely depleted during
reverse bias. The lateral short-channel DMOS 10A according to the present invention includes an N−-type epitaxial layer 110 that is formed in one surface of a P−-type
semiconductor substrate 108, a P-type well 114 that is formed in the surface of the N−-type epitaxial layer 110 and includes a channel forming region C, an N+-type source region 116 that is formed in a surface of the P-type well 114, an N+-type drain region 118 formed in a surface of the N−-type epitaxial layer 110, and a gate
electrode 122 formed via a gate insulating film 120 in at least an upper part of the channel forming region C out of a region from the N+-type source region 116 to the N+-type drain region 118. The lateral short-channel DMOS 10A according to the present invention also includes an N+-type well 140 that is formed in a surface of the N-type epitaxial layer 110 and includes a higher concentration of N-type
dopant than the N−-type epitaxial layer 110 and a lower concentration of N-type
dopant than the N+-type drain region 118, with the N+-type drain region 118 being formed in a surface of this N+-type well 140. As described above, according to the present invention,
ON resistance is reduced while maintaining high breakdown characteristics, so that it is possible to provide a lateral short-channel DMOS with high breakdown characteristics and superior current driving characteristics.