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Method and apparatus for functional language temporal extensions, dynamic modeling, and verification in a system-level simulation environment

A method and apparatus for functional simulation of a system 104 in a system-level simulation and verification environment using a functional language 100 derived from a selected Scheme Language standard, and a simulator 105 for simulating verification functions 101 and model functions 102 expressed in the functional language 100. The functional language 100 has syntax extensions expressed as dynamic “always @” and “@” blocks, and all other event expressions which are similar to Verilog and other RTL (Register-Transfer Level) HDL (Hardware Description Language) temporal syntax constructs. A composer 103 is further used to connect verification functions 101 with model functions 102. Model functions 102, represented as mutable state functional objects along with selected test, monitor, checker and user-defined functions, sample reactive responses and ensure concurrent drive of abstracted signals for the simulator 105. The simulator 105 can function as a formal verifier to formally verify the model functions 102, or a synthesizer to transform programs written in a restricted subset of the functional language 100 into an internal control and data flow format or any synthesis-ready language. A system-level modeling and simulation environment enhanced with a graphical user interface facilitates the usage of the functional language 100.
Owner:SIMANTIX SYST

Estimating method and apparatus and estimating program of wire harness and recording medium thereof

In order to analyze, by a finite element method, the wiring property of a wire harness having a base end constrained and a distal end having a connector constrained to a connector base, a screen of a display unit displays a virtual three-dimensional shape image of the wire harness including the connector, using CAD data formed for designing the three-dimensional wiring shape and a condition setting screen for setting one part of analysis conditions, which is not included in the CAD data, of the property, the shape, a constraining position, and a constraining direction of the wire harness by input operation. The position on the moving destination of the connector, designated on the virtual three-dimensional shape image, is recognized as a coordinate value of the constraining position. The wiring shape of the wire harness and the reactive force upon grasping the connector by the FEM are analyzed under the analysis condition included in the CAD data, the analysis condition set on the condition setting screen, and the analysis condition necessary for estimating the constraining position prescribed by the coordinate value. The analysis of the virtual three-dimensional shape image of the analyzed wiring shape including the connector and of the reactive force is displayed on the screen.
Owner:TOYOTA MOTOR EAST JAPAN
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