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VLSI layouts of fully connected generalized and pyramid networks with locality exploitation

VLSI layouts of generalized multi-stage and pyramid networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links with spacial locality exploitation. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. Furthermore the shuffle exchange links are employed between different sub-integrated circuit blocks so that spacially nearer sub-integrated circuit blocks are connected with shorter links compared to the shuffle exchange links between spacially farther sub-integrated circuit blocks. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation.The VLSI layouts with spacial locality exploitation presented are applicable to generalized multi-stage and pyramid networks, generalized folded multi-stage and pyramid networks, generalized butterfly fat tree and pyramid networks, generalized multi-link multi-stage and pyramid networks, generalized folded multi-link multi-stage and pyramid networks, generalized multi-link butterfly fat tree and pyramid networks, generalized hypercube networks, and generalized cube connected cycles networks for speedup of s≧1. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.
Owner:KONDA TECH

VLSI layouts of fully connected generalized networks

In accordance with the invention, VLSI layouts of generalized multi-stage networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation.The VLSI layouts presented are applicable to generalized multi-stage networks V(N1, N2, d, s), generalized folded multi-stage networks Vfold(N1, N2, d, s), generalized butterfly fat tree networks Vbft(N1, N2, d, s), generalized multi-link multi-stage networks Vmlink(N1, N2, d, s), generalized folded multi-link multi-stage networks Vfold-mlink(N1, N2, d, s), generalized multi-link butterfly fat tree networks Vmlink-bft(N1, N2, d, s), and generalized hypercube networks Vhcube(N1, N2, d, s) for s=1, 2, 3 or any number in general. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.
Owner:KONDA VENKAT

VLSI layouts of fully connected generalized networks

In accordance with the invention, VLSI layouts of generalized multi-stage networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation.The VLSI layouts presented are applicable to generalized multi-stage networks V(N1, N2, d, s), generalized folded multi-stage networks Vfold(N1, N2, d, s), generalized butterfly fat tree networks Vbft(N1, N2, d, s), generalized multi-link multi-stage networks Vmlink(N1, N2, d, s), generalized folded multi-link multi-stage networks Vfold-mlink(N1, N2, d, s), generalized multi-link butterfly fat tree networks Vmlink-bft(N1, N2, d, s), and generalized hypercube networks Vhcube(N1, N2, d, s) for s=1, 2, 3 or any number in general. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.
Owner:KONDA VENKAT

VLSI layouts of fully connected generalized and pyramid networks with locality exploitation

VLSI layouts of generalized multi-stage and pyramid networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links with spacial locality exploitation. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. Furthermore the shuffle exchange links are employed between different sub-integrated circuit blocks so that spacially nearer sub-integrated circuit blocks are connected with shorter links compared to the shuffle exchange links between spacially farther sub-integrated circuit blocks. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane. The VLSI layouts exploit the benefits of significantly lower cross points, lower signal latency, lower power and full connectivity with significantly fast compilation. The VLSI layouts with spacial locality exploitation presented are applicable to generalized multi-stage and pyramid networks, generalized folded multi-stage and pyramid networks, generalized butterfly fat tree and pyramid networks, generalized multi-link multi-stage and pyramid networks, generalized folded multi-link multi-stage and pyramid networks, generalized multi-link butterfly fat tree and pyramid networks, generalized hypercube networks, and generalized cube connected cycles networks for speedup of s≧1. The embodiments of VLSI layouts are useful in wide target applications such as FPGAs, CPLDs, pSoCs, ASIC placement and route tools, networking applications, parallel & distributed computing, and reconfigurable computing.
Owner:KONDA TECH

Just-in-time-based parallel forward calculation programing method for steel-making production planned time

The invention discloses a just-in-time-based parallel forward calculation programing method for steel-making production planned time. The method comprises the following steps of: on the basis that a steel-making production process flow network bottom layer object model takes a working position, a working procedure and a transport line as basic elements and the normal distribution rules of the operation time and transportation time of various steel grades are considered, regarding the pouring start time of each heat of sequential casting constraint calculation as a delivery date; taking the operation start time of each heat in the aspect of working procedure based on working procedure backward calculation as the planned reference target time; after the start and end operation time of each heat are calculated by time parallel forward calculation, distributing an appropriate processing working position for each heat by a working position selection rule; and adjusting and determining the start and end operation time on a corresponding working position of each heat by a heat operation time adjusting strategy in reference to the reference target time. An executable operation planning and dispatching scheme for realizing sequential casting production can be programmed rapidly and the method has high generality and wide applicability to the optimization of steel-making production operation planning and dispatching.
Owner:KUNMING UNIV OF SCI & TECH

Step hydropower station group instruction scheduling optimization method based on data mining

The invention discloses a step hydropower station group instruction scheduling optimization method based on data mining. Cluster analysis of a typical daily load curve is realized on the basis that the power generating feature of a power station itself is fully utilized, and a step hydropower station group short-term optimization scheduling scheme according to scheduling habits can be obtained by use of a layered solving method. The technical scheme provided by the invention is as follows: first of all, on the basis that the power generating feature of a hydropower station is fully analyzed and utilized, typical load curve feature research is conducted, the cluster analysis is performed by use of a data mining technology so as to form a step hydropower station decision support database, then an instruction scheduling optimization model taking a routine object function in short-term optimization scheduling and complex constraint conditions into compressive consideration is constructed, an object function conversion mechanism based on different conditions and a complex contain processing method are given, and finally, through combination with a large-system decomposition coordination idea, a step hydropower station group daily generating plan is rapidly made by use of the layered solving method. According to the invention, a step combined scheduling scheme according with scheduling demands and habits can be rapidly obtained, and the method is a feasible method for realizing practicality of a hydropower station group short-term scheduling scheme under a complex condition.
Owner:DALIAN UNIV OF TECH

Ray digital imaging detection device based on cooperation of multiple manipulators and detection method thereof

The invention provides a ray digital imaging detection device based on cooperation of multiple manipulators and a detection method thereof. The ray digital imaging detection device is characterized in that an X-ray machine is mounted on an X-ray machine clamping manipulator; the X-ray machine clamping manipulator is mounted on an X-ray machine clamping manipulator guide rail; the X-ray machine clamping manipulator guide rail is mounted in a pit; in the detection process, the X-ray machine clamping manipulator clamps an X-ray machine to move, so that the X-ray machine can perform transillumination on different positions of a detected workpiece; a radiation detector is mounted on the radiation detector clamping manipulator; a radiation detector clamping manipulator is mounted on the radiation detector clamping manipulator guide rail; the radiation detector clamping manipulator moves along the radiation detector clamping manipulator guide rail; and in the detection process, the radiation detector clamping manipulator clamps the radiation detector to move, so that the radiation detector synchronously moves to the other side, opposite to the workpiece, of the X-ray machine along with the X-ray machine to perform ray imaging on the detected workpiece.
Owner:SHANGHAI SPACE PRECISION MACHINERY RES INST

A NC programming method for key components of marine diesel engines

The invention discloses a numerical control procedure programming method for key parts of a marine diesel engine in the fields of numerical control processing and digital manufacturing. The numericalcontrol procedure programming method comprises the following steps: firstly, defining manufacturing features of the key parts, constructing a manufacturing feature information model and creating a predefined feature library and a numerical control processing technology library; extracting processing operation information, correlating the processing operation information with the manufacturing features in the predefined feature library and then introducing an entity model and process data to form all procedure models; traversing the manufacturing features in the procedure models, identifying similar features from the predefined feature library, obtaining numerical control processing technology information corresponding to characteristics and reusing according to identified characteristics and a correlation mapping relationship between the characteristics and the processing operation information; and finally, adjusting tool path parameters by combining with the numerical control processing technology information and generating a final tool path and codes. According to the numerical control procedure programming method for the key parts of the marine diesel engine, disclosed by the invention, the manufacturing characteristics at the processing stage are identified and matched, the compilation of numerical control programs can be quickly completed and the quality and the efficiencyof numerical control programming are improved.
Owner:JIANGSU UNIV OF SCI & TECH
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