The application relates to the technical field of
computer architecture, and discloses a memory-computing integrated large
language model DRAM fault-tolerant method, which comprises the following steps: constructing a space-time related multi-
granularity DRAM fault model, defining a
memory bank level space constraint, and a single-bit or multi-bit flip fault mode, and establishing a
DRAM fault probability calculation method based on the Arrhenius formula; performing multi-precision and module level fault sensitivity quantitative analysis on the large
language model; based on the fault sensitivity
quantitative result, performing precision-aware bit-level differentiated
fault injection, and using a fine-tuning framework of a low-rank self-adaptive adapter based on module heterogeneity
perception to perform fault-tolerant enhancement on the target large
language model; the application has small parameter redundancy, does not add a hardware error correction circuit, and does not increase the hardware
critical path delay, thereby improving the tolerance and robustness of the large language model to single-bit and multi-bit flip faults under the
DRAM memory-computing integrated architecture.