78 results about "Control reconfiguration" patented technology

An apparatus and method provides automatic reconfiguration of an FPGA, such as in case of lost configuration or configuration error, and software-controlled reconfiguration may be provided that does not require the use of additional devices. An apparatus for FPGA configuration protection comprises watchdog signal generator circuitry in the FPGA configured to output a watchdog signal when the FPGA is properly configured and watchdog circuitry configured to receive the watchdog signal and to initiate reconfiguration of the FPGA if the watchdog signal is not received for or within a predetermined time. The circuitry in the FPGA may be configured to receive a signal from a processor and to output the watchdog signal when the signal from the processor is received.

There are provided measures for a cell reconfiguration, more specifically a cell reconfiguration in a relay-enhanced network environment. Such measures exemplarily include recognizing a decision on a change of a configuration of a base station, informing a user equipment served by the base station in view of a forthcoming change of the configuration before the configuration of the base station is changed, and providing the user equipment being served by the base station with a synchronization signal indicating a new configuration after the configuration of the base station is changed from an old configuration to the new configuration.

Methods to control reconfiguration of multiple radio access bearers in a mobile wireless device connected to a wireless network are described. The mobile wireless device is connected to the wireless network through a voice connection and a data connection simultaneously. The data connection is concurrently active with the voice connection. Transmission of one or more signaling messages for the data connection is delayed until the voice connection terminates. Representative signaling messages include messages that reconfigure a radio access bearer supporting the data connection and messages estimated to exceed a pre-determined transmission time interval.

The invention discloses a robust speech characteristic extraction method based on sparse decomposition and reconfiguration, relating to a robust speech characteristic extraction method with sparse decomposition and reconfiguration. The robust speech characteristic extraction method solves the problems that 1, the selection of an atomic dictionary has higher the time complexity and is difficult tomeet the sparsity after signal projection; 2, the sparse decomposition of signals has less consideration for time relativity of speech signals and noise signals; and 3, the signal reconfiguration ignores the prior probability of atoms and mutual transformation of all the atoms. The robust speech characteristic extraction method comprises the following detailed steps of: step 1, preprocessing; step 2, conducting discrete Fourier transform and solving a power spectrum; step 3, training and storing the atom dictionary; step 4, conducting sparse decomposition; step 5, reconfiguring the speech spectrum; step 6, adding a Mel triangular filter and taking the logarithm; and step 7, obtaining sparse splicing of Mel cepstrum coefficients and a Mel cepstrum to form the robust characteristic. The robust speech characteristic extraction method is used for the fields of multimedia information processing.

The invention discloses an FPGA (Field Programmable Gate Array)-based on-orbit reconfiguration system for a satellite on-board computer. The FPGA-based on-orbit reconfiguration system comprises an on-board FPGA chip, a control FPGA chip and an SPI (Serial Peripheral Interface) flash memory unit, wherein the on-board FPGA chip is internally integrated with CPU cores; the control FPGA chip is used for receiving configuration files, which are uploaded by a communication module of a satellite, for on-orbit reconfiguration, unloading the configuration files in the SPI flash memory unit, and controlling the on-orbit reconfiguration of the on-board FPGA chip; the SPI flash memory unit is used for storing the configuration files required for on-orbit reconfiguration; in the process of realizing on-orbit reconfiguration by means of running a JTAG (Joint Test Action Group) configuration mode, the control FPGA chip reads the configuration files required for the JTAG configuration mode from the SPI flash memory unit, and sends the configuration data to the on-board FPGA chip; in the process of realizing on-orbit reconfiguration by means of running an SPI configuration mode, the control FPGA chip informs the on-board FPGA chip of starting the SPI configuration mode, and the on-board FPGA chip reads the configuration files required for the SPI configuration mode from the SPI flash memory unit.

A logic circuit apparatus that allocates process capability to unit circuits operated in a time divisional manner, including a circuit arrangement information memory which stores circuit arrangement information corresponding to each of plurality of unit circuits, and a programmable logic circuit with a circuit arrangement which can be reconfigured by employing the circuit arrangement information while the programmable logic circuit is being operated, a process data memory which stores both input data and output data related to a process operation of each of the circuits, and a controller which monitors a storage amount of the input data and / or a storage amount of the output data corresponding to each unit circuit, and which controls reconfiguration of the circuit arrangement of the programmable logic circuit when the storage amount satisfies a certain condition.

Disclosed are a concurrent selftest engine and its applications to verify, initialize and scramble the system memory concurrently along with mainline operations. In prior art, memory reconfiguration and initialization can only be done by firmware with a full system shutdown and reboot. The disclosed hardware, working along with firmware, allows us to do comprehensive memory test operations on the extended customer memory area while the customer mainline memory accesses arc running in parallel. The hardware consists of concurrent selftest engines and priority logic. Great flexibility is achieved by the new design because customer-usable memory area can be dynamically allocated, verified and initialized. The system performance is improved by the fact that the selftest is hardware-driven whereas in prior art, the firmware drove the selftest. More comprehensive test patterns can be used to improve system memory RAS as well.

A secure reconfigurable operating mode system includes a hardware device having multiple operating modes and an operating mode selector that is coupled to the hardware device. The operating mode selector has a virtual fusing register that selects an operating mode for the hardware device and a security processor that enables a secure virtual fusing based on documented security files authorizing selection of the operating mode. A method of secure hardware device operating mode reconfiguration is also provided.

A method of RLC reconfiguration for a communication device of a wireless communication system includes receiving a dedicated signaling including a reconfiguration value corresponding to a RLC-related parameter when the RLC-related parameter is in-use, and not immediately starting to use the reconfiguration value on the in-use RLC-related parameter when the reconfiguration value is extracted from the dedicated signaling.

The invention discloses a flight control method for large civil aircrafts on the basis of direct adaptive control reconfiguration, and relates to the field of control technology for aircrafts. The flight control method has the advantages that a direct adaptive process and a model following process are combined with each other and are applied to B747-200 aircrafts, control reconfiguration flight simulation for the large civil aircrafts in an actuator failure mode is implemented, reference is provided for control reconfiguration for the large civil aircrafts in the actuator failure mode, and accordingly the flight control method has an important significance in improving the safety of the aircrafts, reducing the accident rate of the aircrafts and improving the survival ability of the aircrafts under failure conditions.

The invention aims to provide a method and a device for calculating beam forming factors used in a changing-over process. A source cell receives measurement reports sent by a user device, calculates to obtain the beam forming factors of the user device in a target cell by using the measurement reports, writes the beam forming factors in a changing-over request and sends the beam forming factors to the target cell, and sends a wireless resource control reconfiguration request to the user device according to a changing-over response feeding back by the target cell. The user device accesses the target cell according to the reconfiguration request. The target cell sets up a communication connection with the user device according to the beam forming factors by adopting a beam forming mode. Compared with the prior art, the source cell calculates the beam forming factors of the user device in the target cell ahead of time, writes the beam forming factors in the changing-over request and sends the beam forming factors to the target cell, the target cell adopts the beam forming mode according to the mentioned situations, and sets up a communication connection with the user device, therefore the changing-over process is simplified, and the success rate of changing-over is improved.

The invention discloses a method, a device and a system for reconfiguring time reference cells. The method includes that a primary cell (Pcell) base station receives a wireless link quality report of a non-Pcell time reference cell sent by user equipment (UE), wherein the wireless link quality report contains wireless link quality parameters of secondary cells (Scells) in a time advance (TA) group, and the non-Pcell time reference cell with the current wireless link quality not reaching preset recovery conditions is located in the TA group; a Pcell base station selects new Scells to serve as the time reference cell of the TA group according to the received wireless link quality report; and the Pcell base station transmits a wireless link control reconfiguration message to the UE, wherein information carried by the wireless link control reconfiguration message contains an identification of the selected time reference cell. According to the method, the device and the system, reconfiguration of non-Pcell time reference cells of the TA group for the UE according to the wireless link quality measured by the UE is achieved.

A description of a resource associated with a service of an entity can be captured. The service can be associated with one or more resources, a constraint, and a demand. The resource can be associated with one or more characteristics including a utility, a limited availability, and a consumption rate. The entity can be an organization or a system. An initial allocation problem associated with the resource can be formulated as a two phase problem. The first phase can be an optimization problem and the second phase can be a restricted allocation problem. The initial allocation problem can be associated with reconfiguring a previously established allocation of a baseline scenario. The optimization problem can be solved optimally or approximately to establish a favorable allocation. The favorable allocation can minimizes the reconfiguration cost of the reconfiguring. The baseline scenario can be a normal operation of the service.

Adaptive signaling (e.g., pilot signaling, control signaling, or data signaling) is disclosed in which resources allocated to one or more symbols are allowed to vary to more closely match channel conditions and data latency requirements. In one embodiment, a method includes determining that low-latency data is available to transmit during a first transmission time interval (TTI) and informing a mobile station that the low-latency data will be transmitted during one slot reserved for a symbol in the first TTI. The low-latency data may be transmitted during the first time slot in the first TTI and the symbol (originally scheduled symbols) may be transmitted during a second time slot.

The invention relates to a chip reallocated packaging structure which comprises a chip with an active surface and a lower surface, and a plurality of weld pads allocated on the active surface; a packaging body is used for packaging the chip and exposing the weld pads on the active surface; one ends of a plurality of fanned-out wire sections are electrically connected every weld pad; a protective layer is used for covering the active surface of the chip and every wire section and exposing the other ends of the wire sections; and a plurality of electrically connected elements are electrically connected with the other ends of the wire sections, wherein, the packaging body adopts a two-stage thermosetting cement material.

The invention relates to a system structure of terminal reconfiguration in the terminal-to-terminal reconfiguration environment and a control method, wherein, the system structure of a reconfigurable terminal consists of three parts, an embedded microprocessor ARM, a digital signal processor (DSP) and a field programmable gate array; the method includes four processes, the detection process of a reconfiguration trigger event, the process of reconfiguration decision and the access technology selection, the reconfiguration software download process and the installation and execution process of the reconfiguration software, which are completed by the cooperation of the reconfiguration terminal, an access point / a base station (AP / BS), and a reconfiguration network management server; the detection process of reconfiguration trigger event, the process of reconfiguration decision and the access technology selection and the reconfiguration software download process are respectively completed by a reconfiguration trigger event detecting module, a module of reconfiguration decision and access technology selection and a reconfiguration software download module in a terminal reconfiguration controller in the embedded microprocessor ARM.

Disclosed are a concurrent selftest engine and its applications to verify, initialize and scramble the system memory concurrently along with mainline operations. In prior art, memory reconfiguration and initialization can only be done by firmware with a full system shutdown and reboot. The disclosed hardware, working along with firmware, allows us to do comprehensive memory test operations on the extended customer memory area while the customer mainline memory accesses arc running in parallel. The hardware consists of concurrent selftest engines and priority logic. Great flexibility is achieved by the new design because customer-usable memory area can be dynamically allocated, verified and initialized. The system performance is improved by the fact that the selftest is hardware-driven whereas in prior art, the firmware drove the selftest. More comprehensive test patterns can be used to improve system memory RAS as well.

The invention discloses a coupler capable of simultaneously providing frequency reconfiguration and power dividing ratio reconfiguration. The reconfigurable coupler comprises a basically circular patch, wherein the angles among four ports are 90 degrees, so that the direct connecting, coupling and isolating effects of the coupler can be achieved. The circular patch is considered to be formed by four different sectors; and when the radiuses of the sectors are different in value, the working frequency and the power dividing ratio of the coupler are changed. The coupler is designed at a commonly used wireless communication frequency band, can achieve a multi-frequency response, provides any power dividing ratio and simultaneously has relatively good coupling degree and isolating degree, so that the coupler can be widely applied to the field of communication with a multi-standard or multi-system requirement.

The invention discloses a reusable launch vehicle control reconstruction method and system. The method comprises steps that the output information of a sensor is monitored and analyzed in real time; according to the analysis result of the output information of the sensor, the control strategy matched with the analysis result is selected; according to the selected control strategy, adaptive reconstruction of a control system of a reusable launch vehicle is carried out. The method is advantaged in that adaptive reconstruction of the reusable launch vehicle control system in the whole flight taskprocess is realized.

The invention discloses an FPGA and DSP program upgrade and online reconfiguration system and method. The system includes a USB external interface for connecting external upgrade devices, a FLASH chip for storing upgrade programs imported by the USB external device, including a DSP processor upgrade program and an FPGA upgrade program, and a DSP processor for taking the upgrade programs out from an FLASH chip and sending the programs to an FPGA processor for upgrade. By adopting the FPGA and DSP program upgrade and online reconfiguration system and method, the problem that target board upgrade program operation is complicated is solved, the number of storage devices in the system is decreased, and the hardware cost is reduced.

The present invention discloses a complex fault diagnosis identification method for a vertical takeoff and landing aircraft based on composite observer. The method comprises following steps: Step 1: Establishing a system fault state equation; Step 2: Establishing a detection observer to quickly realize fault determination, namely, determining whether a system is faulty; Step 3. Establishing a set of single-channel diagnostic observer and multi-channel coupling separate observer, and using the single-channel diagnostic observer to preliminarily extract fault information and using the multi-channel coupling separation observer to realize fault location and accurate diagnosis; Step 4: Based on observation results from the step 2 and the step 3, quickly diagnosing a fault mode and fault information. The method can quickly and accurately realize fault identification by using attitude angle velocity information of the vertical take-off and landing aircraft, and lays foundation for control reconstruction and task reconstruction design.

A system includes a sensor configured to sense an environmental condition. The sensor includes an input / output (I / O) reconfiguration system. The sensor further includes a plurality of I / O connectors configured to interface with at least one external system, wherein the I / O reconfiguration system is communicatively coupled to at least one of the plurality of I / O connectors and is configured to derive a sensor function based on an indication received via the at least one of the plurality of I / O connectors, and wherein signals derived by the sensor based on the sensor function are provided via the plurality of I / O connectors.

The invention discloses a reconfigurable PXI serial communication card and a method for achieving remote reconfiguration through the reconfigurable PXI serial communication card, and relates to the PXI reconfigurable serial communication technology. The reconfigurable PXI serial communication card aims at solving the problem that a PXI3U board card is poor in universality and inconvenient to maintain. A reconfigurable instrument platform of the reconfigurable PXI serial communication card is connected with a function board of the reconfigurable PXI serial communication card in a stack connection mode, the function board is detachably arranged on the back face of the reconfigurable instrument platform, and connecting signals are I / O signals of an FRGA. After a complete network server is formed, the FPGA receives a configuration file sent by a remote configuration computer. The reconfigurable PXI serial communication card can solve the problems that the number of different communication protocol cards is large, the system integration difficulty is high, and cost is high through the reconfiguration function, the serial communication function of the different protocols is achieved, and the reconfigurable PXI serial communication card has the advantages of being high in flexibility and universality, easy to update, suitable for test systems or other systems and the like.

The invention provides a multi-terminal reconfiguration method based on virtual terminal context environmental awareness, which comprises the steps as follows: a virtual terminal context environment is stored in main control terminal equipment, wherein the virtual terminal context environment comprises an equipment context, a user context, an environment context and a service context; adaptation processing is carried out during changes of the equipment context, the service context and the user context; during the change of the environment context, the virtual terminal context environment is transmitted from the main control terminal equipment in the conventional environment mode to main control terminal equipment in a new environment mode, the main control terminal equipment in a new environment mode carries out reconfiguration of a virtual terminal context, and adaptation processing is carried out according to the restructured virtual terminal context; and based on the result of the adaptation processing, the main control terminal equipment distributes different service execution parts to a controlled terminal to complete multi-terminal reconfiguration.