113 results about "Pipeline (software)" patented technology

Techniques are provided for software deployment pipeline generation using generative artificial intelligence (AI). One method comprises obtaining a trained generative AI model, trained using a plurality of continuous integration / continuous deployment (CI / CD) configuration files; obtaining information characterizing a selected software development project; and applying at least some of the information characterizing the selected software development project as one or more system prompts to the trained generative AI model, wherein the trained generative AI model predicts a portion of a software deployment pipeline associated with the selected software development project. The CI / CD configuration files used for training may be associated with an organization that is associated with the selected software development project. The predicted portion of the software deployment pipeline may comprise pipeline jobs, an automatic code completion and / or a correction of a syntax and / or a structure of at least one CI / CD configuration file being edited.

The invention relates to the technical field of software engineering and artificial intelligence crossing, in particular to an API test case rapid generation method and system based on an AI large model.The method comprises the following steps that joint analysis and semantic fusion are conducted on an API document and a demand document through a multi-modal data analysis layer, and a complete test context is constructed; generating a test case based on the pre-trained large model by using a hybrid inference engine; the method has the beneficial effects that the association constraint of the API document and the demand document is automatically extracted through semantic understanding; a parameter combination strategy is optimized through reinforcement learning, and the problem of combination explosion is solved; constructing a self-adaptive test case maintenance mechanism, and responding to API version iteration; an executable test code that can be directly integrated into the CI / CD pipeline is generated.

The invention relates to the technical field of software engineering, and discloses an assembly line flow adaptive configuration method and system. The method comprises the following steps: obtaining source code data of a software project and performing static analysis and feature extraction to generate structured language description data; querying and matching in a preset template library based on the structured language description data to generate a task template set; performing task dependency relationship analysis and process topology assembly on the task template set to generate initial pipeline data; and performing dynamic strategy adjustment on the execution process of the initial pipeline data by adopting the real-time context data corresponding to the software project to generate target pipeline data. Through automatic language recognition and intelligent process generation, automatic configuration of the continuous integration process is realized, and the technical problem of low automation level caused by lack of automatic recognition and adaptation capability for a project development language environment in a project continuous integration and continuous deployment technology is solved.

A continuous integration (CI) pipeline can be executed based on a type of content for a change to source code. For example, a computing system can receive the change to the source code of a software application in response to a request for changing the source code being generated. The computing system can identify the type of content included in the change to the source code. Specifically, the computing system can determine whether the type of content is associated with a prevention of an execution of the CI pipeline. In response, the computing system can perform an action associated with the change to the source code prior to a deployment of the change to the source code.

The systems and methods disclosed herein relate to a model validation platform that enables dynamic validation of a user's prompt for a large language model (LLM) in order to evaluate the validity of the prompt and the suitability of a large language model for processing the prompt. For example, the platform enables an estimation of the resource allocation associated with processing the prompt with a given LLM, as well as a modification of the prompt, prior to the processing the prompt with the selected LLM. The platform can further validate the output prior to transmitting the output to a server system for display to the user. By doing so, the platform enables dynamic evaluation of a request to execute an LLM, as well as evaluation of resulting outputs, for accuracy and efficiency improvements in data processing or software development pipelines.

A system, computer program product, and method are provided for distributed data workflow semantics. A pipeline, such as a machine learning (ML) pipeline, is represented in a data flow graph (DFG). The represented pipeline is subject to annotations, with the annotations including pipeline nodes and object references. The pre-processed pipeline is subject to execution or processing with the annotated object references capturing object lineage. Output from the executed pipeline is constructed and a corresponding control signal is formatted to dynamically and selectively control an operatively coupled physical hardware device or software.

With invocations of a software development pipeline, organization specific remediations / fixes for a software project can be learned from scanning results of code submissions (e.g., commits or merges) across an organization for a software project(s). Fixes of detected program code flaws can be detected and / or specified across scans and associated with flaw identifiers and used for training machine learning models to identify candidate fixes for detected flaws. This ongoing learning during development propagates fixes created or chosen by experts (e.g., software engineers working on the software project) relevant to the software project. The experts can choose from suggestions mined from the learned fixes of the organization and suggestions generated from a pipeline created with the trained machine learning models. The selections are then used for further training of the machine learning models that form the pipeline.

The invention discloses a BIM (Building Information Modeling) technology-based pipeline hole reserving design system and method. The method comprises the following steps of defining hole occupation data for storing hole parameters; according to each hole occupation data read from the storage of the project file, creating a corresponding hole volume in the BIM software as a BIM model component; calculating the geometric dimension of the volume of each hole; combining the masses of the adjacent holes; and updating corresponding hole occupation data according to the combined hole volume, and generating a hole instance of the multi-view BIM hole according to the updated hole occupation data, thereby realizing synchronization of the BIM hole and the two-dimensional drawing. According to the method, automatic circulation of pipeline hole reserving from data to models and drawings is realized; the problems that omissions are easy to occur in manual marking and no professional discrimination is available for plug-in hole opening are solved, the design quality is guaranteed, the design period is shortened, and information mistakes and omissions are reduced; and multiple views are synchronously generated, so that inconsistency of manual labeling is avoided, and construction application is directly supported.

Techniques are provided for failure mitigation in software deployment pipelines using generative artificial intelligence (AI). One method comprises obtaining a request to merge code changes associated with a first branch of software code with a second branch of the software code; in response to the request: obtaining information characterizing the software deployment pipeline; applying at least a portion of the information to a classification model to obtain a prediction that an implementation of the request will result in a failure; applying, in response to the prediction that the implementation of the request will result in the failure, at least a portion of the information to a generative AI model, with failure information characterizing reasons for the failure, to obtain mitigation actions to mitigate the failure; and automatically initiating processing steps associated with at least one of the mitigation actions to mitigate the failure.

A method for processing packets, the method comprising receiving a packet by a data processing unit (DPU), making a first determination that there is no exact match flow entry in a hardware switch pipeline in the DPU for the packet, in response to the first determination, classifying, in the DPU, the packet as a data packet, in response to the classifying of the packet: identifying, using a software data plane in the DPU, a forwarding information base (FIB) entry to be used to transmit the packet towards its intended destination, identifying, using the software data plane, a flow associated with the packet, initiating, using the software data plane, programming of an exact match flow entry in the hardware switch pipeline, and initiating, using the software data plane, transmission of the packet towards its intended destination using the FIB entry and the hardware switch pipeline.

In some implementations, a fault diagnosis system may track information associated with a first execution of a code pipeline to deploy an updated version of software associated with the code pipeline. The fault diagnosis system may receive an indication of a failure in a second execution of the code pipeline, wherein the second execution of the code pipeline is triggered by a commit of source code to a source code repository. The fault diagnosis system may determine whether the updated version of the software associated with the code pipeline or the source code committed to the source code repository is a cause of the failure in the second execution of the code pipeline. The fault diagnosis system may send a request to plan code development to resolve the cause of the failure in the second execution of the code pipeline.

The invention discloses an application software architecture for encapsulating a task management and synchronization mechanism of an operating system, and belongs to the technical field of industrial real-time control. According to the architecture, an operating system task management and synchronization mechanism is modularly packaged into three types of objects: an employee type for packaging specific business execution logic; the pipeline class is used for packaging inter-task communication and synchronization functions; and the behavior class is used for packaging an operating system task entity and is responsible for scheduling employee objects contained in the behavior class to be executed orderly. The three types of objects are created, assembled and started through a factory mode according to configuration information to form a complete real-time task system. According to the method, through object-oriented packaging and configuration assembly, the problems of tight task coupling and difficult code maintenance in traditional process-oriented programming are solved, loose coupling and high cohesion among task modules are realized, the configurability, maintainability and expandability of industrial real-time software are remarkably improved, and the method is suitable for various real-time operating system environments.

Annotating changes in software across computing environments, including: monitoring a software development and deployment pipeline; annotating a detected change in software with evidence providing information about one or more aspects of the detected change in software; and referring to the annotations for an unexpected change upon detecting the unexpected change in an environment that is outside of the software development and deployment pipeline.

Systems and methods for alert fixing. A method includes creating an entity graph based on correlations among software components of a software development infrastructure. The entity graph includes representing the software components. A software development pipeline is mapped in the entity graph by enumerating pipeline execution steps with respect to the software components of the software development infrastructure. Correlations between software components indicated in alerts are determined based on the entity graph. The alerts are deduplicated by matching between alerts between the alerts based on the correlations. One or more fix actions are generated based on the deduplicated alerts. The software development infrastructure is secured by causing implementation of the fix actions.

The invention discloses a large language model softmax function hardware acceleration circuit and method, and belongs to the field of neural network hardware acceleration of super-large scale integrated circuits. An input sequence is divided into a plurality of data blocks which are processed in parallel, and three-stage pipeline division is adopted, so that average single calculation delay is shortened to G clock cycles, the calculation parallelism is improved, the calculation speed of a softmax function is improved, and the reasoning delay is reduced; and a sparse mask strategy of sparse threshold comparison is introduced, the sparsity of data is fully utilized, the problems of high calculation complexity and high calculation delay of the softmax function and the data access bottleneck of the softmax function are solved, the calculation cost is remarkably reduced, and the calculation efficiency is improved. In addition, a softmax function hardware circuit adaptive to software optimization is constructed, calculation delay and memory access pressure are reduced through the hardware circuit, and data processing efficiency is improved.

Described herein are systems utilizing a DevSecOps model comprising a CI / CD template, framework interfacing with a CI / CD pipeline that can integrate the assemblage of software components that collectively automate the building, testing, and delivery of applications within various hosting environments. Also described herein are methods utilizing the aforementioned systems.

This invention discloses a virtual prototype platform based on a convolutional neural network microprocessor. Based on the existing RISC-V virtual prototype platform, this platform has the following features: First, using inline assembly, vector extensions and matrix operation instruction extensions are added to the compiler tool. This allows the compiler tool to recognize these instructions during compilation and successfully compile them into corresponding machine code for execution by the CPU hardware model. Second, by modifying the pipeline of the RISC-V virtual prototype processor hardware model, two SystemC modules, a vector loading module and a matrix operation module, are added to the pipeline, thereby enabling the construction of a virtual prototype platform for the CNN microprocessor. This invention can solve problems such as achieving hardware-software collaborative design during the design of CNN microprocessors.

The invention belongs to the field of software development, and provides a pipeline instance triggering method and device, a storage medium and electronic device.The method comprises the steps that a target pipeline is generated based on code change information and multiple mapping relations through a branch strategy adaptation component; and through an assembly line instantiation synchronization component, based on the called cloud effect assembly line instantiation service, sequentially executing assembly line synchronization operation, construction synchronization operation, cloud configuration binding operation and assembly line instance operation operation so as to trigger, start and operate a target assembly line instance corresponding to the target assembly line. Through the triggering method, the target assembly line can be automatically generated based on the code change information, and the target assembly line instance can be automatically triggered, started and operated.

The application discloses a software project dependency analysis method, which is applied to the technical field of software development. The method provided by the application comprises the following steps: adding a pre-developed scanning plug-in into a pre-deployed pipeline; searching for network addresses of at least one target software project to be subjected to dependency analysis in the pipeline; creating a corresponding thread for each target software project, and distributing an analysis task of the target software project to the corresponding thread; starting the thread, using the scanning plug-in to scan files of the target software project according to the network addresses, obtaining a target format file used for representing a type of the target software project, and obtaining the type of the target software project; and using the scanning plug-in to analyze the target format file according to the type of the target software project through the thread, and obtaining dependency information of the target software project.

A system for registration of a software application on a digital platform, having one or more processors, a memory storing program instructions which, when executed by the one or more processors, causes the processor to create a pipeline between the software application and the digital platform, wherein the pipeline provides an interface between the software application and the digital platform, define a template to capture one of more parameters of the software application, wherein the template is based on the pipeline created between the software application and the digital platform, capture the one or more parameters of the software application, wherein the one or more parameters are relating to one or more of indexing, packaging, versioning of the software application, define a resources requirement of the software application, wherein the resources are classified as initialization resources and deployment resources and the initialization resources are only created once at the registration of a software application, update the resources requirement by defining an order of creation of the resources, wherein the initialization resources are created prior to the creation of deployment resources and determine if the one or more parameters and the resources requirement of the software application are compatible with the digital platform and based on the determination, transmit the one or more parameters and the resources requirement of the software application to the digital platform, via the pipeline.

A hardware accelerator (10) is disclosed that can flexibly be configured to support differing data types and differing operation flows. The hardware accelerator includes a plurality of fixed tensor operation logic units (16), tensor operation pipeline logic (18) configured to receive from the processor a pipeline command (24) including a software-defined tensor operation pipeline definition (26) defining a plurality of tensor operation stages (30) in a tensor operation pipeline (32) and associated predetermined tensor operations to be performed at each of the defined tensor operation stages. The hardware accelerator is further configured to receive tensor data (28) to be computed by the tensor operation pipeline, and implement the tensor operation pipeline to perform the tensor operations in each of the tensor operation stages on the tensor data, to thereby produce a tensor operation pipeline result (34) for the tensor data, and output the tensor operation pipeline result to the processor.

A server system may receive two or more Quality of Service (QoS) dimensions for the multi-objective optimization model, wherein the two or more QoS dimensions include at least a first QoS dimension and a second QoS dimension. The server system may maximize the multi-objective optimization model along the first QoS dimension, wherein the maximizing includes selecting one or more pipelines for the multi-objective optimization model in the software architecture that meet QoS expectations specified for the first QoS dimension and the second QoS dimension, wherein an ordering of the pipelines is dependent on which QoS dimensions were optimized and de-optimized and to what extent, wherein the multi-objective optimization model is partially de-optimized along the second QoS dimension in order to comply with the QoS expectations for the first QoS dimension, and whereby there is a tradeoff between the first QoS dimension and the second QoS dimension.

The invention discloses a data processing method and device, electronic equipment and a computer program product. The method comprises the steps that a target server in a pipeline system receives target description information sent by a software development kit in a trusted area; when the target server receives the target event information, analyzing the target description information to obtain data processing demand information; the target server sends the target description information to a first node in the trusted area based on the data processing demand information, and the first node processes the to-be-processed data according to the target description information to obtain a processing result. According to the data processing method and device, the technical problem that in the related technology, when a user uses an assembly line service provided by a third party to carry out data processing, the third party needs to pull various data information of the user, and consequently the data security is poor is solved.

The invention provides an upper computer intelligent control system and method for a pipeline processing flexible production line, and the system and method achieve the full-flow intelligent control of the pipeline processing flexible production line from MES work order information to production instructions through the three-stage architecture design of a user interaction layer, a data processing layer and a hardware driving layer. According to the system, modular design is adopted, collaborative operation of station hardware equipment such as a feeding vertical warehouse, rust removal, cutting, carrying and welding is integrated, the operation state of each station and the posture of a welding robot are monitored in real time through a simulation interface, and the production safety and the process controllability are remarkably improved. According to the invention, cooperative control of each module of the production line and among the modules is realized, the production efficiency is improved, the time and labor cost is reduced, the problems of fine processing flow and difficult connection are solved, functional redundancy is reduced through customized design, the compatibility of software and hardware is improved, one-key operation is simplified, the learning cost is reduced, all readable interfaces are reserved, and the system is suitable for popularization and application. New function modules are convenient to add, and new programs do not need to be redesigned and developed.

The invention discloses an efficient and parallel autoregressive diffusion model hardware acceleration system based on an FPGA (Field Programmable Gate Array), and relates to the technical field of FPGA and machine learning. The system comprises a host end and an FPGA hardware end, the host end is responsible for preprocessing and post-processing of data, and the FPGA hardware end comprises a system control scheduling layer, a three-level storage structure layer and an autoregressive diffusion parallel architecture. According to the method, a collaborative pipeline design is adopted, deep parallelism of an autoregression Token generation process and a diffusion picture generation process is realized through a Token grouping adding mechanism, and a diffusion denoising process can be started without waiting for the completion of complete sequence generation. Besides, a universal attention processing hardware module is designed in the system, QKV projection and matrix multiplication are realized by using a systolic array, and calculation resources are optimized in cooperation with a pipelined Softmax calculation and delay normalization strategy. Through collaborative design of software and hardware, the problems of high reasoning delay and large resource overhead of the autoregression diffusion model in an edge computing scene are effectively solved, and the throughput and the energy efficiency ratio are remarkably improved while the generation quality is ensured.

Aspects of the subject disclosure may include, for example, obtaining a model file and a context file associated with an environment-as-code (EaC) service, committing the model file and the context file utilizing a source control software service, and in response to the committing, building a set of instructions as part of a pipeline associated with the EaC service for utilizing a continuous integration and continuous deployment (CI / CD) software application. Further embodiments may include assembling infrastructure-as-code (IaC) software from a curated library of software patterns based on the model file and the EaC service, configuring a group of workspaces for a IaC provider software application based on the set of instructions as part of the pipeline, and providing provisioning instructions to a cloud provider server to provision computing resources based on the group of workspaces. Other embodiments are disclosed.

Techniques are provided for software deployment pipeline evaluation using a presence of designated functions. One method comprises obtaining information characterizing a set of designated functions; determining one or more of: (i) whether at least one stage of a given software deployment pipeline comprises one or more of the designated functions in the set and (ii) whether an execution of one or more of the designated functions in the at least one stage of the given software deployment pipeline succeeded; and initiating one or more automated actions based at least in part on at least one result of the determining. The designated functions may be specified for different technology types. Job logs associated with the at least one stage of the given software deployment pipeline may be searched for commands that execute one or more of the designated functions.

A hardware- and software-aware metagraph is deployed in conjunction with a corresponding artificial intelligence / machine learning (AIML) model onto heterogeneous and mixed-precision devices to enable flexible generic runtime with minimum control overhead for synchronization, automatic insertion of data transfers and conversions, reuse of graphs from application to application for different hardware and software configurations, and enablement of single, batch, and pipeline execution. The metagraph is independent of the existing AIML training / inference frameworks and can extend to broader scope of general heterogenous computation, also can be used by offline / runtime to enable solutions from heterogenous deployment to optimal execution scheduling and network structure fine tuning.

A system for providing an API-driven continuous test platform is disclosed. The system may include one or more processors, a test engine, one or more test agents, and a database. The system may prepare (according to a configuration file) a first test configuration comprising a first selection of the one or more test agents, execute (using the test engine) the first test configuration to produce one or more first test results, and store (using the database) the one or more first test results. Finally, the system may process (using a continuous integration and continuous delivery (CI / CD) pipeline) the first test results by performing at least one of the following CI / CD processes: updating a central code base of an enterprise production environment, rejecting at least one code snippet processed by the test engine during execution of the first test configuration, and marking the first test results as inconclusive.

The invention relates to a universal FPGA (Field Programmable Gate Array) implementation method and system for accelerating multivariable recursive function operation, which is characterized in that the recursive function operation is simplified by using the characteristics of FPGA parallel operation and pipeline calculation, so that the calculation speed is improved, the calculation speed is high, the resource consumption is low, the consumed resource is controllable, the algorithm is obviously superior to a C language decoding algorithm, an IP (Internet Protocol) core is not used, cross-platform transplantation is convenient, and the universality is high. The data length and the recursion frequency can be flexibly configured through macro definition, so that the method is suitable for various algorithm application occasions, high-performance multivariable recursion function operation acceleration is achieved, a proper chip and a proper clock crystal oscillator can be selected according to calculation results of formulas such as operation time and resource consumption, and an overall software architecture can be planned.