The application relates to the technical field of time display, and provides a
microsecond-level time
display device, which comprises an FPGA control device and a
display device; the FPGA control device comprises a 1MHz main frequency output end, a 1 / 32MHz frequency division output end and a 1 / 1024MHz frequency division output end; the
display device comprises more than 32 unit modules, each unit module comprises a D flip-flop, a
shift register and 32 display lamp components; the 1MHz main frequency output end is connected with the
clock enable end of each D flip-flop; the 1 / 32MHz frequency division output end is connected with the
clock enable end of each
shift register; the 1 / 1024MHz frequency division output end is connected with the
signal input end of the D flip-flop of the first unit module, and the
signal input end of the D flip-flop of other unit modules is connected with the
signal output end of the D flip-flop of the previous unit module; the signal output end of the D flip-flop is connected with the signal input end of the
shift register; and each display lamp component is connected with the signal output end of one shift register. The scheme can accurately provide absolute time and the precision is in the
microsecond level.