The invention discloses an integrated circuit non-pessimistic path analysis method for GPU accelerated calculation. The method comprises the steps of circuit structure flattening, circuit structure layering preprocessing, multi-GPU parallel candidate path generation and global candidate path merging. The multi-GPU parallel candidate path generation comprises the steps of multi-GPU task allocation, delay grouping initialization, parallel delay propagation, parallel progressive candidate path generation and parallel local candidate path pre-merging. According to the invention, by introducing equivalent transformation of an algorithm and a data structure, dense calculation in non-pessimistic time sequence analysis is completed in parallel on a plurality of GPUs, and data and control scheduling work among the GPUs is completed by using a CPU. Through cooperation of a single CPU-multi-GPU heterogeneous calculation model, compared with an original CPU algorithm, the performance can be improved by dozens of times, the calculation cost of non-pessimistic path analysis is greatly reduced, and the invention can be popularized and applied to the technical field of chip design automation.