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82 results about "Compute kernel" patented technology

In computing, a compute kernel is a routine compiled for high throughput accelerators (such as graphics processing units (GPUs), digital signal processors (DSPs) or field-programmable gate arrays (FPGAs)), separate from but used by a main program (typically running on a central processing unit). They are sometimes called compute shaders, sharing execution units with vertex shaders and pixel shaders on GPUs, but are not limited to execution on one class of device, or graphics APIs.

GPU computing power resource scheduling method and device based on load awareness and medium

The invention discloses a GPU computing power resource scheduling method and device based on load awareness and a medium, and relates to the technical field of computing power scheduling. The method comprises the steps that according to the video memory capacity and the number of calculation cores of the GPU, the video memory capacity is divided into a plurality of continuous fragments, the calculation cores are divided into a plurality of logic calculation groups, and sub-resource units are obtained; recording occupation states and load indexes of the sub-resource units in real time to obtain a resource pool; analyzing a job submitted by a user, and collecting an execution period of a kernel function, a video memory access mode and an instruction pipeline blocking rate when the job runs; and on the basis of a reinforcement learning algorithm, predicting a resource demand inflection point of the job according to the load fingerprint model, performing hierarchical scheduling on the sub-resource units based on virtualization isolation and multi-dimensional resource quantitative evaluation, and generating a preemptive allocation strategy of the sub-resource units. According to the method, efficient utilization and secure sharing of GPU resources are realized through collaborative design of dynamic granularity segmentation, load aware scheduling and hardware-level security isolation.
Owner:SHANDONG INSPUR SCI RES INST CO LTD

System and Method of Blocking Malicious Connections Based on Application Layer State into EBPF Program

A method of blocking malicious connections based on application layer state into eBPF program is disclosed. The method includes receiving HTTP requests, associated with connections, from users and uniquely identifying and track each connection by assigning a unique identifier. Next, the method maintains the application layer state in the eBPF program for each connection by storing headers of corresponding kernel function calls and analyzing content associated with the received HTTP requests to detect malicious content by inspecting headers, payloads, and / or request parts of corresponding HTTP request via eBPF program to identify potentially harmful and unauthorized requests. Thereafter, the method includes blocking the connections associated with the detected malicious content based on the assigned unique identifier of the connections.
Owner:HARNESS INC

Deep learning reasoning service performance analysis method based on kernel function trajectory

The invention provides a kernel function trajectory-based deep learning inference service performance analysis method, which comprises the following steps of: based on service indexes and hardware theoretical computing power acquired from a production cluster, defining floating point operation times per request (FPR) index to quantify service resource efficiency, and identifying high FPR hotspot services; positioning a reasoning iteration candidate boundary based on a GPU kernel function trajectory, verifying iteration integrity through fingerprint matching and chi-square test, and calculating a second reasoning iteration number IIPS and a model reasoning efficiency MIE; aiming at calculation-intensive operators on the key path, combining a dynamic Roofline model to estimate an operator theoretical performance upper limit, and based on actual execution time, calculating efficiency and a BottleScore index to identify a key bottleneck operator; and outputting targeted optimization suggestions according to analysis results of service efficiency analysis, model efficiency analysis and operator efficiency analysis. According to the method, the inference behavior pattern can be automatically identified from massive kernel trajectories, and the efficiency loss of each level is quantified.
Owner:UNIV OF SHANGHAI FOR SCI & TECH +1

SpMM optimization method and device oriented to GPU-like architecture

According to the SpMM optimization method and device oriented to the GPU-like architecture, on the premise that the standard CSR storage format is not changed, dual load balancing in the thread bundles and between the thread bundles can be achieved, and computing power waste caused by row length difference of a traditional row-split strategy is eliminated. The method comprises the following steps: (1) inputting a sparse matrix A; (2) calculating the number of non-zero elements in the longest row of the sparse matrix A; (3) judging whether rows with more than 64 non-zero elements exist in the sparse matrix A or not, and if yes, executing the step (4); if not, executing the step (6); (4) binning operation: dividing matrix rows into three categories according to the number of non-zero elements; (5) each category is processed by a corresponding computing kernel, a short traveling box calls a short traveling box kernel to compute, a middle traveling box calls a middle traveling box kernel to compute, and a long traveling box calls a long traveling box kernel to compute; skipping to the step (7); (6) calling kernel calculation in the short-row box; and (7) writing back a result.
Owner:ZHENGZHOU UNIV

GPU resource scheduling and optimizing method oriented to large model reasoning

The invention relates to a GPU resource scheduling and optimizing method oriented to large model reasoning. The method comprises the following steps: segmenting a model by adopting a model parallelization strategy to obtain each task to be processed; performing GPU scheduling on each to-be-processed task at a task level according to resource data returned by an instrumented code; and executing the computing kernels and the communication kernels of the to-be-processed tasks of different batches in parallel on the same GPU. By adopting the method, the large model reasoning performance and the resource utilization efficiency can be improved.
Owner:HUNAN UNIV

Plate defect detection system based on edge calculation

The invention relates to the technical field of image pattern recognition, in particular to a plate defect detection system based on edge calculation, which comprises a convolution kernel directivity screening module, a convolution kernel separable reconstruction module, a model structured constraint fine tuning module and an edge end parallel reasoning module. According to the method, calculation cores sensitive to specific directional defects are automatically screened, the accuracy of recognizing key features such as scratches is enhanced, complex detection operation is decomposed into two simplified vector convolution and one residual error correction calculation, the design greatly compresses the operation complexity and parameter quantity, and the detection accuracy is improved. By means of a parallel computing architecture of an edge end, separated computing tasks are synchronously processed, results are combined, efficient reasoning is achieved on equipment with limited computing resources, real-time on-site detection of plate defects is achieved, delay caused by a data remote transmission center server is effectively avoided, and the detection accuracy is improved. And the response speed and deployment flexibility of the whole detection process are improved.
Owner:FOSHAN POLYTECHNIC

Unified programming model compiling and runtime system oriented to Shenwei supercomputing platform

The invention discloses a unified programming model compiling and runtime system oriented to a Shenwei supercomputing platform, which comprises a compiling module used for compiling SYCL programming model codes and detecting kernel functions to generate equipment end intermediate representation; processing the equipment end intermediate representation to obtain a kernel function dynamic link library and an executable code of a host end; and the public runtime module is used for calling the kernel function dynamic link library when the executable code at the host side runs. Based on a compiling module and a public runtime module, a vertical optimization system from a compiler to runtime is constructed, efficient operation of SYCL in a domestic supercomputing system is realized, a semantic gap between a domestic many-core architecture and a universal programming model is overcome, and the development of the system is facilitated. The SYCL programming model is processed by a host end and an equipment end respectively after being extracted by a kernel during compiling, and is dynamically called by a common runtime module, so that the cooperative computing capability of the host end and the equipment end is fully exerted.
Owner:XI AN JIAOTONG UNIV

KV-cache streaming for improved performance and fault tolerance in generative model serving

A method of serving a generative transformer model includes determining a batch size to use in processing inference requests and allocating at least one prompt pipeline and at least on token pipeline to the generative transformer model to process the batch of inference requests. The number of prompt pipelines and the number of token pipelines, and the depths of the pipelines are determined based on the batch size, an average prompt length, a cache requirement per stage, and a memory footprint of model weights for the generative model per stage using a resource allocator component of the model serving system. Cache streaming is used to stream prompt cache from prompt pipelines to token pipelines to generate tokens. Cache streaming involves gather-copy operations which may be performed using compute kernels.
Owner:MICROSOFT TECHNOLOGY LICENSING LLC

Heterogeneous computing method and platform for cooperative work of CPU and GPU

The invention is suitable for the technical field of computers, and provides a CPU and GPU cooperative work heterogeneous computing method and platform, and the method comprises the following steps: S1, carrying out the meta-task analysis of an input computing task, extracting the computing feature metadata of the computing task, and predicting the performance of the computing task based on a pre-trained performance prediction model; dynamically deciding execution path planning of the task between the CPU and the GPU; s2, according to the execution path planning, carrying out adaptive resource collaborative configuration; and S3, on the basis of the calculation feature metadata and the current hardware state, through a parameterized kernel template or a just-in-time compilation technology, heterogeneous perception optimized kernel codes are generated. The method effectively solves the problems that a task scheduling strategy is rigid, the bottleneck of memory and data transmission is prominent, calculation kernel optimization is insufficient and is lack of adaptability, and a system is lack of self-evolution and learning ability.
Owner:BEIJING XINYIHE TECHNOLOGY CO LTD

Method and device for accessing hardware equipment to model reasoning acceleration framework and electronic equipment

The invention discloses a method and device for accessing hardware equipment to a model reasoning acceleration framework and electronic equipment, and relates to the technical field of computers, and the method comprises the steps: setting a bidirectional decoupling middle layer between target hardware equipment and the model reasoning acceleration framework, a unified memory operation interface and a unified kernel function execution interface of different hardware devices are arranged in a middle layer, and kernel functions of the different hardware devices are registered to a model reasoning acceleration framework through the middle layer, so that the kernel functions of the model reasoning acceleration framework are separated from a system during hardware running. Different hardware devices can realize access to the model reasoning acceleration framework through the intermediate layer, and the codes, operators and even model structures of the model reasoning acceleration framework do not need to be adjusted to adapt to different hardware devices, so that the problem of poor universality of the model reasoning acceleration framework in related technologies is solved, and the universality of the model reasoning acceleration framework is improved. The technical effect of improving the universality of the model reasoning acceleration framework is achieved.
Owner:INSPUR SUZHOU INTELLIGENT TECH CO LTD

System and method for executing fused neural-network layer architectures

The present disclosure provides a system and method for executing fused neural network layers using a graphics processing unit (GPU). The fused neural network layer combines multiple neural network operations into a single GPU kernel function, for efficient utilization of a GPU shared memory to reduce global memory transactions. The fused neural-network-layer system configures GPU thread blocks to iterate tiles in the GPU shared memory across portions of input tensors, and to perform a sequence of neural network layer operations using the tiles, before storing the results in an output tensor. The neural network layer operations can include element-wise, normalization, and pooling operations. The system also supports fused layers with nested traversals of input tensors, such as matrix multiplication, convolution, and attention mechanisms. The fused neural-network-layer system improves performance and reduces memory overhead compared to executing each layer as a separate GPU kernel, thereby enabling faster training and inference times.
Owner:BAYRIS INC

Dynamic calling method and system for kernel underived function

The invention provides a method and a system for dynamically calling a kernel unexported function, which are used for dynamically acquiring a function address of an unexported kernel function and forcibly calling the function through a kProbes mechanism, matching with a function pointer type definition and a mechanism for forcibly converting the function address into a function pointer. The method not only supports the calling of the kernel function which is not exported, but also does not need to carry out hard coding on the address of the called kernel function, supports the dynamic acquisition of the address of the kernel function, avoids the change of the coincidence address caused by the difference of kernel versions, greatly enhances the compatibility of the software package of the kernel function which is not exported, and improves the reliability of the software package. And the packet does not need to be recompiled in each kernel small version, so that the problem that the kernel symbol table is not matched and the kernel module cannot be loaded is avoided.
Owner:CHINA UNICOM DIGITAL TECNOLOGY CO LTD

Method for preventing network behaviors based on ebpf and kernel kprobe / ftrace technology hook kernel function

The invention discloses a method for preventing network behaviors based on an ebpf and kernel kprobe / ftrace technology hook kernel function. The method comprises the following steps: compiling an ebpf program or a ko module; the method comprises the following steps: loading an ebpf program or a ko module into a kernel of a linux system, and hooking a linux kernel function; configuring a system interpreter library, a blocked application program library, a blocked domain name library and a blocked IP library in a kernel of the linux system; when an application program or software carries out a network behavior on the linux system, a linux kernel function of the hook point carries out interception, whether a program, a queried domain name, a destination IP address and a source IP address corresponding to the carried network behavior are in corresponding blocking libraries or not is judged, if yes, the carried network behavior is blocked; and if not, allowing the network behavior to be performed. According to the method, an ebpf program of a hook linux kernel function is written in an application layer of the linux system, or a ko module of the hook linux kernel function is written by utilizing a kernel kprobe / ftrace technology, so that the kernel function of the hook linux system is realized, and network behaviors are prevented in a kernel of the linux system.
Owner:HEFEI WEISHI INNOVATION INFORMATION TECH CO LTD

Service device and database event processing method

PendingCN122387703ATarget arrayEvent data
The application relates to a service device and a database event processing method, which are applied to the technical field of databases, and the service device comprises a controller which is configured to: in the process of executing an SQL statement by a database process, enter a kernel state through a system call to execute a kernel function through a target CPU core; in the process of executing the kernel function, trigger a corresponding eBPF mounting point to run an eBPF program on the target CPU core; capture a target database event by executing the eBPF program; write target event data corresponding to the target database event into a target array buffer corresponding to the target CPU core; and in the case that event attribute information corresponding to the target array buffer meets a target condition, batch submit a plurality of event data in the target array buffer to a user state program. The performance overhead caused by frequent switching between the kernel state and the user state is reduced, and the running performance of the database itself is improved.
Owner:青岛聚看云科技有限公司

Dynamically pooled allocations of memory buffers on spatial compute architectures

Dynamically pooled allocation of memory buffer on spatial compute architectures, including analyzing, at compile-time, access patterns (e.g., cyclo-static execution / firing rules) of consumer and / or producer processes that have shared access to local memory of one or more compute tiles, and identifying situations in which multiple buffers can be replaced with a pooled buffer having a memory footprint that is less than a sum of the memory footprints of the multiple buffers. A compiler may identify instances of mutual exclusiveness in the execution patterns of the processes, differences in execution times between compute kernels of the processes, and / or variations in execution times of the kernels. The compiler may generate controller code and / or configuration parameters to enforce memory allocation / mapping at application run-time.
Owner:XILINX INC +1

A sparse attention calculation method, device and medium for a GPU

The present application relates to the technical field of GPU computing optimization, and in particular to a sparse attention computing method, device and medium for GPU, wherein the method realizes the high efficiency of long context reasoning through the geometric perception sparse attention framework of ball hashing, and combines a large-scale parallel hashing optimization algorithm and a load adaptive computing kernel. Compared with the existing sparse attention methods based on heuristics or gradient learning, the present application realizes higher retrieval recall rate, lower preprocessing overhead and efficient hardware adaptation to irregular sparse patterns.
Owner:CENT SOUTH UNIV

Graph structure force guided dynamic spring effect acceleration method based on GPU parallel computing

The invention discloses a graph structure force guided dynamic spring effect acceleration method based on GPU parallel computing. The method comprises the following steps: dividing three independent GPU kernel functions; a resource allocation strategy is adopted under the Ada architecture, and execution configuration is generated; introducing a thread coarsening method to generate an optimized kernel execution result; generating a node position calculation result by using a shared memory privatization method and a reduce operator fusion method in combination with an improved KIFMM algorithm; in the iterative updating stage, an iterative updating result of the node position is obtained; performing cooling processing on the node position updating process by using a simulated annealing algorithm; the real-time visualization and analysis requirements are met, the calculation efficiency of large-scale graph data can be remarkably improved, the convergence time is shortened, and the method has the advantages of being high in calculation speed, high in convergence stability and wide in application range.
Owner:ZHEJIANG UNIV

Time-domain electromagnetic field simulation calculation method based on GPU parallel acceleration and corresponding product

The application relates to the technical field of electromagnetic simulation, and provides a time-domain electromagnetic field simulation calculation method based on GPU parallel acceleration and a corresponding product.The method comprises the following steps: setting simulation parameters; precalculating physical coordinates of all grid points, generating an observation point coordinate array and a source point coordinate array, and transmitting the arrays to GPU device memory; initializing a GPU solver, allocating GPU memory resources, and configuring a CUDA thread block and a grid structure, so that the number of threads matches the number of observation points; for each time step corresponding to a time step, source field data of the current time step is asynchronously updated into a ring buffer; when the simulation time exceeds the time required for electromagnetic waves to propagate from a source area to an observation area, a GPU kernel function without atomic operation is started, the electromagnetic field values of each observation point are calculated in parallel based on the precalculated coordinate array and the source field data in the ring buffer; and the calculation results are transmitted from the GPU device back to the host end for storage and post-processing verification.
Owner:ROCKET FORCE UNIV OF ENG

Static Ftrace adaptation method and dynamic Ftrace adaptation method based on SW processor

The invention discloses a static Ftrace adaptation method and a dynamic Ftrace adaptation method based on a SW processor, and belongs to the technical field of computer system structures.In the process that a first kernel function calls a second kernel function, the static Ftrace adaptation method comprises the step that a static jump pile is inserted in front of an entry address of the second kernel function. The dynamic Ftrace adaptation method comprises the steps that a dynamic jump pile is inserted in front of an entry address of a second kernel function, an ftracemakecalall function is called to modify the dynamic jump pile into a null instruction, the null instruction is dynamically processed in response to user configuration processing, and if the second function is set as a tracking target, the null instruction is modified into the dynamic jump pile and executed; and if the second function is not set as the tracking target, executing the null instruction. The problem that an existing SW processor cannot track a kernel function and perform kernel debugging analysis is solved.
Owner:WUXI ADVANCED TECH RES INST

A performance optimization method and device for a graphics processor set communication operator

This invention relates to the field of high-performance computing and provides a method and apparatus for optimizing the performance of a graphics processing unit (GPU) aggregate communication operator. The method includes: allocating device-side storage space on the host side; copying the structured data to be communicated to the device-side storage space to obtain a target data pointer; adjusting the kernel function parameter of the aggregate communication operator from a structure type to a pointer type and passing the target data pointer; executing the kernel function on the GPU side, directly accessing the device-side storage space based on the target data pointer to complete the aggregate communication operation; and releasing the device-side storage space after the aggregate communication operation is completed. This invention solves the problem of excessive GPU register pressure and decreased cache hit rate caused by inefficient memory access instructions generated by the compiler to pass structure parameters in existing technologies. It avoids the generation of inefficient instructions, reduces register pressure, and improves execution efficiency.
Owner:SHANGHAI BIREN TECH CO LTD

Quantum cryptography calculation performance optimization method based on computer

The invention discloses a quantum cryptography calculation performance optimization method based on a computer, and particularly relates to the technical field of calculation performance optimization. The method comprises the following steps: constructing a vectorization execution graph by obtaining a vector instruction stream of a quantum cryptography calculation kernel and a polynomial coefficient memory access track; based on cross analysis of a cache line and a channel boundary, an easily distorted vector channel is positioned; then polynomial coefficient vectors are extracted at fixed time intervals, modulus consistency verification is carried out, and a channel verification sequence is obtained; determining a verification deviation threshold value through cross-channel difference and period detection, and generating a distortion trigger mark; shadow scalar complex calculation is started, point-by-point comparison with a vector result is carried out, and distortion correction mapping is obtained; and finally, executing instruction rearrangement and loading grouping adjustment according to the distortion correction mapping, and writing back a quantum cryptographic calculation kernel, so that the quantum cryptographic calculation performance is remarkably improved.
Owner:HUNAN UNIV

Operating system fault detection method based on time sequence prediction and root cause analysis

The invention relates to the technical field of operating system fault analysis, and provides an operating system fault detection method based on time sequence prediction and root cause analysis, which comprises the following steps: constructing a KPI tree based on system data and log data; traversing the KPI tree, executing the associated data acquisition command for each node, and updating an abnormal state identifier based on a real-time system performance index; in response to the abnormal state identifier, mapping the abnormal indexes in the KPI tree to a topological graph through a KPI-topological mapping dictionary, the topological graph representing an association relationship between physical components of the system; positioning an abnormal component in the topological graph based on mapping and outputting an abnormal dependency chain, using a BCC tool to hook a kernel function related to an abnormal index, collecting kernel call stack information, and performing root cause analysis based on the collected kernel call stack information; and a time sequence prediction model is used to predict system indexes, an early warning mechanism is triggered based on a prediction result, and the time sequence prediction model fuses dynamic characteristics based on a multi-scale recurrent neural network.
Owner:GUANGZHOU CITY UNIV OF TECH

Cross-kernel compatible eBPF weak sign function dynamic replacement method and system

The invention discloses a cross-kernel compatible eBPF weak sign function dynamic replacement method and system, and the method comprises the steps: traversing an eBPF program, screening out all signs which are provided with weak sign marks and are of a function type, obtaining the weak sign function information corresponding to each sign, and storing the weak sign function information in a meta-information data structural body; traversing and searching a kernel function matched with the signature of the weak sign function in the kernel BTF, marking the corresponding weak sign function as having the kernel function, and storing kernel function information into the meta-information data structural body; and when the eBPF program is loaded to a kernel, traversing all the call instructions, and judging whether the weak sign function corresponding to the function call instruction has kernel function implementation or not based on the meta-information data structure, if so, replacing the function call instruction with the call of the kernel function, otherwise, retaining the original function call instruction. According to the method and the device, the compatibility of the eBPF program in different kernel environments can be improved.
Owner:KYLIN CORP

System and method for reallocation of GPU power

A system for reallocating GPU power of a gaming console to non-gaming purposes, including a processor of the gaming console comprising a GPU and a memory on which are stored machine-readable instructions that when executed by the processor, cause the processor to: define a kernel function for matrix multiplication; pass three global memory pointers (A, B, and C) and an integer (N) as input arguments to the kernel function, wherein the arguments represent two matrices A and B being multiplied and their dimensions; calculate a product of the two matrices and store a result in an output matrix C; generate a control command queue based on the outputs of the kernel function for matrix multiplication; execute the control command queue to allocate memory on the GPU for the input and output matrices; copy the input matrices A and B from a gaming console memory to GPU memory; and execute a kernel on the GPU specifying a global work size for the kernel as a two-dimensional array.
Owner:HAWKINS JASON

Quantum computing with kernel methods for machine learning

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for quantum machine learning. In one aspect, the method includes obtaining, by a quantum computing device, a training dataset of quantum data points; computing, by the quantum computing device, a kernel matrix representing a similarity between quantum data points included in the training dataset, including computing a value of a kernel function for each pair of quantum data points in the training dataset, wherein the kernel function is based on a reduced density matrix of the quantum data points; and providing, by the quantum computing device, the kernel matrix to a classical processor, wherein the classical processor uses the kernel matrix to perform a training algorithm to construct a machine learning model.
Owner:GOOGLE LLC

A modeling method and system suitable for multiple geometry engines

ActiveCN117150588BAlgorithmModelSim
This invention relates to a modeling method and system adapted to multiple geometry engines, belonging to the field of geometric modeling technology. It solves the problems of existing geometric modeling methods, such as the inability to flexibly switch between multiple geometry engines and poor performance and maintainability. The method includes: constructing a geometry adaptation layer for each geometry engine by implementing data interfaces and general operation interfaces in a general interface layer, and encapsulating each layer into a dynamic link library; a geometry engine manager loading the dynamic link library of the default geometry engine; the geometry engine manager identifying whether the default geometry engine is the geometry engine to be executed; if not, switching to the geometry engine to be executed; otherwise, the default geometry engine is the geometry engine to be executed; reading geometric topology data; calling kernel functions in the geometry adaptation layer interface methods corresponding to the operation commands; writing the results to the geometric topology data; switching back to the default geometry engine; and reading the updated geometric topology data to complete the operation. This achieves more efficient and flexible geometric modeling.
Owner:PERA

Three-dimensional simulation automatic modeling method and system based on grid division

The invention discloses a three-dimensional simulation automatic modeling method and system based on mesh generation, and relates to the technical field of computer aided design, and the method comprises the steps: building a simulation initial model, carrying out the mesh generation of the simulation initial model, and obtaining a mesh generation model; extracting preset calculation parameters, and performing preliminary simulation on the grid division model to obtain a preliminary simulation model; and performing texture mapping on the simulation model to obtain a three-dimensional simulation automatic model. According to the method, grid division is conducted on an initial simulation model, comprehensive dynamic estimation is conducted on storage requirements of simulation data, authenticity and accuracy of the simulation model are guaranteed, preset calculation parameters are extracted, preliminary simulation is conducted on the grid division model, and simulation is conducted on the grid division model through a kernel function. Through rapid feedback of preliminary simulation, iterative optimization of the model is more efficient, texture mapping is carried out on the simulation model, texture mapping is further carried out on the model, and the visual details and the sense of reality of the model are increased.
Owner:YUNNAN POWER GRID CO LTD TRANSMISSION BRANCH

System and method for integrated compute kernel compilation and deployment

An example computing device includes: a memory storing a script comprising computer-executable instructions; a communications interface; a processor interconnected with the memory and the communications interface, the processor configured to: initiate execution of the script; and during the execution of the script: identify, within the script, a processing block to be executed on a target device; compile the processing block to machine code for execution on the target device; and deploy the machine code to the target device for execution.
Owner:AT-MEMORY COMPUTING LP

A network connection processing method, device, apparatus and storage medium

The application discloses a network connection processing method, device and equipment and a storage medium. The method comprises the following steps: obtaining relevant information of a network connection event through a kernel function, and storing the relevant information in a kernel map; reading process ID information of the relevant information from the kernel map; and obtaining network connection information of the network connection event from a network state file according to the process ID information. The embodiment of the application can realize real-time recording and tracking of network connection events in a terminal.
Owner:BEIJING ZHIZHANGYI TECH CO LTD

Kernel function credibility verification method and device, electronic equipment and storage medium

The application provides a kernel function credibility verification method and device, electronic equipment and storage medium, and relates to the field of trusted computing. The method comprises the following steps: receiving signature information sent by a kernel, wherein the signature information comprises a first hash value of a preset function loaded in a memory calculated by the kernel through a preset hash algorithm, and is obtained by signing the first hash value through a preset private key; analyzing the signature information according to a preset public key, and determining the first hash value in the signature information and the function name of the preset function; searching for a second hash value corresponding to the function name in a pre-stored file; and if the first hash value and the second hash value are consistent, determining that the preset function loaded in the memory is credible. The application can realize that the terminal system can not depend on specific hardware equipment when checking resource integrity, and can improve the efficiency of system checking.
Owner:PRANUS BEIJING TECH CO LTD