57 results about "Compute kernel" patented technology

The invention provides a kernel function trajectory-based deep learning inference service performance analysis method, which comprises the following steps of: based on service indexes and hardware theoretical computing power acquired from a production cluster, defining floating point operation times per request (FPR) index to quantify service resource efficiency, and identifying high FPR hotspot services; positioning a reasoning iteration candidate boundary based on a GPU kernel function trajectory, verifying iteration integrity through fingerprint matching and chi-square test, and calculating a second reasoning iteration number IIPS and a model reasoning efficiency MIE; aiming at calculation-intensive operators on the key path, combining a dynamic Roofline model to estimate an operator theoretical performance upper limit, and based on actual execution time, calculating efficiency and a BottleScore index to identify a key bottleneck operator; and outputting targeted optimization suggestions according to analysis results of service efficiency analysis, model efficiency analysis and operator efficiency analysis. According to the method, the inference behavior pattern can be automatically identified from massive kernel trajectories, and the efficiency loss of each level is quantified.

A method of serving a generative transformer model includes determining a batch size to use in processing inference requests and allocating at least one prompt pipeline and at least on token pipeline to the generative transformer model to process the batch of inference requests. The number of prompt pipelines and the number of token pipelines, and the depths of the pipelines are determined based on the batch size, an average prompt length, a cache requirement per stage, and a memory footprint of model weights for the generative model per stage using a resource allocator component of the model serving system. Cache streaming is used to stream prompt cache from prompt pipelines to token pipelines to generate tokens. Cache streaming involves gather-copy operations which may be performed using compute kernels.

The invention is suitable for the technical field of computers, and provides a CPU and GPU cooperative work heterogeneous computing method and platform, and the method comprises the following steps: S1, carrying out the meta-task analysis of an input computing task, extracting the computing feature metadata of the computing task, and predicting the performance of the computing task based on a pre-trained performance prediction model; dynamically deciding execution path planning of the task between the CPU and the GPU; s2, according to the execution path planning, carrying out adaptive resource collaborative configuration; and S3, on the basis of the calculation feature metadata and the current hardware state, through a parameterized kernel template or a just-in-time compilation technology, heterogeneous perception optimized kernel codes are generated. The method effectively solves the problems that a task scheduling strategy is rigid, the bottleneck of memory and data transmission is prominent, calculation kernel optimization is insufficient and is lack of adaptability, and a system is lack of self-evolution and learning ability.

The present disclosure provides a system and method for executing fused neural network layers using a graphics processing unit (GPU). The fused neural network layer combines multiple neural network operations into a single GPU kernel function, for efficient utilization of a GPU shared memory to reduce global memory transactions. The fused neural-network-layer system configures GPU thread blocks to iterate tiles in the GPU shared memory across portions of input tensors, and to perform a sequence of neural network layer operations using the tiles, before storing the results in an output tensor. The neural network layer operations can include element-wise, normalization, and pooling operations. The system also supports fused layers with nested traversals of input tensors, such as matrix multiplication, convolution, and attention mechanisms. The fused neural-network-layer system improves performance and reduces memory overhead compared to executing each layer as a separate GPU kernel, thereby enabling faster training and inference times.

The invention provides a method and a system for dynamically calling a kernel unexported function, which are used for dynamically acquiring a function address of an unexported kernel function and forcibly calling the function through a kProbes mechanism, matching with a function pointer type definition and a mechanism for forcibly converting the function address into a function pointer. The method not only supports the calling of the kernel function which is not exported, but also does not need to carry out hard coding on the address of the called kernel function, supports the dynamic acquisition of the address of the kernel function, avoids the change of the coincidence address caused by the difference of kernel versions, greatly enhances the compatibility of the software package of the kernel function which is not exported, and improves the reliability of the software package. And the packet does not need to be recompiled in each kernel small version, so that the problem that the kernel symbol table is not matched and the kernel module cannot be loaded is avoided.

The application relates to a service device and a database event processing method, which are applied to the technical field of databases, and the service device comprises a controller which is configured to: in the process of executing an SQL statement by a database process, enter a kernel state through a system call to execute a kernel function through a target CPU core; in the process of executing the kernel function, trigger a corresponding eBPF mounting point to run an eBPF program on the target CPU core; capture a target database event by executing the eBPF program; write target event data corresponding to the target database event into a target array buffer corresponding to the target CPU core; and in the case that event attribute information corresponding to the target array buffer meets a target condition, batch submit a plurality of event data in the target array buffer to a user state program. The performance overhead caused by frequent switching between the kernel state and the user state is reduced, and the running performance of the database itself is improved.

Dynamically pooled allocation of memory buffer on spatial compute architectures, including analyzing, at compile-time, access patterns (e.g., cyclo-static execution / firing rules) of consumer and / or producer processes that have shared access to local memory of one or more compute tiles, and identifying situations in which multiple buffers can be replaced with a pooled buffer having a memory footprint that is less than a sum of the memory footprints of the multiple buffers. A compiler may identify instances of mutual exclusiveness in the execution patterns of the processes, differences in execution times between compute kernels of the processes, and / or variations in execution times of the kernels. The compiler may generate controller code and / or configuration parameters to enforce memory allocation / mapping at application run-time.

The present application relates to the technical field of GPU computing optimization, and in particular to a sparse attention computing method, device and medium for GPU, wherein the method realizes the high efficiency of long context reasoning through the geometric perception sparse attention framework of ball hashing, and combines a large-scale parallel hashing optimization algorithm and a load adaptive computing kernel. Compared with the existing sparse attention methods based on heuristics or gradient learning, the present application realizes higher retrieval recall rate, lower preprocessing overhead and efficient hardware adaptation to irregular sparse patterns.

The invention discloses a graph structure force guided dynamic spring effect acceleration method based on GPU parallel computing. The method comprises the following steps: dividing three independent GPU kernel functions; a resource allocation strategy is adopted under the Ada architecture, and execution configuration is generated; introducing a thread coarsening method to generate an optimized kernel execution result; generating a node position calculation result by using a shared memory privatization method and a reduce operator fusion method in combination with an improved KIFMM algorithm; in the iterative updating stage, an iterative updating result of the node position is obtained; performing cooling processing on the node position updating process by using a simulated annealing algorithm; the real-time visualization and analysis requirements are met, the calculation efficiency of large-scale graph data can be remarkably improved, the convergence time is shortened, and the method has the advantages of being high in calculation speed, high in convergence stability and wide in application range.

The application relates to the technical field of electromagnetic simulation, and provides a time-domain electromagnetic field simulation calculation method based on GPU parallel acceleration and a corresponding product.The method comprises the following steps: setting simulation parameters; precalculating physical coordinates of all grid points, generating an observation point coordinate array and a source point coordinate array, and transmitting the arrays to GPU device memory; initializing a GPU solver, allocating GPU memory resources, and configuring a CUDA thread block and a grid structure, so that the number of threads matches the number of observation points; for each time step corresponding to a time step, source field data of the current time step is asynchronously updated into a ring buffer; when the simulation time exceeds the time required for electromagnetic waves to propagate from a source area to an observation area, a GPU kernel function without atomic operation is started, the electromagnetic field values of each observation point are calculated in parallel based on the precalculated coordinate array and the source field data in the ring buffer; and the calculation results are transmitted from the GPU device back to the host end for storage and post-processing verification.

This invention relates to the field of high-performance computing and provides a method and apparatus for optimizing the performance of a graphics processing unit (GPU) aggregate communication operator. The method includes: allocating device-side storage space on the host side; copying the structured data to be communicated to the device-side storage space to obtain a target data pointer; adjusting the kernel function parameter of the aggregate communication operator from a structure type to a pointer type and passing the target data pointer; executing the kernel function on the GPU side, directly accessing the device-side storage space based on the target data pointer to complete the aggregate communication operation; and releasing the device-side storage space after the aggregate communication operation is completed. This invention solves the problem of excessive GPU register pressure and decreased cache hit rate caused by inefficient memory access instructions generated by the compiler to pass structure parameters in existing technologies. It avoids the generation of inefficient instructions, reduces register pressure, and improves execution efficiency.

The invention discloses a quantum cryptography calculation performance optimization method based on a computer, and particularly relates to the technical field of calculation performance optimization. The method comprises the following steps: constructing a vectorization execution graph by obtaining a vector instruction stream of a quantum cryptography calculation kernel and a polynomial coefficient memory access track; based on cross analysis of a cache line and a channel boundary, an easily distorted vector channel is positioned; then polynomial coefficient vectors are extracted at fixed time intervals, modulus consistency verification is carried out, and a channel verification sequence is obtained; determining a verification deviation threshold value through cross-channel difference and period detection, and generating a distortion trigger mark; shadow scalar complex calculation is started, point-by-point comparison with a vector result is carried out, and distortion correction mapping is obtained; and finally, executing instruction rearrangement and loading grouping adjustment according to the distortion correction mapping, and writing back a quantum cryptographic calculation kernel, so that the quantum cryptographic calculation performance is remarkably improved.

The invention relates to the technical field of operating system fault analysis, and provides an operating system fault detection method based on time sequence prediction and root cause analysis, which comprises the following steps: constructing a KPI tree based on system data and log data; traversing the KPI tree, executing the associated data acquisition command for each node, and updating an abnormal state identifier based on a real-time system performance index; in response to the abnormal state identifier, mapping the abnormal indexes in the KPI tree to a topological graph through a KPI-topological mapping dictionary, the topological graph representing an association relationship between physical components of the system; positioning an abnormal component in the topological graph based on mapping and outputting an abnormal dependency chain, using a BCC tool to hook a kernel function related to an abnormal index, collecting kernel call stack information, and performing root cause analysis based on the collected kernel call stack information; and a time sequence prediction model is used to predict system indexes, an early warning mechanism is triggered based on a prediction result, and the time sequence prediction model fuses dynamic characteristics based on a multi-scale recurrent neural network.

The invention discloses a cross-kernel compatible eBPF weak sign function dynamic replacement method and system, and the method comprises the steps: traversing an eBPF program, screening out all signs which are provided with weak sign marks and are of a function type, obtaining the weak sign function information corresponding to each sign, and storing the weak sign function information in a meta-information data structural body; traversing and searching a kernel function matched with the signature of the weak sign function in the kernel BTF, marking the corresponding weak sign function as having the kernel function, and storing kernel function information into the meta-information data structural body; and when the eBPF program is loaded to a kernel, traversing all the call instructions, and judging whether the weak sign function corresponding to the function call instruction has kernel function implementation or not based on the meta-information data structure, if so, replacing the function call instruction with the call of the kernel function, otherwise, retaining the original function call instruction. According to the method and the device, the compatibility of the eBPF program in different kernel environments can be improved.

A system for reallocating GPU power of a gaming console to non-gaming purposes, including a processor of the gaming console comprising a GPU and a memory on which are stored machine-readable instructions that when executed by the processor, cause the processor to: define a kernel function for matrix multiplication; pass three global memory pointers (A, B, and C) and an integer (N) as input arguments to the kernel function, wherein the arguments represent two matrices A and B being multiplied and their dimensions; calculate a product of the two matrices and store a result in an output matrix C; generate a control command queue based on the outputs of the kernel function for matrix multiplication; execute the control command queue to allocate memory on the GPU for the input and output matrices; copy the input matrices A and B from a gaming console memory to GPU memory; and execute a kernel on the GPU specifying a global work size for the kernel as a two-dimensional array.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for quantum machine learning. In one aspect, the method includes obtaining, by a quantum computing device, a training dataset of quantum data points; computing, by the quantum computing device, a kernel matrix representing a similarity between quantum data points included in the training dataset, including computing a value of a kernel function for each pair of quantum data points in the training dataset, wherein the kernel function is based on a reduced density matrix of the quantum data points; and providing, by the quantum computing device, the kernel matrix to a classical processor, wherein the classical processor uses the kernel matrix to perform a training algorithm to construct a machine learning model.

This invention relates to a modeling method and system adapted to multiple geometry engines, belonging to the field of geometric modeling technology. It solves the problems of existing geometric modeling methods, such as the inability to flexibly switch between multiple geometry engines and poor performance and maintainability. The method includes: constructing a geometry adaptation layer for each geometry engine by implementing data interfaces and general operation interfaces in a general interface layer, and encapsulating each layer into a dynamic link library; a geometry engine manager loading the dynamic link library of the default geometry engine; the geometry engine manager identifying whether the default geometry engine is the geometry engine to be executed; if not, switching to the geometry engine to be executed; otherwise, the default geometry engine is the geometry engine to be executed; reading geometric topology data; calling kernel functions in the geometry adaptation layer interface methods corresponding to the operation commands; writing the results to the geometric topology data; switching back to the default geometry engine; and reading the updated geometric topology data to complete the operation. This achieves more efficient and flexible geometric modeling.

The invention discloses a three-dimensional simulation automatic modeling method and system based on mesh generation, and relates to the technical field of computer aided design, and the method comprises the steps: building a simulation initial model, carrying out the mesh generation of the simulation initial model, and obtaining a mesh generation model; extracting preset calculation parameters, and performing preliminary simulation on the grid division model to obtain a preliminary simulation model; and performing texture mapping on the simulation model to obtain a three-dimensional simulation automatic model. According to the method, grid division is conducted on an initial simulation model, comprehensive dynamic estimation is conducted on storage requirements of simulation data, authenticity and accuracy of the simulation model are guaranteed, preset calculation parameters are extracted, preliminary simulation is conducted on the grid division model, and simulation is conducted on the grid division model through a kernel function. Through rapid feedback of preliminary simulation, iterative optimization of the model is more efficient, texture mapping is carried out on the simulation model, texture mapping is further carried out on the model, and the visual details and the sense of reality of the model are increased.

An example computing device includes: a memory storing a script comprising computer-executable instructions; a communications interface; a processor interconnected with the memory and the communications interface, the processor configured to: initiate execution of the script; and during the execution of the script: identify, within the script, a processing block to be executed on a target device; compile the processing block to machine code for execution on the target device; and deploy the machine code to the target device for execution.

The application discloses a network connection processing method, device and equipment and a storage medium. The method comprises the following steps: obtaining relevant information of a network connection event through a kernel function, and storing the relevant information in a kernel map; reading process ID information of the relevant information from the kernel map; and obtaining network connection information of the network connection event from a network state file according to the process ID information. The embodiment of the application can realize real-time recording and tracking of network connection events in a terminal.

This application provides an image processing method, apparatus, device, and medium based on element-wise operations, relating to the field of GPU technology. The method includes: determining the number of thread blocks required for the element-wise operations of the multiple input tensors based on the number of elements contained in the multiple input tensors to participate in the operations and the hardware resource information of the GPU device; determining the kernel function of the element-wise operation class operator corresponding to the multiple input tensors to participate in the operations based on the number of thread blocks, the number of elements, and the memory layout of the multiple elements, using a predefined template structure, wherein the parameters of the template structure include element type and number of elements; and initiating multiple threads based on the number of thread blocks, so that the multiple threads, according to the kernel function, obtain the multiple elements and execute the element-wise operation process of the multiple input tensors to obtain the image processing result.

The invention discloses an error correction code decoding method, a test system and a computer program product, and relates to the field of storage firmware error correction, the method is applied to a large-scale parallel processor, and the method comprises the following steps: receiving a coding bit of an error correction code to be decoded; the coding bits are obtained by carrying out coding modulation on original data used for simulation testing by the host end; distributing the coded bits to a plurality of stream processors, and using the plurality of stream processors to execute decoding operation on the coded bits in parallel; in any stream processor, a computing kernel is distributed for the processing stage of the decoding operation, and the computing kernel is used for executing the processing task of the corresponding processing stage in parallel. A multi-level task parallel processing mode of inter-stream parallel and intra-stream parallel is adopted, and a parallel architecture of a large-scale parallel processor is fully utilized for decoding, so that the decoding performance simulation time consumption of error correction codes is reduced, and the simulation efficiency is improved.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for improving efficiency of neural network computations using adaptive tensor compute kernels. First, the adaptive tensor compute kernels may adjust shapes according to the different shapes of input / weight tensors for distributing the weights and input values to a processing elements (PE) array for parallel processing. Depending on the shape of the tensor compute kernels, additional inter-cluster or intra-cluster adders may be needed to perform convolution computations. Second, the adaptive tensor compute kernels may support two different tensor operation modes, i.e., 1x1 tensor operation mode and 3x3 tensor operation mode, to cover all types of convolution computations. Third, the underlying PE array may configure each PE-internal buffer (e.g., a register file) differently to support different compression ratios and sparsity granularities of sparse neural networks.

System, process and device configurations are provided for analyzing and modifying a game environment. A method can include generating at least one game scenario for an electronic game including control settings for an audio configuration, a video configuration and a gameplay configuration. The method may include outputting the at least one game scenario using the control settings, and detecting user interest for the at least one game scenario. User interest for the at least one game scenario may be detected using a kernel function including a kernel element for each of a visual style, an audio style and a gameplay style. User profile data may be updated for the at least one user based on detected user interest for the at least one game scenario. Output of a game state may be controlled for the electronic game using the user profile.

The invention discloses a method for preventing a malicious code from being executed by a hook kernel function in a Linux kernel based on a kprobe / ftrace technology, which comprises the following steps of: loading a kernel module written by using the kprobe / ftrace technology into the Linux kernel, and hooking the Linux kernel functions, namely, secure bprmcheck and dodentryopen; configuring a malicious code library and a system interpreter library in a kernel of the Linux system; intercepting the secure bprmcheck at the hook point, collecting the feature code of the execution program to be started, querying whether the feature code is in a malicious code library, and if so, stopping the starting of the execution program to be started; if not, collecting information of a process corresponding to the program which is successfully started and executed, and storing the information in a process information base, namely a PLIB; and for the interpreted program, intercepting a dodentryopen, querying whether a program corresponding to the current process is in a system interpreter library, and if so, querying whether a file which is being opened in the current process is in a malicious code library. According to the method, under the Linux system, a kernel module, a hook kernel function secritybprmcheck and a dodentryopen are written by utilizing a kprobe / ftrace technology in a kernel, so that the execution of malicious codes in the kernel is prevented.

The application discloses a general sparse computing adaptation method and system for multi-source heterogeneous data, and relates to the technical field of multi-source data computing. The method comprises the following steps: acquiring multi-source heterogeneous data, analyzing the multi-source heterogeneous data to obtain a unified format generalized coordinate sequence, screening an effective position set from the generalized coordinate sequence through an initially preset sparsification parameter, and constructing a unified sparse batch structure; analyzing a computation graph of a target neural network and identifying at least one dense operator node, and reconstructing the dense operator node into a dynamic routing node with double-path execution capability; monitoring a sparsity index of the unified sparse batch structure in real time, combining a data dimension and a hardware performance evaluation mechanism, evaluating an estimated comprehensive performance under a sparse computing kernel path to obtain an evaluation result, and dynamically selecting an execution path based on the evaluation result. The application can effectively improve the efficiency and precision of the sparse computing adaptation process.

The invention belongs to the technical field of aircraft performance testing, and discloses an aircraft performance software calculation kernel test analysis tool and method, and the tool comprises a task management module, a task generation module, a calculation triggering module, a result generation module, a difference comparison module and a log generation module. The invention aims to construct a special test analysis tool and method for an aircraft performance software calculation kernel, solve the defect that aircraft performance software can only issue test tasks through event-to-event input of a user interface, and establish calculation task sets in batches according to professional task condition combination rules. According to a professional task execution calling rule, directly triggering an aircraft performance software calculation kernel to generate calculation result sets in batches, and according to professional information and an error screening rule, carrying out batch comparison on a test calculation result set and a standard calculation result set; a bottom-layer model database can be changed in real time, a bottom-layer simulation constraint library can be changed in real time, a calculation kernel (a simulation model and calculation logic) can be changed in real time, a calculation task set (a test service) can be changed in real time, a plurality of test result sets can be established in real time, the test result sets are compared with a standard result set, and different cases and different contents are prompted; and the test efficiency and effect of the aircraft performance software computing kernel are improved.

Dynamically pooled allocation of memory buffer on spatial compute architectures, including analyzing, at compile-time, access patterns (e.g., cyclo-static execution / firing rules) of consumer and / or producer processes that have shared access to local data memory of one or more compute tiles, and identifying situations in which multiple buffers can be replaced with a pooled buffer having a memory footprint that is less than a sum of the memory footprints of the multiple buffers. A compiler may identify instances of mutual exclusiveness in the execution patterns of the processes, differences in execution times between compute kernels of the processes, and / or variations in execution times of the kernels. The compiler may generate controller code and / or configuration parameters to enforce memory allocation / mapping at application run-time.

The application discloses a grid Xin'anjiang model parallel method based on compact index and CUDA graph, constructs a downstream one-dimensional index array next and a layered compact index table based on flow direction and calculation level information, realizes compact thread mapping of effective grid of river confluence according to layers, adopts GPU memory pool one-time allocation and offset division of model calculation variable and storage area of river confluence accumulator on the GPU side, combines CPU lock page memory double buffering and GPU double buffering, realizes driving data transmission and calculation overlap in asynchronous transmission flow and calculation flow, simultaneously, through stream capture, instantiates a start sequence of a layered river confluence kernel function into an executable CUDA graph, only updates parameters and starts execution during period iteration, reduces CPU layer-by-layer start overhead, and realizes concurrent consistent accumulation of upstream boundary inflow and upstream and downstream confluence by using double-precision atomic addition.

The invention relates to the technical field of malicious software monitoring, and discloses an AI-driven malicious software real-time monitoring method in a network space. The AI-driven malicious software real-time monitoring method in the cyberspace comprises the following steps: collecting multi-dimensional kernel behavior data; performing kernel behavior semantic conversion and model construction; performing malicious software clustering analysis based on behavior characteristics; according to the method, five sub-modules, namely a process thread, a registry, a file system, a network and a system service, are integrated through a distributed monitoring engine, core behaviors (such as process creation, file tampering and network communication) of the whole life cycle of malicious software are directionally captured, the problem of missing detection of single-dimensional monitoring is avoided, and all-directional tracking of malicious behaviors is realized; a fuzzy kernel function call log is converted into a structured model containing BEHAVIOR, ARGBLOCK, TARGET and HANDLE, a behavior type is accurately defined through class target identification and operation identification, and a high-quality feature basis is provided for subsequent clustering.