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31 results about "Half-integer" patented technology

In mathematics, a half-integer is a number of the form n+1/2, where n is an integer. For example, 4½, 7/2, −13/2, 8.5 are all half-integers. Half-integers occur frequently enough in mathematical contexts that a special term for them is convenient. Note that a half of an integer is not always a half-integer: half of an even integer is an integer but not a half-integer. The half-integers are precisely those numbers that are half of an odd integer, and for this reason are also called the half-odd-integers.

Liquid crystal display device

The invention discloses a backlight module, and belongs to the technical field of liquid crystal display. The backlight module comprises LED light sources and an angle selection sheet, wherein the angle selection sheet is located on the light-out side of the LED light sources; the angle selection sheet comprises multiple diaphragms which are arranged in a stacked mode; the thicknesses and the refractive indexes of the diaphragms are designed according to the relationships of the optical path difference and the wavelengths of the light sources, wherein the optical path difference of light at afirst angle is a half-integer multiple of the wavelength of the corresponding light source, and the optical path difference of light at a second angle is an integer multiple of the wavelength of the corresponding light source; in the light emitted by the backlight sources, the light at the first angle is diverged outwards through the angle selection sheet, and the light at the second angle is reflected and then passes through the angle selection sheet again until the light is at the first angle. According to the backlight module, by designing the angle selection sheet, the light emitted by thebacklight sources is transferred into small-angle backlight at the preset angle, and the small-angle backlight can completely enter corresponding quantum dot units, so that the light-out collimationdegree is improved, and crosstalk among pixels of a quantum-dot liquid crystal panel is prevented.
Owner:HISENSE VISUAL TECH CO LTD

Method for detecting and correcting clock error lock of CPM signal greater than 1 modulation index

The invention discloses a method for detecting and correcting a clock error lock of a CPM signal greater than 1 modulation index. When the modulation index of the CPM signal is a half integer greaterthan 1, a signal has a plurality of positive slope zero-crossing points in half of code element time through an S curve of the delay locking ring; mistaken locking of the delay locking ring is caused.An error detection decision device is introduced to detect whether the tracking ring is locked mistakenly. When error lock occurs, the output of an error accumulator in the error detection decision device can exceed a set threshold. A judgment is made that the delay locked loop has error locking. The delay to a correct locking interval is pushed through an error detector and the value of an erroraccumulator is reset to be 0 under the condition of setting an appropriate threshold value, an appropriate weighting coefficient and an appropriate propelling interval, and the tracking loop enters acorrect tracking process. Through verification on a Matlab platform, under the condition of different modulation indexes, the error detection decision device can correctly judge the false lock and enable the delay locking ring to enter a correct locking interval again.
Owner:NANJING UNIV OF AERONAUTICS & ASTRONAUTICS

Integer and half-integer frequency divider based on characteristic state feedback

The invention belongs to the technical field of frequency dividers of integrated circuits, and particularly provides an integer and half-integer frequency divider based on characteristic state feedback. The frequency divider comprises a clock phase inverter, an N-bit binary counter, an output clock selector and a feedback controller; and the feedback controller comprises a level type characteristic state decoder, a triggering type characteristic state decoder, a level type inverter and a triggering type inverter. According to the frequency divider, by feeding back characteristic states determined by a frequency division coefficient and conducting phase processing on an input clock, the binary counter is triggered at the edge designated by a to-be-divided clock, and the counting bit corresponding to the frequency division coefficient is selected and output to serve as a frequency division clock; and only an interface signal of the binary counter needs to be processed, the internal structure of the binary counter does not need to be changed, the advantages of being simple in design and high in universality are achieved, and not only can complete integer and semi-integer frequency division be achieved, but also the duty ratio of the frequency division clock can be adjusted by taking a 0.5 input clock cycle as the precision.
Owner:FUDAN UNIV

X-ray source scanning parameter adjustment method and device, computer equipment and readable storage medium

The invention provides an X-ray source scanning parameter adjustment method. The method comprises the steps that X-ray source scanning parameters are obtained, wherein the X-ray source scanning parameters comprise a rotation period of a target disk and an energy period of an X-ray source; the ratio of the rotation period to the energy period is determined; if the ratio does not satisfy a preset condition, the X-ray source scanning parameters are adjusted, so that the ratio satisfies the preset condition; the preset condition is a first preset condition or a second preset condition, wherein thefirst preset condition is that the ratio of the rotation period to the energy period is not equal to an integer, and the second preset condition is that the ratio of the rotation period to the energyperiod is equal to a half integer. The provided X-ray source scanning parameter adjustment method has the advantages that by adjusting the rotation period of an anode target disk and the energy cycleof the X-ray source, the rotation period of the anode target disk is not an integral multiple of the energy period of the X-ray source, thereby avoiding the occurrence of an 'anode target disk energybeat frequency phenomenon', reducing the thermal deformation of the anode target disk, and prolonging the service life of the anode target disk.
Owner:SHANGHAI UNITED IMAGING HEALTHCARE

Spread spectrum CPM signal capturing method with modulation index h being more than 1 and being half integer

In the capturing process of a CPM signal with a modulation index h being more than 1 and being a half integer, due to the fact that a correlation function of the CPM signal has the multi-peak characteristic, the problem of false capturing can happen, and the spread spectrum CPM signal is captured by applying a Bump Jump algorithm to correlation function peak detection of the spread spectrum CPM signal with the modulation index larger than 1. A secondary peak detection method of the spread spectrum CPM signal based on collision jump is provided aiming at the influence of the low signal-to-noise ratio on zero point dislocation of main detection and auxiliary detection functions, when a receiver detects a secondary peak, judgment and processing are carried out, an estimated code phase jumps towards the direction of a main peak, and finally the position of the main peak is determined. Verification is carried out on a Matlab platform, a detection algorithm based on collision jump is suitable for capture of spread spectrum CPM signals, the detection performance of the algorithm is improved by about 4 dB compared with that of a Bump Jump algorithm under the condition of a low signal-to-noise ratio, and capture of the spread spectrum CPM signals under the condition of the low signal-to-noise ratio can be more effectively achieved.
Owner:NANJING UNIV OF AERONAUTICS & ASTRONAUTICS

An Integer and Half Integer Frequency Divider Based on Eigenstate Feedback

The invention belongs to the technical field of frequency dividers of integrated circuits, and particularly provides an integer and half-integer frequency divider based on characteristic state feedback. The frequency divider comprises a clock phase inverter, an N-bit binary counter, an output clock selector and a feedback controller; and the feedback controller comprises a level type characteristic state decoder, a triggering type characteristic state decoder, a level type inverter and a triggering type inverter. According to the frequency divider, by feeding back characteristic states determined by a frequency division coefficient and conducting phase processing on an input clock, the binary counter is triggered at the edge designated by a to-be-divided clock, and the counting bit corresponding to the frequency division coefficient is selected and output to serve as a frequency division clock; and only an interface signal of the binary counter needs to be processed, the internal structure of the binary counter does not need to be changed, the advantages of being simple in design and high in universality are achieved, and not only can complete integer and semi-integer frequency division be achieved, but also the duty ratio of the frequency division clock can be adjusted by taking a 0.5 input clock cycle as the precision.
Owner:FUDAN UNIV
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