32 results about "Half-integer" patented technology

When detecting light scattered by an object to be inspected by using a pulse laser as a light source, noise increases unless a sampling repletion period of an A / D converter is determined so as to be related to a pulse oscillation repetition period of the light source. (1) The sampling repletion period of the A / D converter is set equal to the pulse oscillation repetition period of the light source or an integer times thereof, and the sampling is synchronized with oscillation of the light source. Or (2) the sampling repletion period of the A / D converter is set equal to a half-integer times the pulse oscillation repetition period of the light source. Even if a ripple component resulting from emission pulses of the light source remains in the scattered light signal supplied to the A / D converter remains, therefore, its influence can be eliminated or reduced.

A interferometer type polarization beam combiner and splitter, which can combine or split polarized light over a wide band, is provided. The interferometer type polarization beam combiner and splitter includes: an optical splitter; an optical coupler; an optical path length difference imparting unit, which includes a plurality of optical waveguides arranged between the optical splitting unit and the optical coupling unit; one or two input / output ports connected to the optical splitter; and two input / output ports connected to the optical coupler. A half-integer of a wavelength of λc is set as a normalized phase difference, for the optical path length difference imparting unit, between two polarization states, and means for generating a difference in refractive index dispersion is provided between the optical waveguides of the optical path length difference imparting unit, so that the change rate of the transmittance with respect to wavelength is suppressed for the two polarization states.

A system and a method generate clock signals using an output divider with modulus steps of half-integers (i.e., the output circuit includes a divider which divides by one or more of 2, 2.5, 3, 3.5, 4 . . . ).

The invention belongs to the technical field of frequency dividers of integrated circuits, and particularly provides an integer and half-integer frequency divider based on characteristic state feedback. The frequency divider comprises a clock phase inverter, an N-bit binary counter, an output clock selector and a feedback controller; and the feedback controller comprises a level type characteristic state decoder, a triggering type characteristic state decoder, a level type inverter and a triggering type inverter. According to the frequency divider, by feeding back characteristic states determined by a frequency division coefficient and conducting phase processing on an input clock, the binary counter is triggered at the edge designated by a to-be-divided clock, and the counting bit corresponding to the frequency division coefficient is selected and output to serve as a frequency division clock; and only an interface signal of the binary counter needs to be processed, the internal structure of the binary counter does not need to be changed, the advantages of being simple in design and high in universality are achieved, and not only can complete integer and semi-integer frequency division be achieved, but also the duty ratio of the frequency division clock can be adjusted by taking a 0.5 input clock cycle as the precision.