Patents
Literature
Hiro is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Hiro

39 results about "Chua's circuit" patented technology

Chua's circuit (also known as a Chua circuit) is a simple electronic circuit that exhibits classic chaotic behavior. This means roughly that it is a "nonperiodic oscillator"; it produces an oscillating waveform that, unlike an ordinary electronic oscillator, never "repeats". It was invented in 1983 by Leon O. Chua, who was a visitor at Waseda University in Japan at that time. The ease of construction of the circuit has made it a ubiquitous real-world example of a chaotic system, leading some to declare it "a paradigm for chaos".

Programmable chaos generator and process for use thereof

A chaotic signal generator includes a set of elements connected together for generating chaotic signals. The connection scheme may correspond to the circuit generally referred to as Chua's circuit, particularly when implemented as a cellular neural network. Interposed in the connection scheme is at least one switch, such as a MOS transistor. Opening and closing of the switch causes variation in the chaotic dynamics of the generated signals. A command signal applied to the switch may correspond to a modulating signal for transmission on a channel, such as a high noise channel. The modulating signal may be a binary signal, and the command signal may be a switching signal having a frequency that increases or decreases depending on the logic level of the binary signal.
Owner:STMICROELECTRONICS SRL

Chua's circuit and it's use in hyperchaotic circuit

The present invention provides an improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising a dual output current conveyer based inductor having one grounded terminal, a capacitor connected across the second terminal of said inductor, a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.
Owner:STMICROELECTRONICS PVT LTD

Image compressed encryption method based on compressed sensing and Chua's circuit

InactiveCN108235029AResistance to Differential AttacksRandomDigital video signal modificationPattern recognitionImage compression
The invention discloses an image compressed encryption method based on compressed sensing and a Chua's circuit. The method comprises the following steps of 1, generating a key related to plaintext according to an original image by using SHA-256; 2, performing iteration on initial values x02 and a02 to generate a chaos sequence t' and t'', and generating measurement matrixes FORMULA and FORMULA through performing iteration on t' and t''; 3, measuring sub-bands LH, HH and HL by different compression ratios; 4, quantizing to acquire an integer sequence z, and forming a matrix z'; 5, acquiring a diffusion matrix f'; 6, acquiring a matrix LL', and performing an XOR operation on the diffusion matrix f'; and 7, combining four sub-bands such as LL, LH, HL and HH, and scrambling the chaos sequencegenerated by x04 and a04 to acquire a final compressed encryption image E. According to the method the data transmission quantity can be reduced, the robustness of the image can also be enhanced, thesecurity is high, and particularly, the method is good in performance when being used for resisting shearing attacks and noise attacks.
Owner:GUANGXI NORMAL UNIV

Chaotic encryption method and system based on three-dimensional probability forming

The invention discloses a chaotic encryption method based on three-dimensional probability forming, which comprises the following steps: after carrying out serial-parallel change on to-be-encrypted data, mapping the data to each constellation point of three-dimensional probability forming; and masking the constellation diagram of three-dimensional probability forming by utilizing a chaotic model of the Chua's circuit and a Lorentz chaotic model, wherein the Chua's chaotic model and the Lorentz model are respectively adopted for masking according to different distances from each constellation point to an original point, so that the constellation diagram of three-dimensional probability forming is changed into two spherical shells. According to the invention, after spherical three-dimensional probability forming, the transmitting power of the whole system can be greatly reduced, and a new carrier after probability forming has Gaussian energy distribution and is more suitable for transmission of an optical signal in an optical fiber channel; and the Chua's circuit model and the Lorentz model are used for chaotic mapping, compared with a traditional masking mode, the encryption effectis good, and larger key space and higher flexibility are provided.
Owner:NANJING UNIV OF INFORMATION SCI & TECH

Security-level-controllable carrier, constellation and mode multi-chaos masking light transmission method

The invention provides a security-level-controllable carrier, constellation and mode multi-chaos masking light transmission method, which comprises the following steps of: performing serial-parallel change on data, and mapping the data to each constellation point; masking the three-dimensional constellation diagram by using a Chua's chaotic model, so that the three-dimensional constellation pointsare converted into a sphere; then, the Lorentz model being used for masking the subcarrier and the orthogonal mode, meanwhile, parameters of the Lorentz model and the Chua's circuit model being modulated, and therefore security level controllability of chaotic encryption being achieved. At the receiving end, an original Chua's circuit and an original Lorentz model secret key are used for decrypting the chaotic constellation diagram. The signals decrpted by the receiving end are compared with the transmitting end, thus to calculate the system error ratio, thereby judging the system performance. By the control over the parameters a chaos model, encryption of one dimension or multiple dimensions can be conducted, thus security classification can be achieved. According to different conditions, high-security transmission is realized at the lowest encryption cost.
Owner:NANJING UNIV OF INFORMATION SCI & TECH

Simple second order non-autonomous memristor chaotic signal generator

The invention discloses a simple second order non-autonomous memristor chaotic signal generator, consisting of a memristor driven by a standard sinusoidal voltage signal and a capacitor parallel circuit. The circuit only comprises two dynamic elements, namely a capacitor C1 and a memristor W. The essence of the simple second order non-autonomous memristor chaotic signal generator disclosed by the invention is to replace a passive LC oscillator in a memristor Chua's circuit by using the standard sinusoidal voltage signal to constitute a simple and novel chaotic signal generator, and a chaotic attractor, a periodic limit cycle and other complex phenomena can be generated by adjusting the parameters of the circuit. The circuit is simple in structure, strong in stability and significant in chaotic properties, and plays a relatively large promotion function to the application development of the memristor circuit.
Owner:CHANGZHOU UNIV

Negative resistance equivalence method for Chua's chaotic circuits

InactiveCN103236918ARealize the equivalent method of negative resistanceReduce voltageSecuring communicationSingle electronEngineering
The invention relates to a negative resistance equivalence method for Chua's chaotic circuits. The method includes: utilizing negative differential resistance (NDR) characteristics of a hybrid structure device (SETMOS (single electron transistor metal oxide semiconductor)) of an SET and an MOS to realize a nonlinear function of a chaotic circuit, and applying the nonlinear function to a Chua's circuit to replace negative resistance. Stimulation of the circuit shows that the method is effective, the circuit is easy to realize, output signals have wide dynamic range, and the method is expected to have wide application prospect and important application value in fields of radar, secret communication, electronic countermeasure and the like.
Owner:王少夫

Safety light access method based on two-stage spherical constellation masking

ActiveCN111417038AImplement rotation encryptionImplement scalable encryptionMultiplex system selection arrangementsSecuring communication by chaotic signalsAlgorithmThree-dimensional space
The invention relates to a safety light access method based on two-stage spherical constellation masking, which comprises the following steps: taking a Chua's circuit model as a first chaotic model for generating a first-stage masking factor based on constellation rotation; taking the Logistic model as a second chaotic model for generating a secondary masking factor based on constellation scaling;applying the two levels of masking factors to three-dimensional CAP encryption modulation; three-dimensional CAP decryption demodulation. According to the method disclosed in the invention, the two chaotic models are combined to respectively realize multi-chaotic combined encryption on constellation rotation and amplitude transformation, and therefore the safety performance of the optical accesssystem can be more effectively improved. Meanwhile, constellation masking is three-dimensional constellation encryption in a three-dimensional space; compared with a two-dimensional constellation, three-dimensional constellation is advantageous in that dimension improvement enables encryption transformation to be more flexible, the safety performance of a physical layer after constellation encryption is greatly improved, the Euclidean distance between three-dimensional constellation points is larger, and the bit error rate performance of the system is improved.
Owner:NANJING UNIV OF INFORMATION SCI & TECH

Adaptive synchronization method and adaptive synchronization circuit of y<2>-contained Chen hyper-chaotic system based on memristor

The present invention relates to a chaotic system synchronization method and a circuit, particularly to an adaptive synchronization method and adaptive synchronization circuit of y<2>-contained Chen hyper-chaotic system based on memristor. The memristor, served as a new physical component found by the HP labs in 2008, may take the place of the Chua's diode in the Chua's circuit to form the chaotic system, and also may be a component to be added into the three-dimensional chaotic systems, such as a Lorenz system, a Chen system and a Lorenz system, in order to form the hyper-chaotic system At present, the method and the circuit of serving the memristor as a component to form the choas or the hyper choas have come up, but the synchronization method of serving the memristor as a component to form the hyper-chaotic system has not yet come up, so that there is provided an inadequacy in the prior art. According to the invention, the y<2>-contained Chen hyper-chaotic system based on the memristor is put forward, and on this basis the adaptive synchronization method of y<2>-contained Chen hyper-chaotic system is provided.
Owner:王春梅

Memristor chaotic circuit based on Chua's circuit

ActiveCN108806427AChange Chaos CharacteristicsEducational modelsIntegratorAudio power amplifier
The invention relates to a memristor chaotic circuit based on the Chua's circuit, which is characterized in that a first operational amplifier A1, a second operational amplifier A2 and a third operational amplifier A3 constitute a linear phase-reversing integrator, a fourth operational amplifier A4 constitutes a linear phase-reversing amplifier, and the output ends of the first operational amplifier A1, the fourth operational amplifier A4, the third operational amplifier A3 and a sixth operational amplifier A6 are respectively a chaotic signal output end X1, a chaotic signal output end X2, a chaotic signal output end X3 and a chaotic signal output end U; a phase-reversing integrator A1 is connected with a phase-reversing integrator A2, a phase-reversing integrator A6 and a second analog multiplier M2; the phase-reversing integrator A2 is connected with the first operational amplifier A2 and the fourth operational amplifier A4; the phase-reversing integrator A3 is connected with the phase-reversing integrator A2; the A1, A2, A3 and A4 constitute a third-order dynamic integrator circuit; and the A5, A6, M1 and M2 constitute a memristor circuit. Disclosed by the invention is a chaoticcircuit which can output various waveforms, phase diagrams and chaotic evolution curves of a memristor chaotic circuit based on the Chua's circuit and can form a chaotic secure communication system.
Owner:HEXI UNIV

High-security transmission method based on three-dimensional constellation dual encryption

The invention discloses a high-security transmission method based on three-dimensional constellation dual encryption. The method comprises the following steps ofperforming serial-parallel conversion on binary data of a transmitting end,performing constellation mapping on the three-dimensional data to form constellation points,generating a constellation point displacement vector and a rotation vector by using a chaotic sequence of the Chua's chaotic model, and performing displacement transformation and rotation transformation on the three-dimensional constellation point,processing the encryptedthree-dimensional signal by utilizing three-dimensional carrier-free amplitude phase modulation, superposing the processed three-dimensional signal into a single-path signal, and transmitting the single-path signal in a channel,and demodulating the received signal at a receiving end to finally obtain original data. A Chua's circuit model is utilized to generate a chaotic sequence to perform displacement and rotation change on the position of a constellation point, so that twice encryption of a constellation diagram is realized, and the safety performance of the system is effectively improved;and the transmission capability of the system is effectively improved by utilizing the high gain index and the high anti-noise performance of the constellation.
Owner:NANJING UNIV OF INFORMATION SCI & TECH

Adaptive synchronization method and circuit of memristor-based x-power-including Chen hyper-chaotic system

The invention relates to a chaotic system synchronization method and circuit, in particular to an adaptive synchronization method and circuit of a memristor-based x-power-including Chen hyper-chaotic system. As a physical element being newly discovered by the HP Labs in 2008, a memristor can construct a chaotic system instead of a Chua's diode in a Chua's circuit, and can be added into a three-dimensional chaotic system such as a Lorenz system, a Chen system and a Lorenz system as an element, thereby forming a hyper-chaotic system. At present, a method and a circuit for forming chaos or hyper-chaos by taking the memristor as an element are already put forward. However, a synchronization method for forming the hyper-chaos system by taking the memristor as an element is not put forward yet, which is a defect in the prior art. The invention provides the x-power-including Chen hyper-chaotic system by using the memristor, and provides the adaptive synchronization method of the chaotic system on the basis.
Owner:王春梅

Memristor chaotic circuit based on Chua's circuit

ActiveCN108806427BChange Chaos CharacteristicsEducational modelsIntegratorBinary multiplier
The invention relates to a memristor chaotic circuit based on the Chua's circuit, which is characterized in that a first operational amplifier A1, a second operational amplifier A2 and a third operational amplifier A3 constitute a linear phase-reversing integrator, a fourth operational amplifier A4 constitutes a linear phase-reversing amplifier, and the output ends of the first operational amplifier A1, the fourth operational amplifier A4, the third operational amplifier A3 and a sixth operational amplifier A6 are respectively a chaotic signal output end X1, a chaotic signal output end X2, a chaotic signal output end X3 and a chaotic signal output end U; a phase-reversing integrator A1 is connected with a phase-reversing integrator A2, a phase-reversing integrator A6 and a second analog multiplier M2; the phase-reversing integrator A2 is connected with the first operational amplifier A2 and the fourth operational amplifier A4; the phase-reversing integrator A3 is connected with the phase-reversing integrator A2; the A1, A2, A3 and A4 constitute a third-order dynamic integrator circuit; and the A5, A6, M1 and M2 constitute a memristor circuit. Disclosed by the invention is a chaoticcircuit which can output various waveforms, phase diagrams and chaotic evolution curves of a memristor chaotic circuit based on the Chua's circuit and can form a chaotic secure communication system.
Owner:HEXI UNIV

CMOS (Complementary Metal-Oxide-Semiconductor) inverter pair based method and circuit for designing high-speed chaotic oscillator

InactiveCN101964630BOvercome the disadvantage of lower operating frequencyEasy to manufactureOscillations generatorsSecuring communicationEngineeringP channel
The invention discloses a CMOS (Complementary Metal-Oxide-Semiconductor) inverter pair based method and a circuit for designing a high-speed chaotic oscillator. In the invention, a negative resistance circuit consisting of a CMOS inverter pair is used for replacing a negative resistance circuit based on an operational amplifier in a Chua's circuit to generate chaotic oscillation; a CMOS inverter circuit consists of a chip CD4069 or consists of two PMOS (P-channel Metal Oxide Semiconductor) tubes and two NMOS (N-channel metal oxide semiconductor) tubes, inherits the characteristics of the traditional Chua's circuit and is used for generating chaotic oscillation signals; and when a CMOS inverter pair is used, i.e. two reversely connected inverters are used as a negative resistance circuit of an oscillator, the defect of lower working frequency of the traditional Chua's circuit can be overcome, and the inverter pair can work with a higher frequency, so that high-speed chaotic oscillation can be generated, and the working frequency reaches MHz. The circuit can be designed and realized by using discrete devices, and the chip of the high-speed chaotic oscillator can be designed and realized by using a standard CMOS process, thus the circuit is beneficial to the manufacture and the production of chaotic signal sources in a large scale with low cost.
Owner:ZHEJIANG UNIV

CMOS (Complementary Metal-Oxide-Semiconductor) inverter pair based method and circuit for designing high-speed chaotic oscillator

InactiveCN101964630AOvercome the disadvantage of lower operating frequencyEasy to manufactureOscillations generatorsSecuring communicationP channelOperating frequency
The invention discloses a CMOS (Complementary Metal-Oxide-Semiconductor) inverter pair based method and a circuit for designing a high-speed chaotic oscillator. In the invention, a negative resistance circuit consisting of a CMOS inverter pair is used for replacing a negative resistance circuit based on an operational amplifier in a Chua's circuit to generate chaotic oscillation; a CMOS inverter circuit consists of a chip CD4069 or consists of two PMOS (P-channel Metal Oxide Semiconductor) tubes and two NMOS (N-channel metal oxide semiconductor) tubes, inherits the characteristics of the traditional Chua's circuit and is used for generating chaotic oscillation signals; and when a CMOS inverter pair is used, i.e. two reversely connected inverters are used as a negative resistance circuit of an oscillator, the defect of lower working frequency of the traditional Chua's circuit can be overcome, and the inverter pair can work with a higher frequency, so that high-speed chaotic oscillation can be generated, and the working frequency reaches /MHz. The circuit can be designed and realized by using discrete devices, and the chip of the high-speed chaotic oscillator can be designed and realized by using a standard CMOS process, thus the circuit is beneficial to the manufacture and the production of chaotic signal sources in a large scale with low cost.
Owner:ZHEJIANG UNIV

A High Security Transmission Method Based on Double Encryption of Three-Dimensional Constellation

The invention discloses a high-security transmission method based on double encryption of three-dimensional constellations, which comprises the following steps: performing serial-to-parallel conversion on the binary data at the transmitting end; performing constellation mapping on the three-dimensional data to form constellation points; using Cai's chaotic model The chaotic sequence generates the displacement vector and rotation vector of the constellation point, and performs displacement transformation and rotation transformation on the three-dimensional constellation point; uses three-dimensional carrier-free amplitude phase modulation to process the encrypted three-dimensional signal, and superimposes the processed three-dimensional signal into a single-channel signal. Enter the channel transmission; demodulate the received signal at the receiving end, and finally obtain the original data. The invention utilizes the Chua's circuit model to generate a chaotic sequence to change the position of the constellation point by displacement and rotation, realizes two encryptions of the constellation diagram, and effectively improves the security performance of the system; utilizes the high gain index and high anti-noise performance of the constellation to effectively improve the system transmission capacity.
Owner:NANJING UNIV OF INFORMATION SCI & TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products