37 results about "Cmos electronics" patented technology

Microelectromechanical systems (MEMS) are small integrated devices or systems that combine electrical and mechanical components. It would be beneficial for such MEMS devices to be integrated with silicon CMOS electronics and packaged in controlled environments and support industry standard mounting interconnections such as solder bump through the provisioning of through-wafer via-based electrical interconnections. However, the fragile nature of the MEMS devices, the requirement for vacuum, hermetic sealing, and stresses placed on metallization membranes are not present in packaging conventional CMOS electronics. Accordingly there is provided a means of reinforcing the through-wafer vias for such integrated MEMS-CMOS circuits by in filling a predetermined portion of the through-wafer electrical vias with low temperature deposited ceramic materials which are deposited at temperatures below 350° C., and potentially to below 250° C., thereby allowing the re-inforcing ceramic to be deposited after fabrication of the CMOS electronics.

A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices, providing a compound semiconductor substrate including a plurality of photonic devices, and dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method also includes providing an assembly substrate having a base layer and a device layer including a plurality of CMOS devices, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, and aligning the SOI substrate and the assembly substrate. The method further includes joining the SOI substrate and the assembly substrate to form a composite substrate structure and removing at least the base layer of the assembly substrate from the composite substrate structure.

Capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics are disclosed. A capacitive based sensor is disposed over a first predetermined portion of a wafer that includes at least a first ceramic element providing protection for the final capacitive based sensor and self-aligned processing during its manufacturing.

A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method providing for processes and manufacturing sequences limiting the maximum exposure of an integrated circuit upon which the MEMS is manufactured to below 350° C., and potentially to below 250° C., thereby allowing direct manufacturing of the MEMS devices onto electronics, such as Si CMOS circuits. The method further providing for the provisioning of MEMS devices with multiple non-conductive structural layers such as silicon carbide separated with small lateral gaps. Such silicon carbide structures offering enhanced material properties, increased environmental and chemical resilience whilst also allowing novel designs to be implemented taking advantage of the non-conductive material of the structural layer. The use of silicon carbide being beneficial within the formation of MEMS elements such as motors, gears, rotors, translation drives, etc where increased hardness reduces wear of such elements during operation.

Methods and systems for large silicon photonic interposers by stitching are disclosed and may include, in an integrated optical communication system including CMOS electronics die coupled to a silicon photonic interposer, where the interposer includes a plurality of reticle sections: communicating an optical signal between two of the plurality of reticle sections utilizing a waveguide. The waveguide may include a taper region at a boundary between the two reticle sections, the taper region expanding an optical mode of the communicated optical signal prior to the boundary and narrowing the optical mode after the boundary. A continuous wave (CW) optical signal may be received in a first of the reticle sections from an optical source external to the interposer. The CW optical signal may be received in the interposer from an optical source assembly coupled to a grating coupler in the first of the reticle sections in the silicon photonic interposer.

Quantitative understanding of neural and biological activity at a sub-millimeter scale requires an integrated probe platform that combines biomarker sensors together with electrical stimulus/recording sites. Optically addressed biomarker sensors within such an integrated probe platform allows remote interrogation from the activity being measured. Monolithic or hybrid integrated silicon probe platforms would beneficially allow for accurate control of neural prosthetics, brain machine interfaces, etc as well as helping with complex brain diseases and disorders. According to the invention a silicon probe platform is provided employing ultra-thin silicon in conjunction with optical waveguides, optoelectronic interfaces, porous filter elements, and integrated CMOS circuitry. Such probes allowing simultaneously analysis of both neural electrical activities along with chemical activity derived from multiple biomolecular sensors with porous membrane filters. Such porous silicon and polymer filters providing biomolecular filtering and optical filtering being compatible with post-processing wafers with integrated CMOS electronics.

MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

A vertical stack of integrated circuits includes at least one CMOS electronic integrated circuit (IC), an SOI-based opto-electronic integrated circuit structure, and an optical input/output coupling element. A plurality of metalized vias may be formed through the thickness of the stack so that electrical connections can be made between each integrated circuit. Various types of optical input/output coupling can be used, such as prism coupling, gratings, inverse tapers, and the like. By separating the optical and electrical functions onto separate ICs, the functionalities of each may be modified without requiring a re-design of the remaining system. By virtue of using SOI-based opto-electronics with the CMOS electronic ICs, a portion of the SOI structure may be exposed to provide access to the waveguiding SOI layer for optical coupling purposes.

The present invention is a delay line for automatically balancing process deviation and temperature influence, the delay line is connected in series by a plurality of delay units, each of the delay units includes a delay circuit and an inversion circuit; transistors P1, P2, P3, P4 is a PMOS transistor of the same size, and transistors N1, N2, N3, and N4 are NMOS transistors of the same size; the transistors P1, P3, N1, and N3 form one of the delay circuits; the transistors P2, P4, N2, and N4 One of the reverse circuits is formed. The delay line designed by the method of the present invention can automatically adjust the high and low level duty ratio of the delay unit, so that the high and low level duty ratio of the signal is approximately 1/2; the delay line designed by the present invention can effectively increase the frequency of the input signal The dynamic range can reduce the locking time of the delay-locked loop; the delay line designed by the invention has a simple structure and adopts standard CMOS electronic devices, which can effectively save chip area and cost.

An efficient deposition process is provided for fabricating reliable RF MEMS capacitive switches with multilayer ultrananocrystalline (UNCD) films for more rapid recovery, charging and discharging that is effective for more than a billion cycles of operation. Significantly, the deposition process is compatible for integration with CMOS electronics and thereby can provide monolithically integrated RF MEMS capacitive switches for use with CMOS electronic devices, such as for insertion into phase array antennas for radars and other RF communication systems.

A radio frequency (RF) micro-electro-mechanical systems (MEMS) switch and high yield manufacturing method. The switch can be fabricated with very high yield despite the high variability of the manufacturing process parameters. The switch is fabricated with monocrystalline material, e.g., silicon, as the moving portion. The switch fabrication process is compatible with CMOS electronics fabricated on Silicon-on-Insulator (SOI) substrates. The switch comprises a movable portion having conductive portion selectively positioned with a bias voltage to conductively bridge a gap in a signal line.

MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

The invention discloses an endoscope for gynecological induced abortion under direct view. The endoscope comprises an induced abortion suction tube, wherein a complementary metal oxide semiconductor (CMOS) electronic endoscope is fixed on the inner wall of the induced abortion suction tube. The endoscope is characterized in that the opening at the front end of the induced abortion suction tube is an inclined surface; the CMOS electronic endoscope is slantways placed in the induced abortion suction tube; the front end of the electronic endoscope faces towards the inclined surface of the opening at the front end of the electronic endoscope; and the included angle between the electronic endoscope and the induced abortion suction tube is 5 to 20 degrees. The endoscope has the advantages that the whole operation part can be observed in the process of the operation; the endoscope has a simple structure and is easy to implement; during use, the suction tube is connected with an induced abortion aspirator and an embryo tissue is sucked by negative pressure generator by the aspirator; and during operation, the condition of an uterine cavity can be observed, so fixed-point suction can be realized accurately and damage to a uterus caused by excessive suction can be avoided. The endoscope also has the advantages that the condition of the uterine cavity can be observed directly, so complications such as perforation of the uterus and leakage suction are avoided and little damage and less bleeding are realized.