42results about How to "Hinders miniaturization" patented technology

A pressure-detecting chamber 23, a pressure-directing path 25 and a buffer space 24 are formed on the upper face of a main-body-side substrate 22 as recessed portions, and the upper face of the pressure-detecting chamber 23 is covered with a thin-type diaphragm 31, and upper faces of the pressure-directing path 25 and the buffer space 24 are covered with a cover substrate 30. A pressure-introducing unit 26 formed on the lower face of the main-body-side substrate 22 is connected to the lower face of the buffer space 24. The cross-section of the buffer space 24 is greater than the cross-section of the pressure-introducing unit 26, and the capacity of the buffer space 24 is greater than the capacity of the pressure-directing path 25. With this arrangement, it is possible to provide a pressure sensor which can control the response characteristic of the pressure sensor to a pressure change with high precision without causing serious adverse effects on the other characteristics of the pressure sensor, without preventing the miniaturization of the sensor.

The present invention has been made to reduce the size and thickness of a multibeam antenna capable of switching the directivity in multi directions. The present invention provides a multibeam antenna including an antenna element array including one or more feed element and N (N: natural number) parasitic elements, wherein the electrical length of one or more parasitic elements are made variable.

A technology which allows a reduction in the thermal resistance of a semiconductor device and the miniaturization thereof is provided. The semiconductor device has a plurality of unit transistors Q, transistor formation regions 3a, 3b, and 3e each having a first number (seven) of the unit transistors Q, and transistor formation regions 3c and 3d each having a second number (four) of the unit transistors Q. The transistor formation regions 3c and 3d are located between the transistor formation regions 3a, 3b, 3e, and 3f and the first number is larger than the second number.

The present invention, which aims to provide a gallium arsenide field-effect transistor that can reduce degradation of field-effect transistor characteristics, and to realize miniaturization of the transistor, includes: a substrate; a mesa which includes a channel layer and is formed on the substrate; a source electrode formed on the mesa; a drain electrode; and a gate electrode, wherein, on the mesa, a top pattern is formed in which finger portions of the source electrode and the drain electrode which are formed in comb-shape are located so as to interdigitate, and a gate electrode is formed between the source electrode and the drain electrode, while common portions, which are base parts of the finger portions of the source and drain electrodes, are formed on the surface of the mesa, and the part located below the straight portion which is parallel to the finger portions of the gate electrode is electrically separated from the part located below a corner portion that connects neighboring straight portions of the gate electrode.

Disclosed herein is a zoom lens including a first lens group, a second lens group, a third lens group, a fourth lens group, and a fifth lens group. The zoom lens satisfies following conditional expressions (1) and (2),0.03<H1′ / f1<0.3  (1)0.3<|f2| / √(fw·ft)<0.65  (2)where H1′ is an interval from a vertex of a surface nearest to the image side in the first lens group to a principal point on the image side of the first lens group (− denotes the object side, and + denotes the image side), f1 is focal length of the first lens group, f2 is focal length of the second lens group, fw is focal length of an entire lens system at a wide-angle end, and ft is the focal length of the entire lens system at a telephoto end.

A connector device includes: a plug connector including a plurality of plug terminals, a plug housing that holds the plurality of plug terminals in its longitudinal direction, and a plug shell held by the plug housing; and a receptacle connector including a plurality of receptacle terminals, a receptacle housing that holds the receptacle terminals along its longitudinal direction, and a receptacle shell held by the receptacle housing. The plug shell and the receptacle shell are electrically connected to each other through at least the contact portion in a state where the plug connector and the receptacle connector is fitted with each other.

An AC adaptor has an AC plug having wider contact portions facilitating better contact despite the displacement. AC plug 3 of AC adaptor 3 has a pair of conductive blades 4, an end surface with the blades projecting with a substantially right angle, a first surface and a first rotary shaft on a first side surface. On a second side surface opposite to the first side surface, there are provided a second surface and a second rotary shaft. A first and second planar contact portions which are electrically connected respectively to a first and second conductive blades are configured respectively to project slightly from the surfaces of the first and second rotary shafts. On a circuit board in the case, there are provided conductive spring terminals 17 with projecting portions thereof making resilient contact with the first and second planar contact portions 15.

A wiring substrate (10, 40, 60, 80) includes a wiring pattern (13, 21, 41, 43, 65, 83a, 83b, 83c) and an insulating layer (11, 26, 48, 81) to which the wiring pattern is fixed. The insulating layer includes an edge. The wiring pattern (13, 21, 41, 43, 65, 83a, 83b, 83c) includes a joint portion (14, 44, 66) connected with the insulating layer (11, 26, 48, 81) and an extended portion (45, 45, 67, 85) that extends from the joint portion (14, 44, 66) and protrudes from the edge of the insulating layer (11, 26, 48, 81). The insulating layer (11, 26, 48, 81) or the joint portion (14, 44, 66) includes an outermost surface. A connection terminal (T, T1) is provided by bending the extended portion (45, 45, 67, 85) so that a part of the extended portion (45, 45, 67, 85) is protruded from the outermost surface of the insulating layer (11, 26, 48, 81) or the joint portion (14, 44, 66).

A ceramic burner, a ceramic metal halide lamp, and a method of sealing the ceramic burner is provided. The ceramic burner comprises a discharge vessel enclosing a discharge space that is provided with an ionizable filling comprising one or more halides. The discharge vessel comprises a ceramic wall arranged between a first and a second end portion. The first and the second end portion are arranged such that current supply conductors are passed through the end portions to respective electrodes arranged in the discharge space for maintaining a discharge. The ceramic wall of the discharge vessel comprises a tube for introducing the ionizable filling into the discharge vessel during manufacture of the ceramic burner. The tube projects from the ceramic wall and is provided with a gastight seal. The effect of using the tube is that it enables the gastight seal to be arranged away from the ceramic wall of the discharge vessel at a projecting end of the tube.

Accumulated usage data of each pixel of the correction circuit is divided into a plurality of data portions, each of which is stored in a different storing means. For example, the accumulated usage data is divided into the upper bit and the lower bit to be stored separately, and the upper bit of the accumulated usage data is obtained by adding the upper bit to a half carry generated by the calculation of the lower bit of the accumulated usage data. A degradation coefficient selected based on the thus obtained accumulated usage data is multiplied by video data to obtain corrected video data. The invention also provides a control circuit of a display device integrated with such a correction circuit.

A semiconductor package includes a base substrate on which a semiconductor chip is placed so that a first surface thereof faces the base substrate. A circuit section is formed adjacent to the first surface. An insulation layer is formed on a second surface of the semiconductor chip which faces away from the first surface. Passive elements are formed on the insulation layer. Via patterns are formed to pass through the insulation layer and are connected to the passive elements. Via wirings are formed to pass through the semiconductor chip and connected to the circuit section, the via patterns and the base substrate. Outside connection terminals are attached to a first surface of the base substrate, which face away from a second surface of the base substrate on which the semiconductor chip is placed.

A connector device includes: a plug connector including a plurality of plug terminals, a plug housing that holds the plurality of plug terminals in its longitudinal direction, and a plug shell held by the plug housing; and a receptacle connector including a plurality of receptacle terminals, a receptacle housing that holds the receptacle terminals along its longitudinal direction, and a receptacle shell held by the receptacle housing. The plug shell and the receptacle shell are electrically connected to each other through at least the contact portion in a state where the plug connector and the receptacle connector is fitted with each other.

A method for producing a semiconductor device which comprises causing a dopant present in a semiconductor substrate to segregate in the surface of said semiconductor substrate, thereby forming a thin layer which has a higher dopant concentration than said substrate. The thin layer formed by segregation prevents punch-through which occurs as the result of miniaturization of MOSFET. This method permits economical delta doping without sacrificing the device characteristics.

An AC adaptor has an AC plug having wider contact portions facilitating better contact despite the displacement. AC plug 3 of AC adaptor 3 has a pair of conductive blades 4, an end surface with the blades projecting with a substantially right angle, a first surface and a first rotary shaft on a first side surface. On a second side surface opposite to the first side surface, there are provided a second surface and a second rotary shaft. A first and second planar contact portions which are electrically connected respectively to a first and second conductive blades are configured respectively to project slightly from the surfaces of the first and second rotary shafts. On a circuit board in the case, there are provided conductive spring terminals 17 with projecting portions thereof making resilient contact with the first and second planar contact portions 15.

To improve crystallinity of an oxide semiconductor. To provide a crystalline oxide semiconductor film in which a crystallized region extends to the interface with a base or the vicinity of the interface, and to provide a method for forming the oxide semiconductor film. An oxide semiconductor film containing indium, gallium, and zinc is formed, and the oxide semiconductor film is irradiated with an energy beam, thereby being heated. Note that the oxide semiconductor film includes a c-axis aligned crystal region or microcrystal.