The invention discloses an FPGA loading method based on a ZYNQ chip. The FPGA loading method comprises the steps of power-on automatic loading during power-on starting and upper computer control loading after a ZYNQ system is started; the power-on automatic loading process is as follows: when the equipment is powered on and started, the loading mode of the FPGA is defaulted to be active loading, and at the moment, the FPGA actively reads a file from Flash2 and rapidly loads the file; the upper computer control loading process comprises the steps that after the ZYNQ system runs, a control daemon process automatically runs, a network port is monitored, and an upper computer command is responded; the upper computer establishes communication with the ZYNQ system by using a network port, a serial port and the like, and issues an FPGA code to be updated; the ZYNQ system receives the data, stores the data in a DDR3 memory, verifies the data and feeds back a verification result to the upper computer; and the ZYNQ system determines an equipment updating mode according to an instruction of the upper computer. The FPGA loading method based on the ZYNQ chip, provided by the invention, has the characteristics that the FPGA is quickly and conveniently updated, and the interruption working time of equipment is short.