Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

32results about How to "Surface potential" patented technology

Combined-source Mos Transistor with Comb-shaped Gate, and Method for Manufacturing the Same

The present invention discloses a combined-source MOS transistor with a Schottky Barrier and a comb-shaped gate structure, and a method for manufacturing the same. The combined-source MOS transistor includes: a control gate electrode layer, a gate dielectric layer, a semiconductor substrate, a highly-doped source region and a highly-doped drain region, wherein a Schottky source region is connected to a side of the highly-doped source region which is far from a channel, one end of the control gate extends to the highly-doped source region, the extended gate region is an extension gate in a form of a comb-shaped and the original control gate region is a main gate; an active region covered by the extension gate is also a channel region, and is a substrate material; the highly-doped source region which is formed by highly doping is located on both sides of each comb finger of the extension gate; and a Schottky junction is formed at a location where the Schottky source region and the channel under the extension gate are located. As compared with an existing MOSFET, in the invention, a higher turn-on current, a lower leakage current and a steeper subthreshold slope may be obtained under the same process condition and the same active region size.
Owner:SEMICON MFG INT (SHANGHAI) CORP +1

Combined-source MOS transistor with comb-shaped gate, and method for manufacturing the same

The present invention discloses a combined-source MOS transistor with a Schottky Barrier and a comb-shaped gate structure, and a method for manufacturing the same. The combined-source MOS transistor includes: a control gate electrode layer, a gate dielectric layer, a semiconductor substrate, a highly-doped source region and a highly-doped drain region, wherein a Schottky source region is connected to a side of the highly-doped source region which is far from a channel, one end of the control gate extends to the highly-doped source region, the extended gate region is an extension gate in a form of a comb-shaped and the original control gate region is a main gate; an active region covered by the extension gate is also a channel region, and is a substrate material; the highly-doped source region which is formed by highly doping is located on both sides of each comb finger of the extension gate; and a Schottky junction is formed at a location where the Schottky source region and the channel under the extension gate are located. As compared with an existing MOSFET, in the invention, a higher turn-on current, a lower leakage current and a steeper subthreshold slope may be obtained under the same process condition and the same active region size.
Owner:SEMICON MFG INT (SHANGHAI) CORP +1

Charger, Image Forming Apparatus, and Charge Control Method

InactiveUS20080131154A1Avoid bandsPreventing resist shiftElectrographic process apparatusCorona dischargeImage formationCharge control
A charger includes: a primary charging member which is rotatably provided and is brought into contact with an image carrier to charge the surface of the image carrier; a secondary charging member which is brought into contact with the image carrier at a portion on the downstream side relative to the first charging member in the rotational direction of the image carrier to charge the surface of the image carrier; and a controller which controls voltages applied to the first and second charging members, wherein at the time of image formation, the controller applies, to the first charging member, a voltage whose absolute value is higher than the absolute value of the discharge start voltage of the first charging member and applies, to the second charging member, a voltage whose absolute value is lower than the absolute value of the discharge start voltage of the second charging member and whose absolute value is lower than the voltage applied to the first charging member, and at the time when an image is not formed, the controller applies, to the first charging member, a voltage whose absolute value is lower than the absolute value of the discharge start voltage of the first charging member and applies, to the second charging member, a voltage whose absolute value is higher than the absolute value of the discharge start voltage of the second charging member and whose absolute value is higher than the voltage applied to the first charging member.
Owner:SEIKO EPSON CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products