83 results about "ChIP-on-chip" patented technology

A chip package structure includes a substrate in which a plurality of grooves are formed, an adhesive layer disposed on the substrate, and a plurality of chips attached to the adhesive layer. In addition, a method of fabricating the chip package structure includes forming a plurality of grooves in the substrate, dispensing a die attach material on a plurality of chip attaching regions between the plurality of grooves, and attaching a plurality of chips respectively on the plurality of chip attaching regions.

A semiconductor device including a first semiconductor chip, a second semiconductor chip bonded to the first semiconductor chip in a stacked relation, and a registration structure which causes the first and second semiconductor chips to be positioned with respect to each other by depression-projection engagement therebetween. The registration structure includes, for example, a registration recess provided on a surface of the first semiconductor chip, and a registration projection provided on a surface of the second semiconductor chip for engagement with the registration recess. The registration projection may be a spherical member provided on the surface of the second semiconductor chip.

A flip chip stacked package mainly comprises a carrier, a lower chip, an upper chip, a plurality of bumps, a plurality of bonding wires and a supporter. The supporter is attached to the lower surface of the carrier via an adhesive and covers the opening of the carrier. Thus, the lower chip can be disposed in the opening. In addition, the lower chip is electrically flip-chip bonded to the upper chip via the bumps and electrically connected to the carrier via the bonding wires. Accordingly, the heat generated from the lower chip can be transmitted to outside via the supporter. Furthermore, the upper chip is directly exposed to outside so that the capability of the heat dissipation will be enhanced.

Methods and systems for a chip-on-wafer-on-substrate assembly are disclosed and may include in an integrated optical communication system comprising an electronics die and a substrate. The electronics die is bonded to a first surface of a photonic interposer and the substrate is coupled to a second surface of the photonic interposer opposite to the first surface. An optical fiber and a light source assembly are coupled to the second surface of the interposer in one or more cavities formed in the substrate. The integrated optical communication system is operable to receive a continuous wave (CW) optical signal in the photonic interposer from the light source assembly; and communicate a modulated optical signal to the optical fiber from said photonic interposer. A mold compound may be on the first surface of the interposer and in contact with the electronics die. The received CW optical signal may be coupled to an optical waveguide in the photonic interposer using a grating coupler.

An embedded chip-on-chip package comprises a printed circuit board having a recessed semiconductor chip mounting unit, a first semiconductor chip embedded in the recessed semiconductor chip mounting unit, and a second semiconductor chip mounted on the first semiconductor chip and the printed circuit board.

In an embodiment, a peripheral interface controller may include an inline cryptographic engine which may encrypt data being sent over a peripheral interface and decrypt data received from the peripheral interface. The encryption may be transparent to the device connected to the peripheral interface that is receiving/supplying the data. In an embodiment, the peripheral interface controller is included in a system on a chip (SOC) that also includes a memory controller configured to couple to a memory. The memory may be mounted on the SOC in a chip-on-chip or package-on-package configuration. The unencrypted data may be stored in the memory for use by other parts of the SOC (e.g. processors, on-chip peripherals, etc.). The keys used for the encryption/decryption of data may remain within the SOC.

The present invention relates to an adhesive tape for electrically connecting semiconductor chips in a chip-on-chip type semiconductor device. The adhesive tape comprising: (A) 10 to 50 wt % of film forming resin; (B) 30 to 80 wt % of curable resin; and (C) 1 to 20 wt % of curing agent having flux activity.

A semiconductor device includes: a semiconductor chip having a semiconductor substrate; a pad electrode formed on the semiconductor substrate; a base metal layer formed on said pad electrode; and a bump electrode formed on the base metal layer, in which an exposed surface including a side surface of the base metal layer is covered with the solder bump electrode.

In one embodiment, a packaging solution for an application integrated circuit (IC) and one or more other ICs is provided. The packaging solution may support both chip-on-chip packaging of the application IC (in flip-chip connection to a package substrate) and other ICs (in non-flip chip orientation), and package-on-package packaging of the application IC and the other ICs. The package substrate may include a first set of pads proximate to the application IC to support chip-on-chip connection to the other ICs. The pads may be connected to conductors that extend underneath the application IC, to connect to the application IC. A second set of pads may be connected to package pins for package-on-package solutions. If the chip-on-chip solution proves reliable, support for the package-on-package solution may be eliminated and the package substrate may be reduced in size.

An organic light emitting display device is disclosed. The organic light emitting display device includes: an organic light emitting display panel defined into a display area for displaying an image and a non-display area surrounding the display area; a chip-on-film loaded with a driver IC chip, which is configured to drive the organic light emitting display panel, and attached to a pad portion which is formed on the non-display area of the organic light emitting display panel; and a printed circuit board configured to apply signals to the driver IC chip and attached to one edge of the chip-on-film, wherein the organic light emitting display panel includes a dummy pad portion which is formed on the non-display area in the same configuration as the pad portion and in opposition to the pad portion.

The present disclosure relates to a liquid chip for an electron microscope including a lower chip, an upper chip, and a liquid channel part for supplying a liquid sample, and may attach a transmissive thin film part of a graphene material having excellent bulging resistance to a plurality of holes formed in a liquid channel part to increase the thickness of a support not serving as a transmissive window thicker than the conventional one, thereby minimizing the loss of a spatial resolution and also suppressing the bulging phenomenon of the transmissive window while supplying the liquid sample more stably.

Further, the present disclosure may form an electrode which may be connected with an external electrical supply source in the liquid channel part, thereby analyzing electrochemical or thermochemical reaction of the liquid sample in the liquid channel part in real time.

The present invention discloses a chip-on-chip type semiconductor electronic component and a semiconductor device which can meet the requirements for further density increase of semiconductor integrated circuits. The present invention provides: a chip-on-chip type semiconductor electronic component in which a circuit surface of a first semiconductor chip and a circuit surface of a second semiconductor chip are opposed to each other, wherein the distance X between the first semiconductor chip and the second semiconductor chip is 50 [mu]m or less, and the shortest distance Y between the side surface of the second semiconductor chip and the first external electrode is 1 mm or less; and a semiconductor device comprising the same.

A chip-on-chip-structure semiconductor device for a radio communication device, having a base band chip and a high-frequency chip piled up on and bonded to the surface thereof. The base band chip has a low-frequency signal processing unit for processing a signal in a first frequency band. The high-frequency chip has a high-frequency signal processing unit for processing a signal in a second frequency band of which frequency is higher than that of the first frequency band.

The invention discloses a method for shaping the table surface of a semiconductor chip. The method comprises the following steps: using a grinding wheel rotating at a high speed, forming a groove corresponding to the needed groove shape in the grinding wheel, plating a grinding layer in the groove, and after the cylindrical surface of a chip ending terminal on the chip to be machined stretches in the groove, shaping the table surface by means of contacting with the groove and grinding. The method disclosed by the invention has the advantages of being convenient and efficient, simple in process, high in yield, low in manufacturing cost, and the like.