9 results about "Program compilation" patented technology

The application discloses a crosstalk-aware quantum program compiling framework system, which comprises a parameter optimization module, a crosstalk-aware mapping module and a quantum logic gate scheduling module which are connected in communication, wherein the parameter optimization module is used for optimizing the parameters of quantum logic gates in a quantum program to be executed, the crosstalk-aware mapping module is used for receiving the parameter optimization result of the parameter optimization module, determining an optimal mapping scheme of the quantum program to be executed by constructing a cost function, and the quantum logic gate scheduling module is used for determining the maximum independent set between quantum bits in the quantum program to be executed and a parallel quantum logic gate scheduling scheme of the maximum independent set according to the optimal mapping scheme, so as to realize the compilation of the quantum program to be executed. Through the crosstalk-aware quantum program compiling framework system, the crosstalk noise is perceived, and the quantum circuit mapping scheme is comprehensively optimized, so that the quantum program compiling process is accurate and efficient.

This disclosure provides a multi-tasking program compilation method and apparatus, and a multi-core chip. The method includes: determining the initial synchronization instruction insertion point for each task; generating initial program segments within each synchronization segment corresponding to each initial synchronization instruction insertion point; calculating the program storage area required for each initial program segment; reallocating all initial program segments among the computing cores of a computing core group based on the required program storage area size for each initial program segment, so that the occupied space of each computing core is balanced after reallocation; generating new program segments and final synchronization instruction insertion points for each computing core based on the reallocation result; and inserting synchronization instructions into the corresponding new program segments according to each final synchronization instruction insertion point to generate the final program segments of the computing core group. Multiple tasks can run in the same computing core group, which can save the number of chips in a multi-tasking system and reduce costs.

The present disclosure provides a multi-task program compiling method and device, and a multi-core chip. The method comprises: determining an initial synchronization instruction insertion point of each task respectively; generating an initial program segment in each synchronization segment corresponding to each initial synchronization instruction insertion point respectively; calculating the required calculation amount of each initial program segment respectively; re-distributing all initial program segments in each calculation core of the calculation core group according to the required calculation amount of each initial program segment, so that each calculation core performs the same calculation amount; generating a new program segment and a final synchronization instruction insertion point of each calculation core based on the re-distribution result; and inserting a synchronization instruction in the corresponding new program segment according to each final synchronization instruction insertion point to generate a final program segment of the calculation core group. The present disclosure can save the number of chips in the multi-task system, reduce the cost, optimize the computing power resources, maximize the effective computing power of each calculation core, speed up the task completion, save the power consumption, and greatly reduce the programming difficulty.

A system for computer security includes a signature of a signed library embedded in a program along with a set of transformations that were made during compiling and linking of the program. Computer security software periodically runs and opens the program (all programs) and when the program includes transformations, the computer security software rolls back the transformations to create a copy of the program then the computer security software calculates a check value on the copy and if the check value matches the signature, the program is allowed, otherwise the libraries / program has been compromised and the program is blocked and quarantined.

This application relates to the field of industrial automation control technology and discloses an intelligent program factory system for wastewater reuse. The system includes a syntax tree generation module, a constraint matrix construction module, a violation early warning module, an algorithm injection module, and a code compilation module. This system transforms discrete control logic into an initial abstract syntax tree and injects metadata semantic tags; it constructs a multi-physics coupling constraint matrix to set a lower bound threshold for the biochemical reaction residence time; it extracts extreme parameters and maps them to extreme transient flow rates; when the extreme biochemical reaction residence time is less than the lower bound threshold, it outputs a violation early warning object; driven by the early warning object, it locates nodes in the initial abstract syntax tree and superimposes control subtrees to generate a target abstract syntax tree; finally, it performs verification and compiles the code into a source file for output. This invention identifies the risk of biochemical residence time escape before program compilation and dynamically injects a compensation algorithm, reducing the risk of substandard water quality and improving the reliability of the underlying control logic.

This application provides a program compilation method, apparatus, and storage medium, relating to the field of computer technology. The program compilation method includes: determining an independent option set and a cooperative option set from multiple candidate optimization options, wherein each optimization option in the independent option set has no cooperative relationship with the feedback-driven optimization function, while each optimization option in the cooperative option set has a cooperative relationship with the feedback-driven optimization function; determining a target independent option set from the independent option set based on a first performance index corresponding to the independent option set; determining a target cooperative option set from the cooperative option set based on a second performance index corresponding to the target independent option set and the cooperative option set; and compiling a target program based on the target independent option set and the target cooperative option set to obtain a target executable program. The method allows for flexible selection of option sets based on performance indicators, and the selected target independent option set and target cooperative option set can improve the actual running performance of the target executable program.

This application discloses a program compilation method including: obtaining a first program, where the first program includes a plurality of layers of loop statements, a loop condition of each layer of loop statement in the plurality of layers of loop statements includes a variable and a value interval of the variable, and a loop body of the plurality of layers of loop statements includes at least one conditional statement; processing a value interval of a first variable in a first loop statement included in the plurality of layers of loop statements, to obtain a second loop statement; and compiling the first program based on at least one loop statement to obtain a compilation result of the first program.

Embodiments of the present disclosure disclose a compiling method of an execution program, a chip, an electronic device and a computer readable storage medium. The compiling method of the execution program comprises: obtaining a total amount of data of each subprogram in an original program; determining a number of processing cores required for executing each subprogram according to the total amount of data of each subprogram; grouping the subprograms according to the number of processing cores required for executing each subprogram; determining a storage location of intermediate data of the grouping; determining a location of a synchronization point; and compiling the original program into an execution program according to the grouping, the storage location of the intermediate data of the grouping and the location of the synchronization point. The storage location of the intermediate data of the grouping is determined in the above method, so that the data exchange between the processing core and the external memory is reduced, and the technical problem that the program in the prior art needs to frequently access the external memory when executed is solved.