113 results about "Program compilation" patented technology

The invention discloses a compiling construction method and device of a client program, a storage medium and electronic equipment, is applied to a server, and relates to the technical field of computers. Comprising the following steps: generating a dynamic link library corresponding to each kernel version according to a kernel information function of which a return value is modified into a kernel version number corresponding to each kernel version of each operating system; according to the dynamic link library and the target drive file, creating a compiling construction mirror image corresponding to each kernel version, and further constructing a compiling construction container consistent with the environment of an operating system of each kernel version in a server according to each compiling construction mirror image, and compiling and constructing the client program of each kernel version in each compiling and constructing container. Therefore, the problem that resources are occupied due to the fact that different operating systems are canned on different servers and kernel clients of corresponding versions are compiled and constructed on the operating systems of the different servers in the prior art can be solved.

The invention discloses an RISC-V vector register pressure-oriented dynamic management method and system, and relates to the technical field of computer processor architecture and compiler optimizing.The method comprises the steps that in the program compiling or executing process, the use state of an RISC-V vector register is monitored in real time, and when it is monitored that the vector register pressure exceeds the limit, the RISC-V vector register pressure is monitored; if yes, selecting a target register and triggering a management strategy; identifying a source instruction of a vector value in the target register, executing heavy materialization validity verification, and dividing the vector value into a heavy materialization type and a non-heavy materialization type according to a verification result; according to a division result, dynamically estimating the heavy materialization cost and the register overflow cost; comparing the two types of costs, and if the heavy material cost is higher, deciding to adopt a register overflow strategy and executing the strategy; and if the overflow cost of the register is higher, a decision is made to adopt a heavy matter strategy and is executed. The computing performance of the processor can be improved, and the problem of performance loss caused by high register pressure is solved.

The invention relates to a compilation verification system generation method, a driver compilation verification method, a driver compilation verification system, a driver compilation verification device, a driver compilation verification device, equipment, a medium and a product. The method comprises the following steps: generating each operating system container mirror image based on each target operating system required to be supported by each driver; obtaining a kernel file required for compiling a driving program according to the kernel version used by each target operating system; generating a container compiling environment corresponding to each operating system container mirror image based on each tool chain required for compiling each driving program; determining a written automatic verification program which is used for verifying each drive program by using each kernel version and each tool chain based on each kernel file in a container compiling environment corresponding to each operating system container mirror image; and obtaining a compiling verification system based on the operating system container mirror image, the kernel file, the container compiling environment and the automatic verification program. By adopting the method, the driver can be automatically verified to adapt to different operating systems, kernel versions and compiling tool chain environments.

The invention discloses a compilation optimization pass combination optimization method based on deep reinforcement learning. The method comprises the following steps: 1) collecting a reference program data set for various general function tests; 2) constructing a deep reinforcement learning-based compilation optimization pass-combination optimization strategy model for a compilation optimization pass-combination optimization process, wherein the compilation optimization pass-combination optimization strategy model comprises agent D3QN construction and definition of a reward space, a state space and an action space; 3) introducing a composite program feature combined with basic features such as a control flow embedding vector extracted by the graph neural network, an instruction number, a basic block number and the like into the expression of the state space, enriching the expression ability of the state, optimizing the pass based on the state selection and acting on the intermediate expression by the D3QN, generating an award, and obtaining the state space; and repeating the loop of feature extraction-action selection-reward generation until the maximum action upper limit is reached, and generating an optimized pass combination adapted to the program features. The problem that in existing compiling optimization, the compiling optimization effect on part of programs is poor is solved.

The present application discloses a program compilation method and device, including: obtaining a first expression and a second expression of a program, the first expression and the second expression generating a dependency relationship based on a first variable, and the operation type of the first variable in the first expression is different from the operation type of the first variable in the second expression; updating the operation type of the first variable in the first expression and / or the operation type of the first variable in the second expression, the updated operation type of the first variable indicating that the first variable has no differential result or the result is zero after encountering a differential operation; processing the first expression and the second expression respectively according to the updated operation type of the first variable to obtain corresponding derivative function expressions; combining the derivative function expressions corresponding to the first expression and the second expression respectively based on the chain rule to obtain the compilation result of the program. By implementing the present application, the compilation result of the program can be simplified and the running performance of the compiled program can be improved.

The invention discloses a high-precision flow control protocol simulation system and method for a large-scale network, and relates to the field of network operation simulation services. In the system, a user flow control protocol integration module automatically converts a congestion control protocol algorithm or a flow control protocol provided by a user into a BPF program; and the congestion control protocol simulation module compiles the BPF program into a byte code which can be operated by the Linux kernel, and mounts the byte code to the hook function. The traffic generator generates traffic by using a mounted congestion control algorithm or a traffic control protocol; the data collecting and processing module collects and processes the flow of the flow control protocol simulation experiment by using a database; and the experimental network topology management tool generates a network topology and performs a simulation experiment based on the flow generated by the flow generator. According to the method and the device, the simulation overhead can be reduced, the complex condition in an actual network can be completely and truly reflected, and the applicability and authenticity of a simulation result cannot be limited.

Various embodiments of the disclosure provide apparatuses, systems, and computer program products for instruction compilation for execution in a 2D quantum environment. Some embodiments include identifying a set of starting positions corresponding to a set of qubit pairs for a set of qubits, generating a set of target row assignments based at least in part on the set of starting positions, generating a set of target column assignments comprising a target column assignment for each qubit pair in the set of qubit pairs, the set of target column assignments generated by applying a one-dimensional sorting algorithm to each row of the set of target row assignments, and generating at least one movement instruction based at least in part on the first set of swap-or-not operations and the second set of swap-or-not operations.

The present disclosure provides an interpreter of a reconfigurable cryptographic algorithm based on customized high-level C language, in the field of information security. The interpreter includes an input program of cryptographic algorithm customized language, a compilation optimization module, an intermediate file and data flow graph generation module, a mapping module and an array generation configuration code module. The disclosure provides an automatic mapping tool for the reconfigurable processor, which can take customized high-level C language as input, and the interpreter arranges and connects computing units like operators according to the input high-level C program, to complete the mapping of the whole computing function. This can shorten the development cycle of the reconfigurable system, reduce the hardware mastery requirements for users, map the computing units of different parts to the reconfigurable processor in a more optimized way, and effectively enhance the performance of the reconfigurable processor.

The embodiment of the invention discloses a compiling optimization method and device, equipment and a storage medium, and the method comprises the steps: obtaining a first loop structure in a to-be-compiled program, the first loop structure being loop logic described through a code language; the first loop structure is compiled to obtain a compiled program, the compiled program comprises a second loop structure and a target loop invariant, the semantics of the second loop structure combined with the target loop invariant is the same as the semantics of the first loop structure, and the target loop invariant is located outside the second loop structure; the target loop invariant comprises a first loop invariant and / or a second loop invariant, the first loop invariant is a code used for indicating that an abnormal condition exists when the program runs, and the second loop invariant is a code of a non-built-in function. The optimization application range of the circulation structure can be widened, and the optimization capability of the circulation structure is enhanced.

The present application discloses a dynamic pass optimization method, device, and medium. The present application relates to the technical field of program compilation. The method includes: initializing a population to determine an order encoding corresponding to a transformation pass for multiple individuals in the population; compiling a source program according to the order encoding to determine the memory consumption and running time of the compilation process, and determining an index of the population according to the memory consumption and running time; screening multiple individuals according to the index to determine a new order encoding corresponding to the transformation pass after screening, and determining a new index according to the new order encoding; determining a preset index threshold and comparing the new index with the index threshold; if the new index is greater than or equal to the index threshold, end the optimization; if the new index is less than the index threshold, perform the optimization again. The present application realizes the comprehensive optimization of the compilation process through flexible adjustment strategies, efficient cache utilization, strict screening mechanisms, and rich operation diversity.

The invention discloses a program compiling device and method, and belongs to the technical field of computers. The device comprises a receiving module used for receiving a log collected by an instrumentation program in the running process of a target program, the instrumentation program is a part of the target program, and the log comprises popularity data of at least one function in the target program; and the compiling module is used for performing biased compiling on the target program based on the popularity data of the at least one function to obtain an updated target program, and the biased compiling comprises compiling of a biased performance optimization operation or compiling of a biased code area compression operation. In this way, the program can be optimized and upgraded better, and user requirements are met.

The invention discloses a software updating method, device and system, and relates to the fields of terminal technology, artificial intelligence and the like. In the application, the electronic device can analyze the software update package after obtaining the software update package, and obtain update features, the update features including patch features or upgrade features; and then, the electronic equipment can compile and optimize the application program of the application having the coupling dependency relationship with the updating feature, or compile and optimize the application program of the application having the coupling dependency relationship with the updating feature and meeting the first condition. Based on the scheme, accurate application program compilation optimization can be realized, and waste of processing resources and extension of an updating process caused by compilation optimization of irrelevant applications can be avoided, so that the software updating efficiency can be improved, in addition, the performance (such as compatibility and execution efficiency) of the applications after software updating can be ensured, and the user experience can be improved.

This application relates to the field of computer technology and discloses a method for exception handling in WebAssembly modules. The method includes: determining an exception operation tag located at the position where an exception operation needs to be performed; obtaining a program to be compiled including the exception operation tag, and compiling the program into a corresponding WebAssembly module; converting the exception operation tag in the WebAssembly module into exception handling mechanism instructions to obtain an optimized WebAssembly module for handling runtime exceptions in the optimized WebAssembly module. This method, through the obtained optimized WebAssembly module, can provide a runtime exception handling mechanism for lower-level structured programming languages, enabling exception capture and handling during the runtime of the structured program. Simultaneously, by adding an exception handling mechanism, the robustness and security of the program at runtime can be improved. This application also discloses another method for exception handling in WebAssembly modules, a device for exception handling in WebAssembly modules, and an electronic device for exception handling in WebAssembly modules.

A program compilation method and apparatus operate by: obtaining a first expression and a second expression of a program, where the first expression and the second expression generate a dependency relationship based on a first variable, and operation types of the first variable in the first expression and the second expression are different, and updating an operation type of the first variable; so that the first variable has no differential result or a result is zero after encountering a differential operation; separately processing the first expression and the second expression according to the updated operation type of the first variable, to obtain a corresponding derivative function expression; and; combining, based on a chain rule, derivative function expressions respectively corresponding to the first expression and the second expression, to obtain a compilation result of the program.

The embodiment of the present application provides a program compiling and loading method. In the embodiment of the present application, when an application program is compiled, on one hand, the code section and the data section of a plurality of object files compiled from application source code are subjected to merging processing to obtain a target code section and a target data section, thereby reducing table header information; on the other hand, only a symbol table corresponding to a relocation table required when the application is loaded is retained, thereby reducing the space consumption of the symbol table; therefore, the size of an executable file of the application generated according to the target code section, the target data section, the relocation table and the symbol table corresponding to the relocation table is reduced, and the memory consumption when the application is loaded is reduced.

The invention provides a program compiling method. The program compiling method comprises the steps that a P4 program is converted into a first control flow diagram; edges in the first control flow graph comprise control edges for representing control relations, and node attributes in the first control flow graph comprise definition variables and use variables; according to a matching relationship between the definition variable and the use variable, constructing a data dependence edge in the first control flow diagram to obtain a second control flow diagram; and converting the second control flow graph into a program corresponding to the target compiling language according to a translation rule, a control edge and a data dependence edge between the elements of the P4 language and the corresponding elements of the target language. The disclosure also provides an electronic device and a computer program product.

The application provides a program compiling method and device, equipment and storage medium, and relates to the field of computers. The method comprises the following steps: compiling a host, generating a host program package, and including a manifest file of the host in the host program package; obtaining a manifest file and plug-in information of a target plug-in, the target plug-in being a plug-in obtained after compiling a program package; verifying the host and the target plug-in according to preset conditions according to the plug-in information, and determining whether the host and the target plug-in conflict; if the host and the target plug-in do not conflict, merging the manifest files of the host and the target plug-in, generating a total manifest file, and replacing the manifest file in the host program package with the total manifest file; and integrating the plug-in information into the host program package. The method can realize independent development and compilation of the plug-in and the host, decouples the plug-in and the host, and the plug-in can be applied to any host.

The invention relates to a compiling method based on zero codes, which belongs to the field of system development and comprises the following steps that: (1) a user selects a compiling item as required; (2) performing program compiling based on the selected compiling project, wherein an executable program file required by the program compiling is provided through a project compiling warehouse; and (3) program burning is carried out, and a user downloads the program. The method has the advantages that usability is achieved, a user can select compiling items without compiling codes, the programming threshold is greatly lowered, and non-technical users can also participate in the program compiling process. And rapid development: through a preset compiling project, a user can rapidly start a program compiling process, and the starting stage of a software development cycle is accelerated. The compiling process is simplified into several basic steps, complexity in traditional programming and compiling is reduced, and the whole development process is clearer and easier to manage.

The invention discloses an HTML (Hypertext Markup Language) code rendering method and device of a Web page and a computer program product.The method comprises the following steps: firstly, acquiring a Vue component of a target Web page, and then compiling the Vue component into an HTML file, a CSS (Cascading Style Sheet) file and a JavaScript file; then, a preset code is injected into the HTML file to generate a DSL code; then, a CSS file and a JavaScript file can be used for converting the DSL code into a GoTemplate file, and then, the DSL code is converted into the GoTemplate file; secondly, compiling the dynamic object into a binary file, and obtaining real-time data of the dynamic object in the binary file; finally, then HTML rendered text may be generated based on the real-time data and the binary file; therefore, rendering of a traditional Node.js server side is converted into server side rendering of the Go language, so that a Go program is directly operated in a binary file after being compiled; on the basis of the method, the execution speed of code rendering can be increased without additionally deploying a running environment and carrying out code interpretation, so that the loading response speed of the Web page is increased.

The invention discloses a test method for realizing electronic gear shifting of an eight-speed automatic transmission on a test bench, and belongs to the technical field of automatic transmission test. And the process of simulating the electronic gear shifting of a real vehicle on the test bed can be realized. Comprising the following steps that S1, hardware is built and used for simulating real vehicle stop lever operation; s2, software programming is conducted, communication between a transmission control unit and a trip computer is achieved through a CAN bus, and gear shifting logic is converted through codes by applying a programming language; and S3, verifying the reliability of the experimental method through automatic program test collection data. According to the invention, the current situation that the existing rack can only perform a traditional mechanical gear shifting mode is solved, and the blank of the existing test method is filled; the electronic gear shifting process on the rack is realized through custom variable mapping and formula editing, the complex process is simplified, and the efficiency is improved by 40%; the feasibility and reliability of the method are verified through programming and durability examination, and real data support is provided for the eight-speed automatic transmission to achieve electronic gear shifting on a test bed.

The present application proposes an application compilation method, device, electronic device and storage medium. The technical solution of the present application includes: in response to a compilation request of an application, obtaining a root file system that can compile the application; wherein the root file system at least includes the compilation tools and compilation environment simulator required by the application; using the compilation environment simulator in the root file system to simulate a compilation environment with the same system architecture as the system architecture to which the application is applied; deploying the application in the compilation environment, and using the compilation tools required by the application in the root file system to compile the application deployed in the compilation environment. By adopting the technical solution of the present application, it is possible to compile applications for different system architectures in the same host or virtual machine.

The invention discloses a front end side JS code intelligent compiling method and device and a medium, and relates to the technical field of computer program compilation, the method comprises the following steps: parsing a target function corresponding to a service request, and obtaining a plurality of to-be-compiled code blocks according to a pre-constructed code splitting index; the method comprises the following steps: acquiring runtime environment data of a client in real time, and generating compiling priority information; generating a compiling instruction sequence according to the compiling priority information through a preset compiling scheduler; performing real-time compiling through an end side compiling engine to generate a corresponding executable code; when it is detected that the source code of any to-be-compiled code block is changed, determining a change influence range; and performing incremental compiling on the recompiled atomic code blocks in the change influence range to generate corresponding new executable codes. Through end-side on-demand compilation and change of an influence range tracking mechanism, dynamic on-demand compilation and accurate incremental updating of front-end JS codes are realized, and the application loading efficiency and the resource utilization rate are remarkably improved.

The application discloses a high-precision flow control protocol simulation system and method for large-scale networks, and relates to the field of network operation simulation services.In the system, a user flow control protocol integration module automatically converts a congestion control protocol algorithm or a flow control protocol provided by a user into a BPF program; a congestion control protocol simulation module compiles the BPF program into bytecode capable of being run by a Linux kernel and mounts the bytecode at a hook function.A flow generator generates flow by using the mounted congestion control algorithm or flow control protocol; a data collection and processing module collects and processes the flow of the flow control protocol simulation experiment by using a database; and an experimental network topology management tool generates a network topology and performs a simulation experiment based on the flow generated by the flow generator.The application can reduce simulation overhead, completely and truly reflect complex conditions in an actual network, and thus does not limit the applicability and authenticity of simulation results.

The invention provides a CUDA (Compute Unified Device Architecture) source program compiling method and related equipment based on a universal compiler, and the method comprises the following steps: executing preprocessing operation on source codes of a CUDA source program, and respectively generating a first intermediate file and a second intermediate file; scanning a host side code in the first intermediate file to identify a target function identifier representing equipment side execution semantics, and executing a reconstruction operation on a function containing the target function identifier to generate a proxy function used for triggering equipment side execution; scanning a device side code in the second intermediate file to identify a target function identifier, and performing semantic removal processing on the target function identifier to generate a device side executable function code; generating a host side target file, generating a device side target file, and further generating a device side dynamic link file; and forming a target file. By the adoption of the scheme, the CUDA program can be converted into the target program capable of running on the CPU, and the running environment construction cost is reduced.

A system comprises pulse program compiler circuitry operable to analyze a pulse program that includes a pulse operation statement, and to generate, based on the pulse program, machine code that, if loaded into a pulse generation and measurement circuit, configures the pulse generation and measurement circuit to generate one or more pulses and / or process one or more received pulses. The pulse operation statement may specify a first pulse to be generated, and a target of the first pulse. The pulse operation statement may specify parameters to be used for processing of a return signal resulting from transmission of the first pulse. The pulse operation statement may specify an expression to be used for processing of the first pulse by the pulse generation and measurement circuit before the pulse generation and measurement circuit sends the first pulse to the target.

The invention provides an automatic program compiling method of a three-coordinate measuring machine, a storage medium and electronic equipment, and the method comprises the steps: obtaining the feature information of a to-be-measured part, dividing the feature into a surface feature and a hole feature, and determining a measurement position, a measurement layer number, a scanning point number and a filtering parameter. All the features are grouped, and detection sequences of different groups are sorted; carrying out path planning on the detection of the features in the same group; performing analog simulation according to the three-dimensional models of the to-be-tested part, the clamp and the probe to determine avoidance parameters; determining a measurement reference of each feature, establishing a reference coordinate system, and carrying out spatial degree-of-freedom constraint by using each measurement reference; determining a corresponding reference coordinate system and a projection direction according to each piece of detection information, and generating coordinate information of the detection information relative to a reference according to a spatial relationship between a feature corresponding to the detection information and the reference coordinate system; the pre-compilation parameters are integrated; and substituting the pre-compiled parameter into the target position of the measurement program to generate the measurement program. By means of the technical scheme, automatic compiling of the measuring program of the three-coordinate measuring machine is achieved, and the requirement of a high-precision machining part for measurement is met.

The invention provides a program compiling method and device, equipment and a storage medium, and relates to the field of computers. The method comprises the steps that a host is compiled, a host program package is generated, and the host program package comprises a list file of the host; obtaining a list file and plug-in information of a target plug-in, wherein the target plug-in is a plug-in of a program package obtained after compiling; according to the plug-in information, verifying the host and the target plug-in according to a preset condition, and determining whether the host and the target plug-in conflict or not; if the host plug-in and the target plug-in do not conflict, merging the list files of the host plug-in and the target plug-in to generate a total list file, and replacing the list file in the host program package with the total list file; and integrating the plug-in information into the host program package. According to the method, the plug-in and the host can be independently developed and compiled, so that the plug-in and the host are decoupled, and the plug-in can be applied by any host.

The application provides an interpreter of a reconfigurable cryptographic algorithm based on a customized high-level C language, and belongs to the technical field of information security. The interpreter comprises an input program of a cryptographic algorithm customization language, a compiling optimization module, a generation module of an intermediate file and a data flow graph, a mapping module and an array generation configuration code module. The application provides an automatic mapping tool for a reconfigurable processor, which can take the customized high-level C language as input. The interpreter arranges and connects computing units such as operators according to the program setting mode, so as to complete the mapping of the whole computing function. This mode can not only shorten the development cycle of the reconfigurable system, but also reduce the need for the user's hardware mastering degree, so that the computing function units of each part are mapped to the reconfigurable processor in a more optimized mode, and the performance of the reconfigurable processor is further effectively improved.

This application relates to the field of computer technology, and in particular to a compilation method, electronic device, and medium for masked vector instructions. The method is applied to an electronic device equipped with a compiler; and the method includes: the compiler acquiring a program to be compiled; the compiler determining that the program to be compiled includes first program code, and that the code form of the first program code conforms to the form of a preset conditional operator expression; the compiler generating a first vector instruction based on a first mask and a vector operation expression of the first program code; and the compiler determining that the operation mode of the first program code is a zeroing mode, then generating a second vector instruction. The compilation method for masked vector instructions provided in this application eliminates the need for users to remember and call built-in interfaces related to operation modes during programming, improving the versatility of program code and ease of use, and increasing programming efficiency.

The present application relates to the technical field of software compiling installation, and provides a kind of many-core hybrid compiling method and system, comprising: obtaining the source program after function insertion of the first principle software is inserted;Compiling the source program inserted, and the master-slave core intermediate function and slave core function written, and the target program file generated after the source program is compiled, the master-slave core intermediate function target program file and the slave core function target program file are linked into executable program;And the call logic between source program, master-slave core intermediate function and slave core function is specified.The first principle software can be run on slave core to exert the computing power of slave core, and the problem of hybrid compiling, incremental compiling of first principle software programming language and many-core programming language is solved.