2results about How to "Improved clutter suppression performance" patented technology

This invention provides an adaptive dimensionality reduction clutter suppression method and system for multi-channel radar on a high-speed platform. The method includes: performing spatial dimensionality reduction processing on the original spatiotemporal two-dimensional echo data; transforming it to the beam-pulse domain; performing sub-pulse smoothing processing and quantization on the beam-pulse domain data to obtain multiple sets of sub-aperture data; estimating the covariance matrix of clutter plus noise based on the multiple sets of sub-aperture data; calculating the clutter suppression weight vector for each set of sub-aperture data according to the covariance matrix; performing clutter suppression on the set of sub-aperture data to obtain the clutter suppression result; and coherently accumulating the clutter suppression results of all sets to obtain the final clutter suppression result. This invention achieves better clutter suppression performance with lower computational complexity through beam-sub-pulse smoothing accumulation technology. Furthermore, this invention not only requires fewer training samples but can also expand the training samples to obtain an accurate clutter plus noise covariance matrix, making it suitable for situations with few training samples.

This invention discloses a thin-film bulk acoustic wave resonator structure and its fabrication method, comprising: a substrate; a cavity formed on the substrate; wherein, viewed from above: the cavity has a pentagonal structure with a release port formed on each side of the pentagonal structure; a support ring located on the substrate and surrounding the cavity, with the release ports exposed; a support layer located on the support ring and having a thickness less than that of the support ring; a bottom electrode edge load located above the release ports of the cavity and having a thickness equal to that of the support layer; a bottom electrode located on the support layer and the bottom electrode edge load; a piezoelectric layer located on the bottom electrode; a top electrode located on the piezoelectric layer; a passivation layer; and the periphery of the piezoelectric layer, bottom electrode, support layer, and support ring located on and below the top electrode. This invention improves some performance characteristics of the device and enhances its practicality, reliability, stability, and durability.