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37 results about "Boolean algebra" patented technology

In mathematics and mathematical logic, Boolean algebra is the branch of algebra in which the values of the variables are the truth values true and false, usually denoted 1 and 0 respectively. Instead of elementary algebra where the values of the variables are numbers, and the prime operations are addition and multiplication, the main operations of Boolean algebra are the conjunction and denoted as ∧, the disjunction or denoted as ∨, and the negation not denoted as ¬. It is thus a formalism for describing logical operations in the same way that elementary algebra describes numerical operations.

System and method for multi-dimensional organization, management, and manipulation of data

The Quantum Matrix system is a multi-dimensional, multi-threaded exchange environment for data organization, management, and manipulation. Data is organized into a multi-dimensional structure of nodes. Nodes may represent data, absence of data, or another set of nodes. The multi-dimensional structure or portions of it can be automatically created from a file system. One or more associations are also defined for the multi-dimensional structure. An association indicates a relationship between a node and another node, data, or a set of nodes. The multi-dimensional structure is then displayed three-dimensionally and navigated. Relational logic, Boolean algebra, or a scripting language can be applied to the nodes, data, and associations to produce a resultant set of nodes. Furthermore, portions of the multi-dimensional structure can be isolated with the use of planes to ease navigation. Furthermore, Avatars may be displayed and used for collaborative purposes and to automate the navigation of the multi-dimensional structure.
Owner:QUANTUM MATRIX HLDG

System and method for multi-dimensional organization, management, and manipulation of data

The Quantum Matrix system is a multi-dimensional, multi-threaded exchange environment for data organization, management, and manipulation. Data is organized into a multi-dimensional structure of nodes. Nodes may represent data, absence of data, or another set of nodes. The multi-dimensional structure or portions of it can be automatically created from a file system. One or more associations are also defined for the multi-dimensional structure. An association indicates a relationship between a node and another node, data, or a set of nodes. The multi-dimensional structure is then displayed three-dimensionally and navigated. Relational logic, Boolean algebra, or a scripting language can be applied to the nodes, data, and associations to produce a resultant set of nodes. Furthermore, portions of the multi-dimensional structure can be isolated with the use of planes to ease navigation. Furthermore, Avatars may be displayed and used for collaborative purposes and to automate the navigation of the multi-dimensional structure.
Owner:QUANTUM MATRIX HLDG

System and Method for Muulti-Dimensional Organization, Management, and Manipulation of Remote Data

The Quantum Matrix system is a multi-dimensional, multi-threaded exchange environment for data organization, management, and manipulation. Data is organized into a multi-dimensional structure of nodes. Nodes may represent data, absence of data, or another set of nodes. The multi-dimensional structure or portions of it can be automatically created from a file system. One or more associations are also defined for the multi-dimensional structure. An association indicates a relationship between a node and another node, data, or a set of nodes. The multi-dimensional structure is then displayed three-dimensionally and navigated. Relational logic, Boolean algebra, or a scripting language can be applied to the nodes, data, and associations to produce a resultant set of nodes. Furthermore, portions of the multi-dimensional structure can be isolated with the use of planes to ease navigation. Furthermore, the Quantum Matrix system may have a client-server architecture, with the client running on a mobile device.
Owner:QUANTUM MATRIX HLDG

IP cores in reconfigurable three dimensional integrated circuits

The invention describes IP cores applied to 3D FPGAs, CPLDs and reprogrammable SoCs. IP cores are (a) used for continuously evolvable hardware using 3D logic circuits, (b) applied with optimization metaheuristic algorithms, (c) applied by matching combinatorial logic of netlists generated by Boolean algebra to combinatorial geometry of CPLD architecture by reaggregating IP core elements and (d) used to effect continuous recalibration of IP cores with evolvable hardware in indeterministic environments for co-evolutionary reprogrammability.
Owner:SOLOMON RES

Boolean literal and parameter handling in object relational mapping

Techniques for object relational mapping in database technologies are described herein. According to one embodiment, in response to a query statement for accessing a relational database, a syntax tree is generated to represent semantic information of the query statement, where the query statement has a boolean parameter and is implemented as an SQL object. A data type of the boolean parameter is predicted based on the semantic information obtained from the syntax tree in view of a structure representing the syntax tree. The boolean parameter is configured to be either a numeric value or a string dependent upon metadata used to map the SQL object to the relational database. Other methods and apparatuses are also described.
Owner:RED HAT

Comprehensive stationing system for exhaust gas remote-measuring equipment of motor vehicle

The invention discloses a comprehensive stationing system for the exhaust gas remote-measuring equipment of a motor vehicle. The system comprises a stationing module based on the road similarity, a stationing module based on a road network topological structure, and a stationing module based on particular vehicle routes. According to the technical scheme of the invention, the stationing module based on the road similarity is implemented based on the road similarity-based stationing method of motor vehicle exhaust gas remote-measuring equipment. The stationing module based on the road network topological structure is implemented based on the graph theory-based stationing method of motor vehicle exhaust gas remote-measuring equipment. The stationing module based on particular vehicle routes is implemented based on the graph theory and Boolean algebra-based stationing method of motor vehicle exhaust gas remote-measuring equipment, wherein the site selecting and the stationing of exhaust gas remote-measuring equipment are conducted for the general investigation on the exhaust gas of an urban public transportation system. The above three modules can be independently used and can also be combined to use. Therefore, stationing scheme designs for different targets can be realized.
Owner:UNIV OF SCI & TECH OF CHINA

Model building and optimizing method for functional block program of EPA distributing control system

The invention takes an EPA field bus distributed type control system as an experimental platform and provides a programming modeling and optimization method based on a state space model aiming at an IEC61131-3 function block diagram programming language. On the basis of constructing a mathematical model to the algorithms of all the function block encapsulations, the method respectively maps the DI, AI, DO, AO and an internal memory unit of the system into the input vector, the output vector and the state vector of the model, establishes the state space model which controls the program according to the logic relationship between the function blocks which is determined by the mathematical model of the function blocks and the configuration form of the program, and describes the interaction relationship among the system input, the internal state and the output. The invention also applies methods such as a logic algebraic formula, a Karnaugh map and a timer combination and the like to simplify the state space model, and carries out re-programming to the simplified model, thus realizing the optimization of the programming control.
Owner:DALIAN UNIV OF TECH

Vehicle self-organizing network routing selection method

ActiveCN106792970AOptimal Transmission Routing SchemeStrict transfer rate valueNetwork topologiesHigh level techniquesNetwork serviceSelf-organizing network
The invention relates to a vehicle self-organizing network routing selection method and belongs to the technical field of wireless communication and particularly the technical fields of vehicle self-organizing network. In order to solve the problem that a source vehicle in the vehicle self-organizing network cannot be directly connected with a target vehicle and multi-hop message forwarding of a transmission route via relay vehicles needs to be selected, all candidate routes between the source vehicle and the target vehicle are determined by adopting a logical algebraic algorithm, a random arrival curve of different services of the source vehicle and a random service curve of the relay vehicles of the candidate routes are modeled by adopting the random network calculus theory, corresponding end-to-end delay and transmission rate performance of the services, transmitted via the candidate routes, of the source vehicle is evaluated, the candidate route with the optimal transmission performance is selected on the basis of service requirements of the source vehicle, and selection of the routes is optimized. Service performance of the source vehicle and relay forward performance of the relay vehicles of the candidate routes are comprehensively considered, so that the transmission performance of the vehicle self-organizing network service is optimized, and broad application prospect is achieved.
Owner:CHONGQING UNIV OF POSTS & TELECOMM

Network Congestion Reduction using Boolean Constrained Multipath Routing

A packet routing method includes computing, for a source node in the data network and a destination node in the data network, a set of multiple routes providing a set of shortest routes from the source to the destination that satisfy all the truth assignments for the Boolean algebra available from the path in the network. The method selects, for a packet flow, a route where logical conjunction of the policy constraints of the flow and the route is satisfied and where the route has sufficient bandwidth.
Owner:RGT UNIV OF CALIFORNIA

Three-dimensional digital particle image generation device and three-dimensional digital particle image generation method based on excitation suction

ActiveCN104931397AStable 3D ImagingDoes not interfere with imagingParticle size analysisImaging processingMorphological processing
The invention discloses a three-dimensional digital particle image generation device and a three-dimensional digital particle image generation method based on excitation suction. An imaging module and a sucking module of the device are arranged on the same side of a light-transmitting piece. The light-transmitting piece is arranged on the upper surface of a flow pass and is positioned in a magnetic field generated after electrification of the center of a light path of the imaging module and the sucking module. The sucking module sucks particles to the lower side of the light-transmitting piece. The imaging module is provided with a focusing mechanism used for adjusting focus to acquire images with different focal planes. An image processing module is used for dividing focal plane ranges of the images with the different focal planes through different difference operators and wavelet image processing, measuring three-dimensional surfaces of magnetic particles according to a morphological processing method and overlapping the images with the different focal planes through Boolean algebra operation to recreate a new particle image. The particles are sucked on the same plane by the sucking module, the images with the different focal planes are acquired to be synthesized, and the clear and stable three-dimensional digital particle image is generated.
Owner:GUANGZHOU MECHANICAL ENG RES INST

Multi-machine information processing method and device for automatic generation of Boolean algebra

The invention relates to a multi-machine information processing method for automatic generation of Boolean algebra, which adopts a client / server mode to realize the multi-machine automatic generation of the Boolean algebra. The information processing method comprises the following steps that: 1) a server divides a source file and sequentially transmits the divided source files to a client; 2) the client receives the source files, generates Boolean algebra files, and transfers the Boolean algebra files to the server; and 3) the server receives the Boolean algebra files and combines the Boolean algebra files. Compared with the prior art, the invention has the advantages of strong asynchronous decomposition, strong computing power, high system compatibility, good expansibility and the like.
Owner:CASCO SIGNAL

Bit mark character string retrieval technique

The invention relates to a string retrieval technique using a bit to correspond to a plurality of character elements and uses n bits to correspond to all character elements. All character elements are divided into n groups, and n bits of one data which are all 0 and noted as W are used for marking the character element information of string groups. If a character element P1 of string S belongs to the n group, the n bit of W is marked as 1, and similarly, W is marked according to the groups of other character elements P2, P3, P3, and the like of S to finish marking W of all character elements. Information recording S is called a bit value of S and the mode is called 1 marking. According to logic algebra principle, n bits of one data which are all 1 and noted as W can also be used for marking the character element information forming the strings. If one character element P of S belongs to the n group, the corresponding n bit of the data W is marked as 0, and the mode is called 0 marking. Whether Sb does not include, includes or may include all character elements of the retrieval key word Sb can be judged by comparing bit value Wa of Sa, Wa and bit value Wb of Sb, and Wb of Sb. For example, bit implication calculation is carried out on Wa and Wb. If all bits have implication relation, Sb includes or may include all character elements of Sa. If necessary, such result can be got by a bit-by-bit character comparison method. Bit marking can be used for normal retrieval, as well as for reverse retrieval. If bit n used for marking is over two times of the average length m of the string, combination of bits corresponding to a group of character elements can be used for marking to improve screening efficiency, and the method is called multi-bit marking. For multi-bit marking, bit-by-bit character comparing method can also be used for finally judging whether the Sb includes Sa.
Owner:徐文新

Method and device for determining pipe failure probability

The invention discloses a method and a device for determining pipe failure probability, wherein the method and the device belong to the technical field of an oil gas pipe system. The method comprisesthe steps of determining a third-party damage failure probability based on a damage type, a damage generation grade and a plurality of damage prevention measures; determining a geological disaster failure probability based on a disaster generation grade, a disaster leakage grade and a disaster protection measure which corresponds with the disaster type; determining an outer corrosion failure probability based on the operation pressure and the pipe wall thickness of a target pipe, and at least one outer corrosion generation grade and a plurality of outer corrosion prevention measure grades; anddetermining an inner corrosion failure probability based on the operation pressure, the pipe wall thickness, an inner corrosion generation grade and a plurality of inner corrosion prevention measuregrades. Furthermore, based on the third-party damage failure probability, the geological disaster failure probability, the outer corrosion failure probability and the inner corrosion failure probability, the failure probability of the target pipe is determined through Boolean algebra or Boolean operation, and accuracy in identifying risk grade of the target pipe is improved.
Owner:PETROCHINA CO LTD

Logic expression extraction and switch level design method of CMOS transmission gate logic circuit

The invention discloses a logic expression extraction and switch level design method for a CMOS transmission gate logic circuit, and the method comprises the steps: carrying out the expansion of a Boolean algebra system, and obtaining an expanded Boolean algebra system; a CMOS transmission gate logic circuit establishing a corresponding switch level signal flow graph model; extracting the equivalent signal flow graph model of the circuit output function by the model, and obtaining the switch-level function expression of the circuit by combining the switch-level signal flow graph model with an extended Boolean algebra system, so that the CMOS transmission gate logic circuit is obtained. According to the CMOS transmission gate logic circuit designed through the method, the number of required MOS tubes is small, the number of required connection wires is small, power consumption can be reduced, and the chip area can be saved; and the designed switch level CMOS transmission gate logic circuit is full in swing amplitude, and is suitable for the design of a low-power consumption CMOS circuit.
Owner:HUAIBEI NORMAL UNIVERSITY

Automatic testing system and method for interlocking system

The invention discloses an automatic test system and method for an interlocking system, and the system comprises a test case generation module which combines interlocking data of a tested station with general business logic, and generates test cases of the tested station one by one; the subsystem simulation module is used for simulating a vehicle-mounted CC and / or a zone controller ZC and / or adjacent station interlocking, and acquiring a control message of sending a code bit to an interlocking controller of a tested station; the test case execution module sends the selected test cases to the interlocking controller one by one in the form of code bits, and the interlocking controller performs automatic testing according to the code bits in the received data; the Boolean algebraic calculation module is used for substituting the current value of the Boolean variable into the corresponding interlocking logic expression for calculation to obtain an actual test result; and the test result judgment module is used for comparing a preset test expected result with an actual test actual result one by one and giving a test result. According to the invention, the test efficiency is improved, and more test scenes are provided.
Owner:浙江众合科技股份有限公司

Evaluation and analysis method for causal mechanism of urban dust-haze and motor vehicle fuel

The invention discloses an evaluation and analysis method for the causal mechanism of urban dust-haze and motor vehicle fuel. The method comprises: firstly establishing an event tree evaluation systemof ''dust-haze weather-motor vehicle exhaust gas excessive emissions'' by identifying and distinguishing the direct and potential causes of a large amount of fuel tail gas emissions from motor vehicles, and then based on Boolean algebra, structural importance and fuzzy importance analysis, combining statistical data and expert scoring, fuzzifying the probability of occurrence of basic risk eventsby using the triangular fuzzy number, so as to qualitatively and quantitatively evaluate the contribution and impact of basic risk events on dust-haze weather. According to the invention, the probability of occurrence of basic risk events is fuzzified in a mode of combining statistical data and expert scoring, thereby further improving the reliability and practicability of the analysis result. The method can provide a set of scientific and effective new ideas and methods for the analysis of the causal mechanism of the urban dust-haze weather and motor vehicle fuel in China, and for the prevention and control and management of risk factors.
Owner:DONGGUAN UNIV OF TECH

Method of translating Boolean algebra into basic algebra

Substituting words written in basic algebra for equivalent words written in Boolean algebra so as to translate Boolean algebra into basic algebra; more generally, summing combinational identity functions factored by their corresponding output values to convert a gate table into basic algebra. The resulting expressions of basic algebra can be simplified and evaluated in the usual straightforward manner.
Owner:CALIFORRNIAA EURICA

Method and device for determining failure probability of pipeline

The invention discloses a method and a device for determining pipe failure probability, wherein the method and the device belong to the technical field of an oil gas pipe system. The method comprisesthe steps of determining a third-party damage failure probability based on a damage type, a damage generation grade and a plurality of damage prevention measures; determining a geological disaster failure probability based on a disaster generation grade, a disaster leakage grade and a disaster protection measure which corresponds with the disaster type; determining an outer corrosion failure probability based on the operation pressure and the pipe wall thickness of a target pipe, and at least one outer corrosion generation grade and a plurality of outer corrosion prevention measure grades; anddetermining an inner corrosion failure probability based on the operation pressure, the pipe wall thickness, an inner corrosion generation grade and a plurality of inner corrosion prevention measuregrades. Furthermore, based on the third-party damage failure probability, the geological disaster failure probability, the outer corrosion failure probability and the inner corrosion failure probability, the failure probability of the target pipe is determined through Boolean algebra or Boolean operation, and accuracy in identifying risk grade of the target pipe is improved.
Owner:PETROCHINA CO LTD

Gene processing method and device based on Boolean algebra and readable storage medium

The invention discloses a gene processing method and device based on Boolean algebra and a readable storage medium, and the method comprises the steps: carrying out the Boolean coding on obtained genedata, and obtaining an original data matrix; performing matrix decomposition on the original data matrix based on Boolean algebra to obtain a mode matrix and a residual matrix; performing lossless compression on the mode matrix to obtain mode compression data, and performing lossless compression on the residual matrix to obtain residual compression data; and when a decoding instruction is received, decoding the mode compressed data and the residual error compressed data to obtain a mode matrix and a residual error matrix, and restoring the original data matrix from the mode matrix and the residual error matrix based on the Boolean algebra. According to the method, Boolean encoding is carried out on gene data by utilizing Boolean algebra, a gene mode matrix and a sample mode matrix obtained by matrix decomposition serve as dimension reduction representation of original data, and the method and device can be used for compressing storage data as well as analyzing data to obtain common modes of genes and common modes of samples.
Owner:广州达美智能科技有限公司

A minimum cut set solving method for analyzing a vacuum drying operation explosion accident tree

InactiveCN109710232ASimplify the analysis and calculation processEasy to understandCreation/generation of source codeNODALTheoretical computer science
The invention relates to the field of accident tree analysis, in particular to a minimum cut set solving method based on a subsequent traversal accident tree in vacuum drying operation explosion accident tree analysis. The method specifically comprises the following steps that firstly, a burning explosion accident tree of vacuum drying operation is constructed, and logic gates, father nodes and all child nodes of all nodes in a tree structure are defined; then, based on subsequent traversal, not repeatedly accessing all nodes in the tree from left to right and from bottom to top in sequence; when a root node of the subtree is accessed, set transformation of a Boolean algebra operation law is carried out according to a logic gate of the current root node, so that symbol operation simplification of the Boolean algebra is realized in a computer; and finally, solving the minimum cut set of the burning and blasting accident tree based on the subsequent traversing accident tree. The algorithm has been implemented in a computer using Java language object-oriented programming. The method has the advantages of popular and understandable analysis and calculation process, high operation speed, accurate analysis result and the like.
Owner:NANJING UNIV OF SCI & TECH

Layout correcting method and layout correcting system

A layout correcting method and a layout correcting system are provided. The layout correcting method includes the following steps. An integrated circuit design layout is provided. A plurality of performance parameters of the integrated circuit design layout are analyzed. A plurality of devices under test is selected according to the performance parameters. A computer simulating process is performed on the devices under test and a direct probing process is performed on the devices under test. The direct probing process is an on-chip test for comparing each device under test and an environment condition thereof by a Boolean algebra algorithm. A plurality of differences between the results of the computer simulating process and the direct probing process is analyzed. The integrated circuit design layout is corrected according to differences between the results of the computer simulating process and the direct probing process.
Owner:UNITED MICROELECTRONICS CORP

Demonstration device for proving logic algebra common formula

The invention discloses a demonstration device for proving a logic algebra common formula. The demonstration device is used for proving that the logic algebra common formula is workable, namely, in an AND / OR expression, a product term A is included, if NOR of the A and OR of other variable B form another product term, in the another product term, the NOR of the product terminal A is redundant; the demonstration device comprises a first demonstration circuit and a second demonstration circuit in parallel connection, and a power supply serially connected with the first demonstration circuit and the second demonstration circuit which are in parallel connection; the first demonstration circuit shows the logical combination of the AND / OR expression in the logic algebra common formula to be proved; and the second demonstration circuit shows the logical combination of the AND / OR expression in the logic algebra common formula to be proved. Based on the design of visualized graphic thinking mode, the demonstration device provided by the invention can effectively enhance the understanding of the beginners facing the common logical problems in digital circuits, thereby effectively promoting the teaching effect.
Owner:SHANGHAI SECOND POLYTECHNIC UNIVERSITY

Network congestion reduction using boolean constrained multipath routing

A packet routing method includes computing, for a source node in the data network and a destination node in the data network, a set of multiple routes providing a set of shortest routes from the source to the destination that satisfy all the truth assignments for the Boolean algebra available from the path in the network. The method selects, for a packet flow, a route where logical conjunction of the policy constraints of the flow and the route is satisfied and where the route has sufficient bandwidth.
Owner:RGT UNIV OF CALIFORNIA

Logic Expression Extraction and Switch Level Design Method for CMOS Transmission Gate Logic Circuit

The invention discloses a logical expression extraction and switch-level design method of a CMOS transmission gate logic circuit, which expands the Boolean algebra system to obtain the extended Boolean algebra system; the corresponding switch-level signal flow diagram is established by the CMOS transmission gate logic circuit From this model, the equivalent signal flow graph model of the output function of the circuit is extracted, and the switch-level function expression of the circuit is obtained by combining the switch-level signal flow graph model with the extended Boolean algebra system, thereby obtaining the CMOS transmission gate logic circuit . The CMOS transmission gate logic circuit designed by the method of the present invention requires less MOS tubes and fewer connections, which can reduce power consumption and save chip area; and the designed switching level CMOS transmission gate logic circuit It is full-swing and suitable for the design of low-power CMOS circuits.
Owner:HUAIBEI NORMAL UNIVERSITY

A machining quality control method for automobile parts

The invention discloses a machining quality control method for automobile parts, which comprises the following steps: inputting engineering information for parts based on part geometric features and machining process, combining with the requirements of users, determining the quality characteristics of the products; establishing the adjacency matrix A between Si and Sj; Adjacency matrix A plus identity matrix I gives A1= (A + I) such that Ak=Ak-12 (K=1, 2, 3, ...n), according to Boolean algebra, we can get the matrix K=Ak-1=(A+I); In the matrix K, the nj column corresponding to the ni-th row with the value of 1 is used to establish the set Mj, from which the Sj is found to be added and sorted, and the factors affecting the quality characteristics of the part in the first layer are found tobe the maximum of the Sj addition value, and so on. According to the factors of the first layer, the second layer, the third layer, and the n layer affecting the quality characteristics of the parts,the key factors are found out for grading control, so that the qualified rate of the parts can be improved and the production cost of the automobile can be saved.
Owner:HEFEI CHANGQING MACHINERY

Demonstration device for proving logic algebraic formula A (A+B) =A

The invention discloses a demonstration device for proving a logic algebraic formula A (A+B) =A. The demonstration device is used for providing the establishment of the logic algebraic formula A (A+B) =A, i.e. if an and-or expression comprises a product term A and the or A+B of the and other variable B form another product term, the other product term A+B is needless. The demonstration device comprises a first demonstration circuit and a second demonstration circuit which are connected in parallel, and a power supply which is serially connected with the first demonstration circuit and the second demonstration circuit which are connected in parallel, wherein the first demonstration circuit denotes the logic combination of the A (A+B) of the and-or expression in the logic algebraic formula A (A+B) =A which is required to be proved; and the second demonstration circuit denotes the logic combination of the product term A in the logic algebraic formula A (A+B) =A which is required to be proved. By adopting a visualized graphic thinking design, the demonstration device can effectively enhance the ability of beginners in understanding common logic problems in digital circuits, so as to effectively improve teaching effects.
Owner:SHANGHAI SECOND POLYTECHNIC UNIVERSITY

A Method for Layout of Motor Vehicle Exhaust Remote Measurement Equipment Based on Graph Theory and Boolean Algebra

The invention relates to a graph theory and Boolean algebra-based position arrangement method for automotive exhaust remote measurement devices. For urban buses, the arrangement positions of the automotive exhaust remote measurement devices in an urban road network are searched for to achieve the goal of real-time efficient monitoring of bus exhaust emission situations. The method comprises the steps of firstly, based on a hypergraph related principle in a graph theory, converting a bus running route into a bus route hypergraph, and converting a position arrangement problem of bus exhaust remote measurement devices into a minimum transverse solving problem of the bus route hypergraph according to minimum transverse and transverse hypergraph concepts; secondly, working out all minimum transverse sets of the bus route hypergraph by using a Boolean algebra related principle; and finally, obtaining the minimum transverse sets, namely, minimum monitored road section sets, of the bus route hypergraph, and determining the arrangement positions of the bus exhaust remote measurement devices in the urban road network. Compared with an existing monitor position arrangement scheme, the method specially aims at an urban bus system and is more unique; a solving algorithm is simple and easy to realize; and the method is better in operability.
Owner:UNIV OF SCI & TECH OF CHINA

A comprehensive distribution system for motor vehicle exhaust remote measurement equipment

The invention discloses a comprehensive point distribution system for motor vehicle exhaust telemetry equipment, which includes a point distribution module based on road similarity, a point distribution module based on road network topology and a specific vehicle route based point distribution module. The point distribution module based on road similarity is realized by using a road similarity-based method for the distribution of motor vehicle exhaust remote sensing equipment; the point distribution module based on road network topology uses a graph theory-based distribution algorithm for motor vehicle exhaust remote sensing monitoring equipment To achieve; based on the layout module of specific vehicle routes, use a method of vehicle exhaust telemetry equipment layout based on graph theory and Boolean algebra to realize the site selection and layout of exhaust telemetry equipment for the census of exhaust gas in urban public transport systems. The three modules can be used alone or in combination to realize the layout scheme design for different goals.
Owner:UNIV OF SCI & TECH OF CHINA
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