22 results about "Queue manager" patented technology

The present application relates to a data acceleration processing method and apparatus, a chip, a device, and a readable storage medium. The method comprises: receiving a trigger message for a data processing task, the trigger message comprising pointer information of a queue, the pointer information of the queue being address information of the queue in a memory, and the queue being used for storing a task descriptor of the data processing task; updating the pointer information of the queue to a queue manager for scheduling by a queue scheduler; when the queue is selected by the queue scheduler, transmitting the pointer information of the queue to a descriptor cache acquisition unit, so as to notify the descriptor cache acquisition unit to acquire the task descriptor of the data processing task from the memory; and selecting an idle engine from among a plurality of identical data acceleration processing engines as a target engine, and executing the data processing task on the basis of the task descriptor by means of the target engine.

The invention discloses a hierarchical priority task orderly scheduling method based on a virtual thread, which comprises the following steps: S10, receiving task parameters transmitted by a business layer, performing task packaging setting, outputting packaged task objects, and transmitting the packaged task objects to a multi-dimensional calibrator; s20, performing task expiration verification, task fusing verification and dependency verification in the multi-dimensional verifier, returning a passing or failing identifier and a failing reason, and if the passing or failing identifier does not pass, triggering a monitoring alarm to record a discard log; s30, the verified tasks enter a two-dimensional queue manager to be subjected to hierarchical enqueue processing and capacity dynamic adjustment, and the capacity dynamic adjustment uses a dynamic resource allocator to achieve elastic allocation of queue capacity and virtual threads based on load awareness; and S40, performing task execution and task retry management on the tasks in the two-dimensional queue.

The invention discloses an abnormal data real-time filtering method and system based on edge computing in a dynamic environment system, the method is executed by an edge computing gateway, sliding window weighted average preprocessing is equivalently realized by adopting integer shift operation, and the single computing overhead is controlled within 50 clock cycles; dynamically and adaptively adjusting dynamic reference model parameters based on the ratio of the network load to the sensor sampling frequency; performing multi-stage anomaly filtering of a hard threshold value, a mutation rate and a statistical interval on the data through a three-stage pipeline judgment structure executed by atomization; an FPGA hardware queue manager independent of a main processor bypasses a TCP stack to push abnormal data at the highest priority, and redundant data is stored in a zero-copy annular buffer area managed by DMA. According to the invention, the problems of intranet congestion, server I / O bottleneck and alarm delay under the centralized architecture of the traditional dynamic loop system are solved, and the fault, fault, fault, fault, fault and fault are realized on resource-limited platforms such as Cortex-M4 and the like; the average alarm delay is 8 milliseconds; and the data compression rate is more than 90%.

The invention relates to the technical field of chip micro-architecture, and provides a task assignment system and a computing chip wherein the system comprises a central controller and a plurality of computing units; the central controller comprises a queue manager, and the queue manager is used for managing task queues in the central controller; identifiers of a plurality of to-be-processed task blocks are stored in the task queue; the computing unit is used for sending a task request to the queue manager under the condition that any task block is completed; the queue manager is used for responding to the task request, acquiring an identifier of a to-be-processed target task block from the managed task queue, and returning the identifier of the target task block to the computing unit corresponding to the task request; and the computing unit is also used for receiving the identifier of the target task block and performing task execution based on the identifier of the target task block, so that full utilization of chip computing resources is realized, a'trailing effect 'that other computing units are forced to be idle and wait due to long time consumption of individual tasks is avoided, and the overall operation performance is improved.

The application relates to the technical field of chip micro-architecture, and provides a task dispatching system and a computing chip, wherein the system comprises a central controller and a plurality of computing units; the central controller comprises a queue manager, the queue manager is used for managing a task queue in the central controller; the task queue stores the identities of a plurality of to-be-processed task blocks; the computing unit is used for sending a task request to the queue manager when any task block is completed; the queue manager is used for responding to the task request, obtaining the identity of a target task block to be processed from the managed task queue, and returning the identity of the target task block to the computing unit corresponding to the task request; and the computing unit is further used for receiving the identity of the target task block and performing a task based on the identity of the target task block, so that the computing resources of the chip are fully utilized, the "tail effect" that other computing units are forced to idle and wait due to long time consumption of individual tasks is avoided, and the overall operation performance is improved.

The invention relates to the technical field of digital information transmission, and discloses an industrial heterogeneous network multi-protocol fusion networking and communication system, which comprises a heterogeneous access and semantic classification engine used for analyzing a native data identifier to determine an industrial service grade and dynamically redirecting the grade according to a system state context; the multi-dimensional dynamic queue manager is used for isolating the data frames to the virtual channel queues according to levels and monitoring the queue depth to generate priority-based flow control pause signals; according to the invention, the semantic blindness of a transmission layer is solved at a gateway entrance, and a deterministic transmission channel which is free from non-real-time data flow blocking is provided for key real-time data through mechanism coupling of industrial semantic perception and strict priority scheduling.

The invention relates to the technical field of computer programming, in particular to a priority-based pop-up window management method and system, electronic equipment and a medium. The method comprises the following steps: importing related classes; constructing a suspended function as a corresponding popup task for the popup, and instantiating the asynchronous result container as a decision result container corresponding to the popup task; acquiring the priority of the pop-up window task, and adding the pop-up window task into a pop-up window task queue based on the priority of the pop-up window task through a queuing method of a pop-up window queue manager; starting a coroutine in the coroutine action range, executing the pop-up window tasks in the pop-up window task queue according to the sequence, executing the pop-up window tasks, and obtaining a result value in a corresponding decision result container; if the result value is the preset value, executing the next pop-up window task in the pop-up window task queue in sequence; and if the result value is not the preset value, stopping executing all follow-up window popup tasks. According to the method, interface conflicts and memory leakage risks can be avoided, and the maintainability and reusability of codes are improved.

One embodiment provides for a media playback device comprising a memory device to store instructions; one or more processors to execute the instructions stored on the memory device, the instructions to cause the one or more processors to provide a playback queue manager to manage one or more media playback queues including a set of media items associated with a scheduled event and a playback routing manager to determine an output destination for the set of media items based on context associated with the scheduled event, the playback routing manager to route output of playback of the set of media items to one or more of multiple different connected media playback devices based on the context associated with the scheduled event.

In an embodiment, a processor may include multiple processing engines and multiple hardware queue manager (HQM) devices. Each HQM device is to queue data requests for a different subset of the plurality of processing engines. At least one processing engine is to execute a first set of instructions to: detect a first enqueue instruction to enqueue data in a first HQM device of the plurality of HQM devices; in response to a detection of the first enqueue instruction, perform a look-up of the first HQM device in a data structure to determine a recommended port for the first HQM device; and transmit the first enqueue instruction using the recommended port for the first HQM device.

The application relates to the technical field of cloud sandbox automatic recovery, and provides a DNS state identification and concurrent control cloud sandbox automatic recovery method, which comprises the following steps of S1, intercepting a sandbox access request of a client, extracting a sandbox unique identification and querying a DNS record, determining a sandbox state according to a DNS return result; S2, if the sandbox is in a pause state, serializing processing of concurrent requests through a queue manager, and triggering a single recovery operation; S3, starting a recovery processing process, calling a recovery interface, and completing state verification and snapshot information retrieval; S4, initializing a virtualization environment based on the snapshot information, loading a sandbox state, and completing start and readiness detection; S5, after the sandbox is successfully recovered, updating a DNS record to map a real running node; and S6, broadcasting a recovery result to all waiting requests, forwarding an original access request, and completing response. The application aims to provide a completely transparent sandbox access experience for users, and greatly reduces infrastructure cost and system operation and maintenance complexity.

The invention discloses a wafer reloading optimization system, mounting equipment and a wafer reloading optimization method, and belongs to the technical field of wafer mounting. According to the system, a state storage module takes a material type corresponding to a to-be-mounted wafer disc reserved on a working area station as ending state information and stores the ending state information under the condition that a first mounting task is ended; the sequence decision engine reads the end state information under the condition that the second surface mounting task is started, and generates a surface mounting sequence with the minimum material changing frequency according to the scheduling priority by taking the material type corresponding to the end state information as a starting point; and the task queue manager groups and rearranges the original mounting points according to the material types according to the mounting sequence, generates a task queue of the to-be-executed tasks, skips the completed part according to the mounted material set under the condition that the to-be-executed tasks are interrupted, and executes the remaining tasks. According to the system, the switching frequency of the wafer disc is reduced on the premise that the hardware cost is not increased.

Disclosed herein are insertion schemes that enable the division of a queue into one or more sub-queues to more efficiently manage the insertion of queue elements. Typically, a computing device will have a primary buffer populated with queue elements for execution by a processor. However, the amount of contiguous memory space allocated for the primary buffer is fixed. To address this issue, a queue manager can insert an indicator linked to a secondary buffer into the primary buffer to extend the number of active entries in the primary buffer.

The invention discloses a flash memory controller, a solid state disk controller and electronic equipment, and belongs to the technical field of storage. The flash memory controller comprises a queue manager and a flash memory processor; the queue manager is coupled with the flash memory processor; the queue manager is used for managing a command queue aiming at a flash memory crystal grain, the command queue comprises a flash memory operation command to be executed, and the flash memory operation command comprises at least one of a cache reading command and a cache programming command; and the flash memory processor is used for executing the flash memory operation command.

The utility model relates to a high-precision multi-sensor integrated system of a mobile robot, which comprises a three-level framework consisting of sensor access units, a high-speed network communication layer and a computing control host, the plurality of sensor access units are accessed to the computing control host through the high-speed network communication layer, the sensor access units are pluggable peripheral modules, and the peripheral modules are connected with the computing control host through the high-speed network communication layer. The computing control host is a host module, and the peripheral module is connected with the host module through a network interface; the peripheral module is integrated with universal sensor interfaces, and each interface is provided with a protocol conversion chip; the peripheral module is connected with the operation control host through an Ethernet switch and a CAN FD bus, a hardware queue manager is deployed on the high-speed network communication layer, transmission priorities are distributed according to sensor data types, and control signals are ensured to be transmitted preferentially. According to the utility model, through the design of an extensible hardware module, a high-speed network communication architecture and an open software interface, plug-and-play and flexible extension of sensor peripherals are realized, and the system compatibility is remarkably improved.

A hardware-based queue manager (100) is implemented in a network accelerator (500). The queue manager can receive input from a processor core into a register set designated for the processor core. Other register sets can be designated for other processor cores. The queue manager reads the input in the register set, which triggers the queue manager to start a transaction, such as reading or writing to a queue data structure in a data memory (114). The queue data structure can handle multiple sizes of queue data structures.

The application relates to a cache and log-based local queue data persistence method. The method comprises the following steps: when the system is started, three local queues are initialized and registered in a queue manager; service data is continuously pushed to a main queue and a copy queue, a main queue consumption thread pulls data, executes data processing services, and pushes the processed data to a to-be-deleted queue; copy data is written into a local log file, a copy queue consumption thread pulls data, and the copy data is cyclically backed up to a Redis cluster, and the corresponding data in the log file is deleted after backup; the to-be-deleted queue receives data output by the main queue data processing service, a consumption thread pulls data and compares the data with the data backed up in the Redis cluster, and the same data is deleted; when the system is restarted, the inventory data in the Redis cluster is inquired and loaded into the main queue for re-consumption; and the queue manager receives registration information of the queue and monitors the capacity of the local queue.

The subject technology is directed to an apparatus for managing data packets in a network. In an embodiment, the apparatus comprises a first memory configured to store a plurality of packets. The apparatus further comprises a queue manager configured to receive a plurality of packet descriptors and generate an aggregated packet descriptor based on the plurality of packet descriptors. The apparatus further comprises a traffic manager coupled to the queue manager. The traffic manager is configured to determine a transmission order for the plurality of packets based on the aggregated packet descriptor. A transmitter is coupled to the traffic manager and configured to transmit the plurality of packets based on the determined transmission order. This configuration enables efficient packet storage, aggregation, and transmission scheduling, optimizing overall network performance and resource utilization. There are other embodiments as well.

This invention relates to accelerating network security monitoring. Generally discussed herein are systems, apparatuses, and methods for network security monitoring (NSM). A hardware queue manager (HQM) can include an input interface to receive first data from at least a first worker thread, a queue replication circuit to generate a copy of at least a portion of the first data to create first copy data, and an output interface to (a) provide the first copy data to a second worker thread and / or (b) provide at least a portion of the first data to a third worker thread.

The invention discloses a switch priority flow control method and device, equipment and a storage medium, and relates to the technical field of communication, and the method comprises the steps: obtaining real-time flow data of different priority flows; calculating a flow control parameter according to the real-time flow data to obtain a first control instruction; dividing a high-priority bandwidth and a low-priority bandwidth based on the first control instruction to obtain a first allocation result; predicting a future load based on the historical flow sequence to obtain predicted load data; updating a queue threshold value and a bandwidth allocation proportion according to the predicted load data and the first allocation result to obtain a second control instruction; and issuing the second control instruction to the port queue manager and the bandwidth allocation unit, so that the port queue manager controls the queue length according to the updated queue threshold, and the bandwidth allocation unit schedules the flow according to the updated bandwidth allocation proportion, thereby realizing a dynamic adjustment mechanism, optimizing the flow control strategy in real time according to the network load condition, and improving the flow control efficiency. And the method adapts to different traffic load scenes.

The application discloses a floating point calculation performance monitoring device and a monitoring method thereof, and relates to the technical field of computers, and specifically comprises the following modules: a data acquisition module that receives instructions sent by a client and acquires floating point calculation data signals generated by a CPU in real time; a feature extraction module that comprises an extraction unit and extracts floating point calculation data information features; a data scheduling module that comprises a queue scheduler and a queue manager, wherein the queue scheduler and the queue manager are connected with floating point registers; a data monitoring module that monitors the floating point calculation data information features; and a data recovery module that comprises a first statistical unit for acquiring target floating point calculation data information data sets and a second statistical unit for acquiring called floating point calculation data information data sets. The application monitors multiple data queues through the data monitoring module, improves the monitoring efficiency, and recovers lost floating point calculation data information.

Provided is a memory controller including an interface including a plurality of pins configured to communicate with a memory apparatus, a queue manager configured to control a first queue to store control information for controlling an operation of the memory apparatus storing or reading data and a second queue to store data transmission information for controlling transmission of the data, and an interface controller configured to shut off power to at least one pin among the plurality of pins based on the first queue and the second queue.

The present disclosure is directed to a shared first-in-first-out (FIFO) queue architecture in a computing device, such as a network device, that allows lock-free, concurrent access to a writer process (writer) and one or more reader processes (readers). The writer enqueues information provided to the computing device. One or more readers dequeue the information and process the information. A queue manager provides an interface to the shared queue to allow the writer to push data onto the queue and readers to access the queue; e.g., peek and pop the queue. The readers inform the writer when they perform dequeue operations so that the writer knows when to age out queue entries for deletion from the queue.