5results about "Stacked resist layers" patented technology

To solve problems with the prior art.SOLUTION: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a package substrate with a die side and a land side. In an embodiment, a pad is on the land side. In an embodiment, a dielectric layer covers sidewalls of the pad, and a surface finish is over an exposed surface of the pad.SELECTED DRAWING: Figure 1A

Techniques for low- or zero-misaligned vias are disclosed. In one embodiment, a high-photosensitivity, medium-photosensitivity, and low-photosensitivity layer are applied to a substrate and exposed at the same time with use of a multi-tone mask. After being developed, one layer forms a mold for a first via, one layer forms a mold for a conductive trace and a second via, and one layer forms an overhang over the position for the second via. The molds formed by the photosensitive layers are filled with copper and then etched. The overhang prevents the top of the copper infill below the overhang region from being etched. As such, the region under the overhang forms a pillar or column after etching, which can be used as a via. Other embodiments are disclosed.

An electronic device includes a substrate having a surface, a first conducting layer disposed on the surface of the substrate, a second conducting layer disposed on the first conducting layer, a first electronic component disposed on the first conducting layer and electrically connected to the first conducting layer, and a second electronic component disposed on the second conducting layer and electrically connected to the second conducting layer. The second conducting layer is disposed between the first conducting layer and the second electronic component. In a cross-section view, the first electronic component is overlapped with the second conducting layer along a direction parallel to the surface of the substrate.

An electronic device with an active region comprising a substrate; a first conducting layer, disposed on the substrate, comprising a first pad in the active region; a second conducting layer, disposed on the first conducting layer, comprising a second pad in the active region; a first electronic component, disposed on the first pad, and electronically connected to the first pad; and a second electronic component, disposed on the second pad, and electronically connected to the second pad.