This invention relates to the field of
chip inspection technology, and more particularly to a
chip non-
destructive testing system based on embedded current scanning. The
system includes a current scanning module, an
information acquisition module, a
data analysis module, an abnormal scanning region generation module, and a scanning
path generation module. Instead of simply performing a higher-density secondary scan of the entire
chip, this invention intelligently filters out abnormal scanning regions requiring special attention based on the initial scan results and calculates their scanning priority. This allows valuable
inspection time and computing resources to be concentrated on the most suspicious and severe areas, avoiding unnecessary repeated scanning in normal areas. The
system dynamically selects the optimal scanning path based on the regularity of the region shape; for example, parallel lines are used for regular regions, and radial lines are used for irregular regions. This makes the scanning path more closely match the geometric features of the defect, obtaining a more complete region characterization with fewer scanning points, resulting in higher path planning efficiency.