A system (5) for testing and failure analysis of an integrated circuit (10) is provided using failure analysis tools (40, 50, 60). An analysis module (30) having a number of submodule test structures is incorporated into the integrated circuit design. The test structures are chosen in dependence upon the failure analysis tools (40, 50, 60) to be used. The rest of the integrated circuit contains function modules (20) arranged to provide normal operating functions. By analysing the submodule test structures of the analysis module (30) using the failure analysis tools (40, 50, 60), physical parameters of the integrated circuit (10) are obtained and used in subsequent testing of the function modules (20) by the failure analysis tools (40, 50, 60), thus simplifying the testing of the integrated circuit (10) and reducing the time taken to perform a failure analysis procedure.