The invention relates to a shared
bus type distributed MBIST
system, and belongs to the technical field of MBIST architecture. According to the shared
bus type distributed MBIST architecture, a
Memory Interface module in a Tesent MBIST architecture is removed, an MBIST controller is reserved, and a shared
bus controller is additionally arranged in the MBIST controller, so that a
data path and a control path are built between the MBIST controller and Memory, and the
data path and the control path comprise an
address bus, a data bus, a read-write enable, a
chip selection enable and other control buses which can be reused and are used for accessing the Memory. According to the shared bus type distributed MBIST architecture, a
Memory Interface module is not needed, the problems that the
chip area and
power consumption are large due to the fact that multiple Memory Interfaces need to be adopted at present are solved, logic resources can be reduced to the maximum extent, the
logic complexity can be reduced, and testing of Memory in a
chip is achieved.