The invention belongs to the technical field of image processing units, and particularly relates to a mask operation method of an explicit independent mask register in a GPU (Graphics Processing Unit), which comprises the following steps: S1, each GPU hardware thread can access respective eight 128-bit wide independent mask registers, and the eight 128-bit wide independent mask registers are recorded as m0-m7; according to the mask operation instruction of the explicit independent mask register in the GPU, each hardware thread in the GPU can access respective eight 128-bit wide independent mask registers, and four groups of mask operation instruction users can use the mask operation instruction to realize reduction operation, extension operation, logic operation and data movement among universal vector registers of the mask register respectively; the instruction can realize the generation of a branch mask in condition control, and meanwhile, the mask value is solved, so that the instruction transmitting process in the programmable core is optimized, invalid operand reading and pipeline operation execution are avoided, and the programmable power consumption is reduced.