31 results about "Compliant substrate" patented technology

A multijunction, monolithic, photovoltaic (PV) cell and device (600) is provided for converting radiant energy to photocurrent and photovoltage with improved efficiency. The PV cell includes an array of subcells (602), i.e., active p/n junctions, grown on a compliant substrate, where the compliant substrate accommodates greater flexibility in matching lattice constants to adjacent semiconductor material. The lattice matched semiconductor materials are selected with appropriate band-gaps to efficiently create photovoltage from a larger portion of the solar spectrum. Subcell strings (601, 603) from multiple PV cells are voltage matched to provide high output PV devices. A light emitting cell and device is also provided having monolithically grown red-yellow and green emission subcells and a mechanically stacked blue emission subcell.

A process for making an embossed web. A precursor web is provided between a forming structure and a compliant substrate. The forming structure has a plurality of discrete apertures or depressions. Pressure is provided between the compliant substrate and the forming structure to force the precursor web into the apertures or depressions of forming structure to form the embossed web. The resulting embossed web has a plurality of discrete extended elements.

High quality epitaxial layers of monocrystalline III-V arsenide nitride materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline III-V arsenide nitride material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, an accommodating buffer layer comprising a barium strontium titanium oxide and a monocrystalline III-V arsenide nitride layer, such as GaAsN, having a nitrogen concentration ranging from 1-5% function to further reduce any lattice mismatch between layers.

A process for making an embossed web. A precursor web is provided between a forming structure and a compliant substrate. The forming structure has a plurality of discrete protruded elements and lands completely surrounding them. Pressure is provided between the compliant substrate and the forming structure to conform the precursor web to the forming structure to form the embossed web. The resulting embossed web has a plurality of discrete extended elements completely surrounded by land areas.

A semiconductor structure includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material. A composite transistor includes a first transistor having first active regions formed in the monocrystalline silicon substrate, a second transistor having second active regions formed in the monocrystalline compound semiconductor material, and a mode control terminal for controlling the first transistor and the second transistor.

This invention provides a strained-channel field effect transistor (FET) in which the semiconductor of the channel of the FET is formed in a compliant substrate layer disposed over a twist-bonded semiconductor interface. This FET geometry increases the efficacy of local stress elements such as stress liners and embedded lattice-mismatched source/drain regions by mechanically decoupling the semiconductor of the channel region from the underlying rigid substrate. These strained-channel FETs may be incorporated into complementary metal oxide semiconductor (CMOS) circuits in various combinations. In one embodiment of this invention, both pFETs and nFETs are in a twist-bonded (001) silicon layer on a (001) silicon base layer. In another embodiment, pFETs are in a twist-bonded (011) silicon layer on a (001) silicon base layer and nFETs are in a conventional, non-twist-bonded (001) silicon base layer. This invention also provides a twist-bonded semiconductor layer on a polycrystalline base layer, as well as methods for fabricating the aforementioned FETs.

High quality epitaxial layers of GaN can be grown overlying large silicon wafers (200) by forming an amorphous layer (210) on the substrate. The amorphous layer dissipates strain and permits the growth of a high quality GaN layer (208). Any lattice mismatch between the GaN layer and the underlying substrate is taken care of by the amorphous layer.

System for establishing a surface shape. The system includes a compliant substrate including the surface and having a reverse side, and a plurality of discrete actuators engaging the reverse side and arranged in a selected pattern to control the surface shape as individual discrete activators are activated. It is preferred that the actuators have multiple discrete stable states of elongation. A particularly preferred embodiment uses actuators that are binary with two stable states of elongation.

The invention relates to a compliant substrate (5) comprising a carrier (1) and at least one thin layer (4), formed on the surface of the carrier and intended to receive, in integral manner, a stress-giving structure. The carrier (1) and the thin layer (4) are joined to one another by joining means (3) such that the stresses brought by said structure are absorbed in whole or in part by the thin layer (4) and/or by the joining means (3) which comprise at least one joining zone chosen from among the following joining zones: a layer of microcavities and/or a bonding interface whose bonding energy is controlled to permit absorption of said stresses.

A circuit assembly comprising a substrate formed to have one or more apertures that define one or more compliant members in the substrate, and to which a circuit device can be attached so as to reduce thermally-induced stresses in the device and in solder joints securing the device to the substrate. The compliant members are sufficiently compliant to permit relatively large surface-mount devices to be attached to an organic substrate without sacrificing reliability.

High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A wavelength locker for stabilizing a wavelength of an optical output signal from an optical transmitter is formed overlying the silicon wafer.

Methods and apparatus for holding substrate in a compliant substrate holding assembly are provided. In one embodiment, an apparatus for a compliant substrate holding assembly includes a base plate, a finger disposed on the base plate having a V-shaped slot formed thereon, and two arms disposed on opposite ends of the base plate and each arm having V-shaped slot formed therein. In another embodiment, a method for holding a substrate on a compliant substrate holding assembly includes inserting a substrate into a holding assembly having at least three substrate supporting members and detecting a change in position of one of the substrate supporting structures.

The invention relates to the technical field of epitaxial film preparation of zinc oxide of semiconductor materials and discloses a silicon-based compliant substrate material with thin hafnium nitride compliant layer. The material includes the following components: a single crystal silicon substrate which is used for supporting the whole silicon-based compliant substrate material; a thin hafnium nitride compliant layer, whose preparation is on the single crystal silicon substrate and is used for adjusting mismatch strain of epitaxial grown film of zinc oxide. By adopting the invention, mismatch strain of epitaxial film of zinc oxide on silicon substrate can be adjusted and residual stress be reduced, thus improving the crystal quality and surface appearance and laying a foundation for research of silicon-based optoelectronic devices.

High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A high quality layer of compound semiconductor material is used to form a source component and a receiver component that are interconnected with an antenna and each other within a semiconductor structure that can detect a parameter, such as the speed, of an object.

The present invention relates to a compliant substrate having a top surface for receiving a heteroepitaxial structure or heteroepitaxial layer. This substrate comprises a carrier substrate, a top single-crystalline layer, a buried layer located between the carrier substrate and the top layer, and a weakened region located in the top layer or between the top layer and the buried layer such that the compliant substrate facilitates relaxed growth of a heteroepitaxial layer or structure upon the top surface. The invention also relates to the combination of the compliant substrate and a heteroepitaxial layer provided thereon, as well as to a method of making the compliant substrate and combination.