Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

190 results about "Initial sequence" patented technology

Initial sequence numbers (ISN) refers to the unique 32-bit sequence number assigned to each new connection on a Transmission Control Protocol (TCP)-based data communication.

Method and system for orthogonal modulation of power signals

The invention discloses a method and a system for orthogonal modulation of power signals. The method comprises the following steps: acquiring an initial sequence length and an initial sequence according to a frequency lower limit, a preset sampling frequency and an initially set integer signal cycle number of a power signal; acquiring a reference frequency according to the initial sequence, and further acquiring a unit cycle sequence length and a preset sequence length; acquiring first forward and reverse sequences according to a preset sequence starting point and the preset sequence length; generating first real-frequency and imaginary-frequency vector sequences and second real-frequency and imaginary-frequency vector sequences according to the first forward and reverse sequences; converting obtained first and second phases into a first forward sequence average initial phase; obtaining a new preset sequence starting point according to the average initial phase; and obtaining a cosine function modulation sequence and a sine function modulation sequence according to second forward and reverse sequences obtained from the initial sequence. By adopting the method and the system of the invention, an orthogonal modulation sequence with consistent amplitude height can be obtained, and the accuracy and anti-jamming performance of sinusoidal parameter calculation are improved.
Owner:ELECTRIC POWER RES INST OF GUANGDONG POWER GRID

Method and system for performing permutations using permutation instructions based on modified omega and flip stages

The present invention provides permutation instructions which can be used in software executed in a programmable processor for solving permutation problems in cryptography, multimedia and other applications. The permute instructions are based on an omega-flip network comprising at least two stages in which each stage can perform the function of either an omega network stage or a flip network stage. Intermediate sequences of bits are defined that an initial sequence of bits from a source register are transformed into. Each intermediate sequence of bits is used as input to a subsequent permutation instruction. Permutation instructions are determined for permuting the initial source sequence of bits into one or more intermediate sequence of bits until a desired sequence is obtained. The intermediate sequences of bits are determined by configuration bits. The permutation instructions form a permutation instruction sequence, of at least one instruction. At most 21 gr / m permutation instructions are used in the permutation instruction sequence, where r is the number of k-bit subwords to be permuted, and m is the number of network stages executed in one instruction. The permutation instructions can be used to permute k-bit subwords packed into an n-bit word, where k can be 1, 2, . . . , or n bits, and k*r=n.
Owner:TELEPUTERS

Chip, consumables container and working method of chip

The invention provides a chip, a consumables container and a working method of the chip. The chip comprises a substrate, wherein a communication module and a storage are arranged on the substrate, the storage stores a group of initial sequence number data and at least one group of standby sequence number data and is provided with a bit zone which stores an identification value used for identifying the currently used sequence number; and the storage is also provided with a transformation judging unit used for judging whether the sequence number data transformation condition is met or not and a transforming unit for transforming the identification values. The method comprises the steps of: after electrifying the chip, sending corresponding sequence number data according to the identification values, judging whether the currently used sequence number data is the initial sequence number data according to the identification value, if yes, judging whether the sequence number data transformation condition is met or not by the transformation judging unit, and transforming the identification value by the transforming unit. The invention can effectively avoid the problem that the consumables container can not print because the sequence number stored in the chip is the same with the sequence number stored in a printer, thereby reducing the waste and being beneficial to environment protection.
Owner:ZHUHAI TIANWEI TECH DEV CO LTD

Method and system for performing permutations using permutation instructions based on butterfly networks

The present invention provides permutation instructions which can be used in software executed in a programmable processor for solving permutation problems in cryptography, multimedia and other applications. The permute instructions are based on a Benes network comprising two butterfly networks of the same size connected back-to-back. Intermediate sequences of bits are defined that an initial sequence of bits from a source register are transformed into. Each intermediate sequence of bits is used as input to a subsequent permutation instruction. Permutation instructions are determined for permitting the initial source sequence of bits into one or more intermediate sequence of bits until a desired sequence is obtained. The intermediate sequences of bits are determined by configuration bits. The permutation instructions form a permutation instruction sequence of at least one instruction. At most 21gr / m permutation instructions are used in the permutation instruction sequence, where r is the number of k-bit subwords to be permuted, and m is the number of network stages executed in one instruction. The permutation instructions can be used to permute k-bit subwords packed into an n-bit word, where k can be 1, 2, . . . , or n bits, and k*r=n.
Owner:LEE RUBY B +2

Android intelligent device anti-getroot system and calibration method thereof

The invention discloses an Android intelligent device anti-getroot system and a calibration method of the Android intelligent device anti-getroot system. The method includes the steps that a dynamic password module is set in a central processor of an intelligent device and comprises programs solidified in the central processor, data to which users and codes of a common domain cannot have direct access are stored, a security algorithm is supported, dynamic password data needed by applications are stored and guaranteed, a security guiding process is executed, a basic security guarantee is provided for an operating system and application software, the system operates in the central processor, and a storage space independent of an external bus is used for operating a security processing program and storing a middle result. Key data mainly comprise symmetrical cryptographic algorithm secret keys and asymmetric cryptographic algorithm public keys and are used for basic initial sequences of an authenticated one-way hash algorithm, the purpose of protecting safety of the system at the hardware level is achieved, the anti-getroot performance of the Android intelligent device is improved, and the safety performance of the whole system is improved.
Owner:丹阳市广播电视台

Magnetic resonance imaging system protecting method and device, and automatic shutoff testing method

Disclosed are a magnetic resonance imaging system protecting method and device, and an automatic shutoff testing method. The protecting method includes a), providing expected safety parameters; b), after the magnetic resonance imaging system starts scanning corresponding to initial sequence information, collecting actual sequence information in the process of scanning; c), according to the actual sequence information, calculating actual safety parameters; d), judging whether the actual safety parameters do not exceed the expected safety parameters or not; e), if yes, continuing to execute scanning corresponding to an initial sequence; f), if not, stopping scanning. The device comprises an input module used for inputting the expected safety parameters, a collection module used for collecting the actual sequence information, a calculation module used for calculating the actual safety parameters according to the actual sequence information, a judgment module used for judging whether all of the actual safety parameters do not exceed the expected safety parameters or not, and the control module is used for controlling to continue to execute scanning if yes and to stop scanning if not. By the protecting method and the protecting device, safety of a scanning object in the actual process of scanning can be effectively guaranteed.
Owner:SHANGHAI UNITED IMAGING HEALTHCARE
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products