51 results about "Selective area epitaxy" patented technology

A multicolored LED device made of a semipolar material having different indium containing regions provided on different spatial features of GaN material. Other materials such as non-polar materials can also be used.

A gallium containing crystalline material. The material comprises a bulk semi-polar gallium indium containing crystalline material having a thickness of about 20 nanometers to about 1000 nanometers. The material includes a spatial width dimension of no greater than about 10 microns characterizing the thickness of the bulk semi-polar gallium indium containing crystalline material. The material includes a photoluminescent characteristic of the crystalline material having a first wavelength, which is at least five nanometers greater than a second wavelength, which is derived from an indium gallium containing crystalline material grown on a growth region of greater than about 15 microns.

An improved optical receiver comprises a vertically lasing semiconductor optical amplifier (VLSOA) coupled to a photodetector. The VLSOA and photodetector are discrete devices or alternatively integrated onto a common substrate. The integrated optical receiver may be fabricated using a number of different methods, including based on selective area epitaxy, impurity induced disordering, etch and fill and silicon optical bench.

Trenches are formed in a silicon substrate by etching exposed portions of the silicon substrate. After covering areas on which deposition of Si:C containing material is to be prevented, selective epitaxy is performed in a single wafer chamber at a temperature from about 550° C. to about 600° C. employing a limited carrier gas flow, i.e., at a flow rate less than 12 standard liters per minute to deposit Si:C containing regions at a pattern-independent uniform deposition rate. The inventive selective epitaxy process for Si:C deposition provides a relatively high net deposition rate a high quality Si:C crystal in which the carbon atoms are incorporated into substitutional sites as verified by X-ray diffraction.

An improved optical transmitter comprises a vertically lasing semiconductor optical amplifier (VLSOA) coupled to an external modulator and / or a laser source. The VLSOA, external modulator and laser source are discrete devices or alternatively integrated onto a common substrate. The integrated optical transmitter may be fabricated using a number of different methods, including based on selective area epitaxy, impurity induced disordering, etch and fill and silicon optical bench.

InGaN / GaN quantum layer nanowire light emitting diodes are fabricated into a single cluster capable of exhibiting a wide spectral output range. The nanowires having InGaN / GaN quantum layers formed of quantum dots are tuned to different output wavelengths using different nanowire diameters, for example, to achieve a full spectral output range covering the entire visible spectrum for display applications. The entire cluster is formed using a monolithically integrated fabrication technique that employs a single-step selective area epitaxy growth.

An intergrated optical device comprises a vertically lasing semiconductor optical amplifier (VLSOA) and an optical element integrated onto a common substrate. Example optical elements include waveguides, unguided transparent regions, and active optical devices (including additional VLSOAs). The integrated device may be fabricated using a number of different methods, including based on selective area epitaxy, impurity induced disordering, etch and fill and silicon optical bench.

A mask for forming a selective grating and selective area growth and a method for fabricating an electro-absorption modulated laser device by utilizing the mask are disclosed. The mask for forming the selective grating and the selective area growth comprises a + shaped island type pattern and a stripe type pattern to allow, during the formation of the selective grating, the selective grating to be formed only in a laser diode region, and to allow, during the selective area epitaxial growth, the selective area growth to be carried out only with the stripe pattern in the diode laser region after the island pattern being removed.

The invention discloses a method for realizing an enhanced HEMT through secondary epitaxy P-type III-group nitride and the enhanced HEMT. In one embodiment, the method comprises the following steps: providing a heterostructure mainly formed by III-group nitrides, and preparing a surface passivation layer, a source electrode and a drain electrode on the heterostructure, wherein the source electrode and the drain electrode form ohmic contact with the surface of the heterostructure, and are in electrical connection with a two-dimensional electron gas in the heterostructure; etching the surface passivation layer and a partial region of a barrier layer of the heterostructure right under a gate electrode to form a groove structure in the barrier layer; growing a P-type semiconductor on the surface of the barrier layer in the groove through the selective area epitaxy technology; and preparing the gate electrode on the surface of the P-type semiconductor between the source electrode and the drain electrode. The enhanced HEMT is realized effectively; and the method is simple in process, high in repeatability, low in cost and easy for large-scale production.

The invention discloses a method for manufacturing a semiconductor mode-locked laser based full quantum well selective area epitaxy. The method comprises the steps of 1, designing a selective area epitaxy mask; 2, selecting an epitaxy pattern for production; 3, performing selective area epitaxial growth; 4, manufacturing a laser cavity structure; 5, performing electrical isolation; 6, manufacturing electrodes; and 7, cleaving to obtain a tube core laser. Through one selective area epitaxy, definition of a gain area, a saturated absorption area and an active and passive cavity proportion of the mode-locked laser, and a colliding pulse mode-locking principle, the pulse width is compressed and the mode-locked frequency is improved; and through a passive external cavity technology, the time-domain jitter of pulse repetition frequency is reduced, and stable output of the repetition frequency (which can be high and low based on using demands) of narrow pulses is finally realized.

A method of manufacturing a nitride semiconductor substrate is provided. A partial surface treatment process is performed to rough a portion of a surface of a substrate. Next, a nitride semiconductor layer is formed over the substrate. Since the nitride semiconductor layer simply grows on the unroughened surface of the substrate through selective area epitaxy growth and lateral epitaxy growth, some of the threading dislocations in the nitride semiconductor layer are blocked. Thereby, the threading dislocation density of the grown nitride semiconductor layer is reduced.

Trenches are formed in a silicon substrate by etching exposed portions of the silicon substrate. After covering areas on which deposition of Si:C containing material is to be prevented, selective epitaxy is performed in a single wafer chamber at a temperature from about 550° C. to about 600° C. employing a limited carrier gas flow, i.e., at a flow rate less than 12 standard liters per minute to deposit Si:C containing regions at a pattern-independent uniform deposition rate. The inventive selective epitaxy process for Si:C deposition provides a relatively high net deposition rate a high quality Si:C crystal in which the carbon atoms are incorporated into substitutional sites as verified by X-ray diffraction.

A method for manufacturing laser array by selective area growth (SAG) technology includes the step 1, growing a lower separate confinement layer and a quantum well layer on epitaxy of a substrate; the step 2, manufacturing a selective area epitaxy dielectric mask graph on the quantum well layer; the step 3, growing an upper separate confinement layer on the selective area epitaxy; the step 4, removing the dielectric mask graph; the step 5, manufacturing grating on an upper separate confinement layer; the step 6, growing a contact layer on the grating so as to complete manufacturing. Different masks have different laser grating periods within a spacing or width change cycle. By the method, different array units of different lighting wavelength can be manufactured while consistency of optical performance of lasers of the array units can be guaranteed.

The invention discloses a one-dimensional electronic gas GaN-based HEMT (High Electron Mobility Transistor) device adopting selective area epitaxy and a preparation method thereof, and mainly solves the problems of poor high temperature and high voltage characteristics, frequency characteristic and power characteristic of an existing one-dimensional electronic gas device. The device comprises a substrate, a buffering layer, a passivation layer and a protection layer from bottom to top; the buffering layer adopts GaN; the buffering layer is provided with barrier layer strips and masking layer strips, which are periodically arranged at intervals; both ends of each barrier layer strip respectively are a source electrode and a drain electrode; the passivation layer is positioned on the barrier layer strips and the masking layer strips; the passivation layer is provided with a grid slot; a grid electrode is arranged in the grid slot; and the barrier layer strips adopt AlGaN and the width of each barrier layer strip is in nanometer dimension so as to form one-dimensional electronic gas. Compared with Si-based and GaAs-based one-dimensional electronic gas devices, due to the adoption of a wide bandgap semiconductor GaN with the outstanding material characteristics, the one-dimensional electronic gas GaN-based HEMT device adopting selective area epitaxy has excellent high temperature and high voltage characteristics, frequency characteristic and power characteristic, and the ultrahigh speed and low power consumption one-dimensional electronic gas device can be made.

A method for removing a mask in a selective area epitaxy process is provided. The method includes forming a first layer on a substrate and oxidizing the first layer. A patterned photoresist can be formed on the oxidized first layer. A portion of the oxidized first layer can then be removed using a wet chemical etch to form a mask. After removing the patterned photoresist a second layer can be epitaxially grown in a metal organic chemical vapor deposition (MOCVD) chamber or a chemical beam epitaxy (CBE) chamber on a portion of the first layer exposed by the mask. The mask can then be removed the mask in the MOCVD / MBE chamber. The disclosed in-situ mask removal method minimizes both the atmospheric exposure of a growth surface and the number of sample transfers.

The invention discloses a single-chip array arrangement vertical pyramid structure full-color Micro LED and a preparation method thereof. The problems that an existing Micro LED device is low in production efficiency and high in cost are mainly solved. The full-color Micro LED comprises a TFT (Thin Film Transistor) back plate and pyramid structure LEDs which are arranged on the TFT back plate in an array; the pyramid structure LED comprises a substrate and an epitaxial layer. The epitaxial layer is located on the substrate; the epitaxial layer comprises a dielectric layer and a pyramid structure, the dielectric layer is deposited on the substrate, and the dielectric layer is provided with hole structures which are arranged in a periodic array; the pyramid structure grows in the hole opening area on the substrate, fills the hole structure and continues to grow to form the pyramid structure. According to the method, a plane nitride thin film does not need to be grown on the substrate firstly, then selective area epitaxy of the GaN pyramid is achieved through patterning of the nitride thin film, the GaN-based vertical pyramid LED is directly grown on the opening area of the substrate in an epitaxial mode, the production efficiency is greatly improved, and the production cost is reduced.

The invention provides a semi-polarity LED epitaxial structure and a preparation method therefor. The preparation method comprises the processing steps of providing a sapphire substrate; growing a semiconductor bottom layer structure on the sapphire substrate to form nanometer V-shaped pits in the surface, wherein the side face of each V-shaped pit is a semi-polarity surface and corresponding to (1-101) crystal plane family; and growing a semiconductor functional layer on the semi-polarity surface of the semiconductor bottom layer structure. According to the preparation method, selective area epitaxy and secondary epitaxy are not required; the semi-polarity surface is the (1-101) crystal plane family; the overlapped area of the smooth conduction band bottom and valence-band maximum is quite large in a reciprocal space, so that the radiation composite efficiency is greatly improved; the exposing of the semi-polarity surface is realized by adjusting the material growth process without being limited by the geometrical shape of the substrate; therefore, the low cost of the semi-polarity surface material is realized; and the semi-polarity LED epitaxial structure is high in processing fusion degree with the existing chip.

The invention discloses a GaN-based light emitting diode (LED) array micro display device and a fabrication method thereof based on a selective region epitaxial growth technique. The fabrication method of the device comprises the following steps of: (A) fabricating mask membranes arranged in a strip shape on a substrate, and growing a strip-structurized n-type GaN array through the selective region epitaxial growth technique; (B) fabricating a mask membrane provided with periodically-distributed opening holes on the strip-structurized n-type GaN array, and growing a three-dimensional structurized miniature LED array through the selective region epitaxial growth technique; (C) fabricating a strip-shaped transparent conductive layer on the surface of the three-dimensional structurized miniature LED array; and (D) respectively fabricating a negative electrode and a positive electrode on the strip-structurized n-type GaN array and the strip-shaped transparent conductive layer. According to the method, the selective region epitaxial growth technique is used for growing a GaN-based miniature LED, the problem of current leakage caused by a dry etching method for fabrication the miniature LED is solved, and a miniature display device having matrix addressing, low power consumption and high brightness is provided.

Devices and methods of manufacturing light emitting devices including selective area epitaxy deposited N-polar semiconductors. The devices and methods can be utilized to realize high-quality, high-performance and / or high-efficiency nanowire based light emitting devices.

The invention discloses a gallium nitride integrated field effect transistor with double working modes and a preparation method thereof. The method of selective epitaxial growth is used to grow p-GaN on the sidewall of the AlGaN / GaN heterojunction to form a p-GaN / 2DEG junction. Prepare p-type and n-type ohmic contact electrodes on the p-GaN and AlGaN / GaN heterojunctions, respectively, and prepare insulated gate electrodes on the AlGaN / GaN heterojunction side of the p-GaN / 2DEG junction. The GaN integrated field effect transistor of the present invention has enhancement mode and depletion mode working mode at the same time, adopts the selective epitaxy process based on AlGaN / GaN heterojunction to avoid the preparation of interconnection metal, improves the functionality of the integrated device, and reduces the cost of the integrated device Parasitic effects have broad application prospects in the field of high-performance GaN power devices and logic devices.

A method of Selective Area Epitaxy (SAE) on a semiconductor wafer is disclosed. A dielectric mask is deposited on the wafer surface to define an opening for epitaxial growth. The mask includes a zigzag edge formed by successive straight facets oriented to avoid crystallographic directions associated with unintentional growth enhancement. During SAE, a semiconductor layer is grown in the opening such that edge-growth enhancement at the zigzag edge is suppressed relative to straight edges aligned with [011] or [0 11] directions. By replacing straight mask edges with zigzag geometry, fragile linear overgrowth is avoided, reducing particulate contamination and improving device reliability. The zigzag edge may be tailored by pitch, amplitude, or facet orientation, including angles such as 34°, 56°, 124°, or 146° relative to [011]. The method is applicable to III-V materials, including InP-based photonic integrated circuits, lasers, modulators, and amplifiers.

The invention discloses a method for manufacturing a semiconductor mode-locked laser based full quantum well selective area epitaxy. The method comprises the steps of 1, designing a selective area epitaxy mask; 2, selecting an epitaxy pattern for production; 3, performing selective area epitaxial growth; 4, manufacturing a laser cavity structure; 5, performing electrical isolation; 6, manufacturing electrodes; and 7, cleaving to obtain a tube core laser. Through one selective area epitaxy, definition of a gain area, a saturated absorption area and an active and passive cavity proportion of the mode-locked laser, and a colliding pulse mode-locking principle, the pulse width is compressed and the mode-locked frequency is improved; and through a passive external cavity technology, the time-domain jitter of pulse repetition frequency is reduced, and stable output of the repetition frequency (which can be high and low based on using demands) of narrow pulses is finally realized.

The invention provides a method for epitaxial growth of a gallium nitride epitaxial wafer based on a selective area of an amorphous substrate and the gallium nitride epitaxial wafer. The gallium nitride epitaxial wafer comprises an amorphous substrate, a polycrystalline copper film, a silicon oxide layer and a gallium nitride layer which are arranged in a stacked mode. The polycrystalline copper film has an orientation [111]; the gallium nitride layer has [002] orientation. According to the gallium nitride epitaxial wafer provided by the invention, the combination of the amorphous substrate and the polycrystalline copper film is used as the substrate, a traditional single-crystal substrate and an over-thick copper substrate are replaced, the annealing time is shortened, meanwhile, the flatness and mechanical properties of the substrate are ensured by the amorphous substrate, the growth quality of the gallium nitride layer is improved, and large-scale popularization and application are facilitated.

The invention provides a high-voltage direct-current LED or alternating-current LED and a manufacturing method thereof, and relates to the technical field of LEDs. According to the high-voltage direct-current LED or alternating-current LED and the manufacturing method thereof in the embodiment of the invention, the light emitting part of the device is obtained by growing a nucleation center layer,independent light emitting units are formed by employing a selective area epitaxy technology, and the light emitting units are mutually separated. In the preparation process, the light-emitting unitsare not divided by using an etching or cutting process, so that the manufacturing process of the high-voltage direct-current LED or alternating-current LED is effectively simplified, and a non-radiative recombination center formed on the etched or cut surface is obviously inhibited. Meanwhile, in the manufacturing process, the first substrate is removed, and the second substrate is used for providing support, so that light absorption of the first substrate can be avoided, and the light emitting rate of the high-voltage direct-current LED or alternating-current LED is improved.

The invention discloses a one-dimensional electronic gas GaN-based HEMT (High Electron Mobility Transistor) device adopting selective area epitaxy and a preparation method thereof, and mainly solves the problems of poor high temperature and high voltage characteristics, frequency characteristic and power characteristic of an existing one-dimensional electronic gas device. The device comprises a substrate, a buffering layer, a passivation layer and a protection layer from bottom to top; the buffering layer adopts GaN; the buffering layer is provided with barrier layer strips and masking layer strips, which are periodically arranged at intervals; both ends of each barrier layer strip respectively are a source electrode and a drain electrode; the passivation layer is positioned on the barrier layer strips and the masking layer strips; the passivation layer is provided with a grid slot; a grid electrode is arranged in the grid slot; and the barrier layer strips adopt AlGaN and the width of each barrier layer strip is in nanometer dimension so as to form one-dimensional electronic gas. Compared with Si-based and GaAs-based one-dimensional electronic gas devices, due to the adoption of a wide bandgap semiconductor GaN with the outstanding material characteristics, the one-dimensional electronic gas GaN-based HEMT device adopting selective area epitaxy has excellent high temperature and high voltage characteristics, frequency characteristic and power characteristic, and the ultrahigh speed and low power consumption one-dimensional electronic gas device can be made.

InGaN / GaN quantum layer nanowire light emitting diodes are fabricated into a single cluster capable of exhibiting a wide spectral output range. The nanowires having InGaN / GaN quantum layers formed of quantum dots are tuned to different output wavelengths using different nanowire diameters, for example, to achieve a full spectral output range covering the entire visible spectrum for display applications. The entire cluster is formed using a monolithically integrated fabrication technique that employs a single-step selective area epitaxy growth.

The invention discloses a gallium nitride integrated field effect transistor with double working modes and a preparation method thereof. The method comprises the steps of: growing p-GaN on the side wall of the AlGaN / GaN heterojunction to form a p-GaN / 2DEG junction by adopting a selective area epitaxial growth method; and preparing a p-type ohmic contact electrode and an n-type ohmic contact electrode on the p-GaN heterojunction and the AlGaN / GaN heterojunction respectively, and preparing an insulated gate electrode on one side of the AlGaN / GaN heterojunction of the p-GaN / 2DEG junction. The GaNintegrated field effect transistor has an enhanced working mode and a depletion working mode at the same time, interconnection metal is prevented from being prepared by adopting a selective area epitaxy process based on AlGaN / GaN heterojunctions, the functionality of an integrated device is improved, the parasitic effect of the integrated device is reduced, and the GaN integrated field effect transistor has wide application prospects in the fields of high-performance GaN power devices and logic devices.

The embodiment of the invention provides a preparation method of a monolithic silicon-based photoelectric integrated chip. A laser device structure grows by etching a pattern window on an SOI substrate, a detector structure grows on a silicon waveguide layer in the SOI substrate, and a laser device and a detector are connected through the etched silicon waveguide structure, so that integration ofthe on-chip laser device, the detector and the silicon waveguide structure is achieved. According to the preparation method of the monolithic silicon-based photoelectric integrated chip, the laser device structure grows by directly etching the pattern window, high repeatability and reliability are achieved, large-scale preparation can be achieved, the cost is greatly reduced, good application prospects are achieved, the blank that a practical on-chip photoelectric integration cannot be achieved through a direct selective area epitaxy mode at present is made up for, and the method particularlysolves the on-chip integration problem of the laser device and other devices.

The invention provides an infrared silicon-based germanium waveguide structure and a preparation method thereof, and the method comprises the steps: providing a substrate, carrying out the directional growth of a germanium waveguide material in a preset growth region of the silicon substrate based on a selective area epitaxial growth technology, forming a germanium epitaxial layer, and carrying out a series of planarization shaping processing of the germanium epitaxial layer, and forming a unique inverted ridge waveguide structure germanium waveguide layer. According to the invention, the convex ridge part of the germanium waveguide layer is directly formed on the surface of the silicon substrate, and the flat plate part of the germanium waveguide layer is formed on one side, far away from the silicon substrate, of the convex ridge part, so that coupling of a transmission light field and a defect at a germanium-silicon heterogeneous interface can be effectively reduced, absorption of the defect to transmission light is inhibited, and the transmission efficiency is improved. And thus, low-loss optical signal transmission is realized in an infrared band.

A method includes obtaining a semiconductor wafer having an orientation in a plane; depositing one or more masks to a semiconductor wafer, wherein each mask is configured to cover a portion of the semiconductor wafer, and wherein each mask includes a perimeter having multiple sides that are substantially aligned along a preferred crystal direction relative to the orientation that provides reduced or enhanced growth enhancement at edges of the substantially aligned sides; and performing Selective Area Epitaxy (SAE) growth on a surface of the semiconductor wafer, wherein the one or more masks inhibit the SAE growth over the associated portion.