38results about How to "Accurate clock" patented technology

In a programmable logic device having high-speed serial interface channels, a clock distribution network for providing one or more high-speed clocks to dynamic phase alignment circuitry of those high-speed serial interfaces includes at least one bus that is segmentable (e.g. using tristatable buffers). This allows the bus to be divided into different portions that can be connected to different clock sources when the high-speed serial interfaces are running at different speeds. In one embodiment, the segmenting elements (e.g., the aforementioned buffers) are located between selected channels (e.g., every fourth channel), limiting the size of the different segments. In another embodiment, segmenting elements are located between each channel, allowing complete user freedom in selecting the sizes of the segments. Thus, instead of providing a bus for every clock source, multiple clocks can be made available to different channels by segmenting a single bus.

The invention is intended to achieve detection of a source voltage without providing a voltage detection circuit and allow a drive stop while holding correct drive pulse information when the source voltage is lowered to a predetermined level or below. A detection segment for detecting the state of rotation of a stepping motor is divided into a plurality of segments and, when a pattern of an induced signal detected in the respective segments is a pattern which indicates that the voltage of a secondary battery is lowered to the predetermined voltage or below, the control circuit memorizes a polarity of the drive pulse used in the last driving in a polarity memory and stops the driving of the stepping motor. When the voltage of the secondary battery is restored to the predetermined voltage or higher, the driving is restarted by a main drive pulse having a polarity opposite from the polarity memorized in the polarity memory.

A system and method in accordance with the present invention allows for an adapter to be utilized in a server environment that can accommodate both a 10 G and a 1 G source utilizing the same pins. This is accomplished through the use of a high speed serializer/deserializer (high speed serdes) which can accommodate both data sources. The high speed serdes allows for the use of a relatively low reference clock speed on the NIC to provide the proper clocking of the data sources and also allows for different modes to be set to accommodate the different data sources. Finally the system allows for the adapter to use the same pins for multiple data sources.

The present invention is directed to energy-efficient hibernation in indoor wireless localization systems. A tag passively associates with a detection point (DP) and establishes a reveille time. The tag will awaken at the reveille time and send or receive a beacon to or from its associated DP. If the tag is receiving a beacon, it will awaken, receive, phase-lock its clock based on when the beacon was expected and when it was actually received, and return to hibernation. The DP transmits a scattershot of beacons, one for every tag in the system. If the tag is sending a beacon, it will awaken, send its beacon, and return to hibernation. The DP will receive the beacon and adjust its own clock based on the delay between when the beacon was expected and when it was actually received. The tag will broadcast its location to the DP on a set interval.

A piezoelectric quartz plate having reduced frequency deviation as a function of temperature, wherein the quartz plate is cut at an angle described by:

where quartz plate thickness is chosen in accordance with a desired frequency. This useful behavior can be manipulated such that a quartz plate is designed to counteract frequency shifts over temperature excursion of other electrical components found in typical oscillator circuits. The choice of angles of cut having larger margins of error means that quartz oscillators can be more easily reproduced on a large scale and at a lower cost than has traditionally been the case.

The invention relates to a circuit structure and method for realizing clock recovery on the basis of a USB device. The circuit structure comprises a built-in oscillator module for generating oscillation signals; and a digital control logic module which includes a USB clock recovery unit for sampling the oscillation signals of the built-in oscillator and performing the clock recovery and a frequency adjustment unit for adjusting the oscillation frequency of the built-in oscillator according to a comparison result between USB signals and the oscillation signals of the built-in oscillator. By using the circuit structure and method for realizing the clock recovery on the basis of the USB device through such a structure, an accurate system clock can be generated, a frequency tracking feature is exhibited, a USB data transmission frequency is compared with the frequency of the built-in oscillator through adoption of the digital control logic module, the frequency of the built-in oscillator is automatically switched among a low-speed state, a medium-speed state and a high-speed state, the system precision and the stability are guaranteed, the production cost is decreased, and the application scope is wider.

The invention discloses a multifunctional alarm clock system for a classroom, relating to the technical field of electronic information. The system comprises a central server and a plurality of terminals connected with the central server, each terminal is hung in a corresponding classroom, the unified correction of clock information is realized between the central server and the terminals througha self-organizing algorithm, the terminals obtain classroom schedules of all classrooms on the same day through the central server; the terminals comprises power supply modules and also comprise embedded microprocessors, network modules, storage modules, LCD display modules and sound modules which are connected with the power supply modules. When the embedded microprocessors are in each schedule time period, corresponding schedule information is displayed through the LCD display modules and/or corresponding audio schedule information is played through the sound module, the time schedule information is displayed through the LCD display modules in a course time period or an examination time period, the attention of students is prevented from being distracted, the system is more practical through automatic management and a control terminal, and the system is convenient for students, teachers and supervisors to use in schools.

The invention discloses a vehicle gesture monitoring module which comprises a singlechip, a power supply chip connected with the singlechip, a storage chip, a GPS (global positioning system) chip, a triaxial acceleration transducer compass module, an atmospheric pressure module, a clock chip, two ways of CAN (controller area network) chips and a serial port chip, wherein the power supply chip is respectively connected with the storage chip, the GPS chip, a WF triaxial acceleration transducer compass module, the atmospheric pressure module, the clock chip and the serial port chip. The vehicle gesture monitoring module disclosed by the invention is simple in structure, and is convenient to use; the monitoring using effect is good; the monitoring data range is wide; and the monitoring of each vehicle driving data in the driving of an automobile is ensured, thus the driver can grasp each item of variation information of the automobile at any time, and the safety of vehicle driving is ensured.

The invention discloses a multi-node test system, and the system can comprise: a central server which is used for transmitting a test instruction and receiving test data; and multiple test nodes, wherein one or more of the plurality of test nodes receive a test instruction from the central server, execute a test according to the test instruction and transmit test data to the central server, and the central server and the plurality of test nodes execute clock synchronization, so that the central server and the plurality of test nodes are consistent in clock. The multi-node test system can provide reliable test results and reduce wiring. The invention further discloses a multi-node test method by using the multi-node test system.

The invention discloses a multifunctional landscape lightening controller. The controller comprises an MCU processing module, the MCU processing module is connected with a serial data caching/concurrence module, an SPI (Serial Peripheral Interface), a real-time clock module, a frame synchronization interface and a parameter setting interface, the serial data caching/concurrence module is connected with the SPI via an SPI serial data bus, and the data caching/concurrence module is also connected with multiple independent output modules. The invention also discloses a realization method of the multifunctional landscape lightening controller. The controller and realization method thereof are characterized by simple structure, low cost, high-speed data caching/concurrency, high light softness, multiple interfaces and wide application range.

The present invention is directed to energy-efficient hibernation in indoor wireless localization systems. A tag passively associates with a detection point (DP) and establishes a reveille time. The tag will awaken at the reveille time and send or receive a beacon to or from its associated DP. If the tag is receiving a beacon, it will awaken, receive, phase-lock its clock based on when the beacon was expected and when it was actually received, and return to hibernation. The DP transmits a scattershot of beacons, one for every tag in the system. If the tag is sending a beacon, it will awaken, send its beacon, and return to hibernation. The DP will receive the beacon and adjust its own clock based on the delay between when the beacon was expected and when it was actually received. The tag will broadcast its location to the DP on a set interval.

A control circuit of a communication device includes: a periodic packet detection circuit, detecting a periodic packet of a data signal to generate a packet indication signal corresponding to the periodic packet; a frequency synthesis circuit, coupled to the periodic packet detection circuit, generating a working clock according to a reference clock; and a setting value generating circuit, coupled to the periodic packet detection circuit, generating a setting value according to a relationship between the frequencies of the working clock and the packet indication signal. The frequency synthesis circuit further adjusts the working clock according to the setting value to cause the frequency of the working clock to substantially be a predetermined multiple of the frequency of the packet indication signal.

The present invention is directed to energy-efficient hibernation in indoor wireless localization systems. A tag passively associates with a detection point (DP) and establishes a reveille time. The tag will awaken at the reveille time and send or receive a beacon to or from its associated DP. If the tag is receiving a beacon, it will awaken, receive, phase-lock its clock based on when the beacon was expected and when it was actually received, and return to hibernation. The DP transmits a scattershot of beacons, one for every tag in the system. If the tag is sending a beacon, it will awaken, send its beacon, and return to hibernation. The DP will receive the beacon and adjust its own clock based on the delay between when the beacon was expected and when it was actually received. The tag will broadcast its location to the DP on a set interval.

The invention relates to a television switch testing device. The television switch testing device includes a master control device and a relay circuit, wherein the master control device is used for executing a test program, and outputting an on-off electric signal according to the test program; the relay circuit is connected with the master control device to receive the on-off electric signal, and controls the contact switch of the contained relay to change the touch state according to the on-off electric signal; the contact switch of the relay is connected between an external power supply and a power supply of a television; the master control device can have an accurate clock, and can perform accurate time control in the test program according to the clock of the master control device; when the relay circuit is delayed, time correction can be controlled by modification of the program, so that the television switch testing device can realize accurate time control; and as the relay circuit is not a semiconductor device and is not limited by the power factor, the relay circuit can start the television through a greater current so as to reduce starting delay of the television and achieve the aim of quick testing.