59results about How to "Ensures correctness" patented technology

In a light-weight transactional system architecture, each component providing a service performs its own scheduling and transaction management. An invocation of one of these services (through remote method invocation) results in the creation of a local transaction (child of the invoking transaction and parent of any transaction that might be triggered by invoking the services of other servers). The information that is required to build a global composite transaction is implicitly added by the system to each call. Each transaction is, however, independently handled at each server. That is, the servers neither communicate among themselves nor rely on a centralized component to make scheduling or recovery decisions. In this way, components can be dynamically added or removed from the system without compromising correctness. Regardless of the configuration, the system according to the invention guarantees that transactions executed over these servers are correct and recoverable at a global and local level.

A Passive Optical Network includes: an Optical Line Terminal, an Optical Distribution Network, and an Optical Network Unit or an Optical Network Terminal, wherein the Optical Line Terminal is adapted to exchange data with the Optical Network Unit or the Optical Network Terminal by using an optical module via the Optical Distribution Network, and the optical module is an optical module sending data in a continuous mode. Further, a method for data communication based on the Passive Optical Network includes: sending data by using an optical module sending data in a continuous mode; receiving the data by an optical module based on a set optical power threshold of data “0” and a set optical power threshold of data “1”.

A semiconductor test system having a tester and a prober and the test method thereof are proposed. A test mark signal and a control board having a discrimination circuit and a protection circuit are added to a test connection interface of the tester. When performing multi-chip test, the connection result is displayed after checking the test mark signal by the discrimination circuit. Whether the test can be performed or not is then determined by the protection circuit. When the interface connection is incorrect due to man-made carelessness, an alarm will buzz for warning, and the protection circuit will be simultaneously activated to disable the tester. Normal test can be performed only if the interface connection is correct. Thereby, the correctness of the test results can be ensured to reduce returned purchase and to enhance the quality of production.

A method for secure identification of stations connected over data communications networks during a transaction, comprising transmitting, on the part of a first station to a second station, an identification index of a reference cell in a sequence of codes known to both stations and a first code in the sequence and chosen according to a first criterion known to both stations; identifying, by the second station, a cell in the sequence through the received index; verifying the first code by the second station; transmitting, by the second station toward the first station, a second code, in the series of codes calculated according to a second criterion known to both stations; verifying by the first station, the correctness of the second code; marking, by the first station and preferably also by the second station, the indices related to the codes that have been used as unusable for subsequent transactions.

A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip has a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks of the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.

A memory controller includes a damaged-column manager, an error checking and correcting decoder (ECC decoder) and a damaged-column decision circuit. The damaged-column manager logs a damaged-column address information in the flash memory. The ECC decoder receives a read data read by the flash memory and generates an error information according to whether or not the read data has error. The damaged-column decision circuit receives the error-column address and counts the number of accumulated generated times corresponding to the error-column address. The damaged-column decision circuit updates the damaged-column address information according to an error information.

A device for sharpening an image signal for receiving an image signal input, detecting and sharpening the object edge of the image signal input by using a detection period, and outputting an image signal output is provided. The image signal sharpening device determines the switching point of a maximum value signal and of a minimum value signal within the detection period through a switch-point generator and sharpens the image signal input through a signal processing unit. Therefore, the device can enhance the contrast of the edge of the object image and improve image sharpness without causing an overshoots or undershoots of the image amplitude. In addition, a confidence checking unit can be used to ensure the correct detection of the edge of the object image.

In a light-weight transactional system architecture, each component providing a service performs its own scheduling and transaction management. An invocation of one of these services (through remote method invocation) results in the creation of a local transaction (child of the invoking transaction and parent of any transaction that might be triggered by invoking the services of other servers). The information that is required to build a global composite transaction is implicitly added by the system to each call. Each transaction is, however, independently handled at each server. That is, the servers neither communicate among themselves nor rely on a centralized component to make scheduling or recovery decisions. In this way, components can be dynamically added or removed from the system without compromising correctness. Regardless of the configuration, the system according to the invention guarantees that transactions executed over these servers are correct and recoverable at a global and local level.