43results about How to "Simply fabricated" patented technology

A digital display system is proposed, which is characterized in provision of a digital board composed of a plurality of currently-available printed circuit boards, wherein each pair of adjacent printed circuit boards are electrically interconnected by a plurality of conductive coupling wires, so as to integrally form a large-scale panel for the digital board. This characteristic feature allows the digital board to be simply fabricated by a currently used jig and flexibly enlarged in dimension according to practical requirements without increasing costs for developing a newly designed jig, thereby making fabrication processes cost-effective to implement. Moreover, the above digital display system can be connected to a computer platform through a wireless communication interface, whereby pixel coordinate signals generated from the digital board can be wirelessly transferred to the computer platform for subsequent manipulation; therefore, this digital display system is relatively more convenient to use than prior art technology.

The invention relates to a process by which a multi-image type hologram wherein one 3D image changes over to another depending on a viewing direction can be fabricated in simple construction and a multi-image type hologram fabricated by that process. According to the process for the fabrication of a multi-image type hologram wherein one image changes over to another depending on a viewing direction, the area of a hologram recording material is divided into a plurality of sub-areas 111, 112 and 113. Objects to be displayed on different images are holo-graphically recorded in the respective sub-areas, using reference light having the same angle of incidence, thereby recording the first-stage hologram 11. Object images O1′, O2′ and O3′ recorded in the respective sub-areas 111, 112 and 113 are simultaneously reconstructed from the recorded first-stage hologram 11, so that a second-stage hologram recording material 21 is located near the reconstructed object images O1′, O2′ and O3′ for recording them as a reflection or transmission type volume hologram.

A display driver backplane, a display device and a fabrication method thereof are disclosed. The display driver backplane includes: a first semiconductor laminate including pixel driver array consisting of a plurality of pixel driver elements and first peripheral circuit unit; first electrode array formed on second surface of first semiconductor laminate; a second semiconductor laminate containing a second peripheral circuit unit, wherein a first surface of the second semiconductor laminate is bonded to a first surface of first semiconductor laminate; and first vias that are formed within first semiconductor laminate and electrically interconnect first-electrode array and pixel-driver array. The present invention addresses prior-art issues of high difficulty in fabricating transistors with different capabilities in the same layer and costly interconnection between transistors in different chips by employing a technique in which two or three chips are stacked together, and hence achieves significant improvements in device performance and reductions in cost.

A device transferring method and a device arraying method are provided for readily transferring a number of devices from a first substrate to a second substrate such that the devices are enlargedly spaced from each other with a pitch larger than an array pitch of the devices arrayed on the first substrate.

A digital garment and a fabrication method thereof are provided. The digital garment is fabricated using a knitting technique. The digital garment comprises a plurality of knitting yarns forming loops at regular intervals and interwoven through the loops, and one or more conductive digital yarns tied to the loops of the knitting yarns to form high-speed information communication circuits. The knitting yarns and the digital yarns are knitted together into a garment. During knitting, the digital yarns are used to form high-speed information communication circuits in a rapid and economical manner.

The disclosed mold includes recessed parts which have a shape corresponding to embossed portions of the barrier rib to be fabricated, and protruding parts which have a shape corresponding to depressed portions of the barrier rib to be fabricated, protrude adjacent to the recessed parts, and are tapered. The protruding parts and the recessed parts are arranged at regular intervals. It is possible to simply fabricate the two-layered barrier rib for inkjet application through a single embossing process at low cost using the mold for fabricating the barrier rib of the present invention.

Provided is a stack package comprising: a substrate comprising a cavity; a first semiconductor chip disposed in the cavity; and a second semiconductor chip stacked on the substrate and electrically connected to the substrate by a plurality of conductive external terminals such as conductive bumps. Since both a horizontal packaging method using bonding wires and a flip-chip packaging method are used and the bonding wires of the horizontal package and the conductive external terminals for the flip-chip bonding are formed on substantially the same plane, the total height of the stack package is reduced.

The present invention provides a semiconductor device and a method for fabricating the same. The semiconductor device includes a chip having an active surface and an opposing non-active surface, wherein a plurality of bond pads are formed on the active surface, and first metal layers are formed on the bond pads and to edges of the non-active surface; conductive traces disposed on the non-active surface of the chip; a dielectric layer covering sides of the chip and formed with a plurality of openings therein to expose a portion of the conductive traces; and a plurality of second metal layers formed in the openings of the dielectric layer and on the first metal layers, such that the bond pads are electrically connected to the conductive traces via the first and second metal layers.

The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less.

The semiconductor device includes: a first MIS transistor formed on a first region of a first conductivity type in a semiconductor substrate; and a second MIS transistor formed on a second region of a second conductivity type in the semiconductor substrate. The first MIS transistor has a first gate insulating film and a first gate electrode formed on the first region, first sidewalls formed on the side faces of the first gate electrode, and first source / drain regions made of silicon formed in portions of the first region. The second MIS transistor has a second gate insulating film and a second gate electrode formed on the second region, second sidewalls formed on the side faces of the second gate electrode, and second source / drain regions including silicon germanium formed in portions of the second region. The second sidewalls are smaller in height than the first sidewalls.

A method for manufacturing a multilayered cell sheet characterized in fabricating a vascular bed that constructs a vascular network extending to the surface from a channel for perfusing a medium, the channel being embedded in a gel; and layering a cell sheet onto the vascular bed to construct a vascular network in the cell sheet. This manufacturing method makes it possible to construct a vascular network in the cell sheet and to fabricate a thick multilayered cell sheet in a simple manner by layering cell sheets. Such a thick multilayered cell sheet is useful as an in-vivo tissue substitute in regenerative medicine involving a variety of tissues.

An adhesive as a heat resistant rubber-based adhesive is applied to a region (peripheral region) of integration of a metal sheet (Al sheet) and a resin and to a region (peripheral region) of integration of a fiber sheet (CF sheet) and a resin. The metal sheet and fiber sheet are temporarily fixed to dry the adhesive, then, the joined article is accommodated in an injection molding machine, a polycarbonate resin is injected, and the joined article (metal sheet and fiber sheet) is integrally molded with the polycarbonate resin.

A package for an electronic device includes a cavity that houses an electronic element, and grooves or holes formed on or in sidewalls that define the cavity. The grooves or holes extend from an open side of the cavity so as not to reach a bottom side of the package.

Disclosed is an antenna-speaker assembly, including an antenna unit including a radiator, a speaker unit including a speaker and coupled to the antenna unit, and a sound-absorbing part formed to conform to a circumference of a coupling surface of the antenna unit and the speaker unit, the sound-absorbing part being interposed between the antenna unit and the speaker unit. According to the present invention, the antenna-speaker assembly equipped with the structure of generating clear sound is provided. Furthermore, in a wireless communication device including an antenna-speaker assembly, the antenna-speaker assembly include an antenna unit including a radiator, a speaker unit including a speaker and coupled to the antenna unit, and a sound-absorbing material formed on a circumference of a face where the antenna unit and the speaker unit are coupled in such a manner as to be interposed between the antenna unit and the speaker unit.

A heat roller has a cylindrical sheet-like heating element, an inner tube and an outer tube. The sheet-like heating element has a resistance member embedded into an insulating member. The outer tube has a non-linear shape seen in an axial direction. The heat roller is fabricated by supplying pressurized fluid to the inner tube for expanding the inner tube, sheet-like heating element and outer tube toward a die. The die has a non-linear inner shape seen in the axial direction. Therefore, the outer tube of the fabricated heat roller has a non-linear shape. Further, an edge section of the inner tube can simultaneously be formed into a desired shape.

The mica capacitor and fabrication method there for, resulting in parallely stacking basic laminates in which an electrode sheet is arranged between parallely stacked mica sheets to protrude in a zigzag manner, arranging an insulation plate in which the basic laminates are parallely stacked where the insulation plate protruding in a zigzag manner is formed between the basic laminates, and filling a conductor between insulation protrusions, whereby a parallel connection is implemented on the basic laminates themselves while a serial connection is implemented between the basic laminates, thereby enabling a provision of mica capacitor having a high voltage property.

This invention generally relates to a set of parallelepipedal bodies (cubes) capable of matingly compatible engagement for interconnection with substantially similar cubes or matingly conformed rails, so as to allow up to three degrees of freedom in the sliding movement of an individual cube or grouping of cubes about a grouping of other interconnected cells from the set. Each cube is constructed from six plates or from three plate pairs. The interior physical configuration of tabs and slots lends itself to injection molding of plates or plate pairs. The exterior physical configuration of all plates and at least one of the exterior surfaces of the rails are substantially similar. When a number of cubes are assembled into a cubic array, there can be slab movement, row movement or solo cube movement.

Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises conductive layers with a designated depth formed on an upper and a lower surfaces of a chip, and electrode surfaces formed on the same side surfaces of the conductive layers, which are connected to corresponding connection pads of a printed circuit board. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.

A method of the invention includes preparing a mold having a hydrogen detection part pattern, a nanogap pattern and a base to be formed on a hydrogen sensor substrate; preparing a material to which the patterns are transferrable; forming the hydrogen sensor substrate by bringing the mold into contact with the material to thus transfer the patterns to the material and then detaching the mold from the material to which the patterns are transferred, the hydrogen sensor substrate having a base part corresponding to the base, a plurality of hydrogen detection parts erected from the base part and corresponding to the nanogap pattern and a plurality of nanogaps formed between the hydrogen detection parts and corresponding to the hydrogen detection part pattern; and forming, on the hydrogen sensor substrate, a thin film of a transition metal or an alloy thereof to be expanded by hydrogen.

Vacuum microelectronic devices with carbon nanotube films, layers, ribbons and fabrics are provided. The present invention discloses microelectronic vacuum devices including triode structures that include three-terminals (an emitter, a grid and an anode), and also higher-order devices such as tetrodes and pentodes, all of which use carbon nanotubes to form various components of the devices. In certain embodiments, patterned portions of nanotube fabric may be used as grid / gate components, conductive traces, etc. Nanotube fabrics may be suspended or conformally disposed. In certain embodiments, methods for stiffening a nanotube fabric layer are used. Various methods for applying, selectively removing (e.g. etching), suspending, and stiffening vertically- and horizontally-disposed nanotube fabrics are disclosed, as are CMOS-compatible fabrication methods. In certain embodiments, nanotube fabric triodes provide high-speed, small-scale, low-power devices that can be employed in radiation-intensive applications.

An optical carriage of scanner has a mirror assembly and a device assembly, the mirror assembly has a mirror mount, some mirror holder, and some supporters, and the device assembly has a chassis. In this invention, the mirror assembly and the device assembly are mechanically connected after separately formation. Further, to ensure correct shape of these mirror holders and these supporters, they could be formed by metal punch, plastic ejection, or plastic process.

An apparatus for measuring transmissivity of a patterned glass substrate. A beam radiator radiates a laser beam. A collimation lens collimates the laser beam radiated from the laser beam radiator. A beam expander expands a size of the laser beam collimated by the collimation lens. A detector has a light-receiving section, which receives the laser beam that has passed through the patterned glass substrate after having been expanded by the beam expander. A measuring section measures a transmissivity of the patterned glass substrate using the laser beam received by the detector.

Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises conductive layers with a designated depth formed on an upper and a lower surfaces of a chip, and electrode surfaces formed on the same side surfaces of the conductive layers, which are connected to corresponding connection pads of a printed circuit board. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.

A raw material for growing an ingot according to the embodiment comprises an agglomerate raw material in which fine particles are agglomerated, wherein the agglomerate raw material has a granular shape. A method for fabricating a raw material for growing an ingot according to the embodiment comprises the steps of: preparing an ultrahigh-purity powder; and granulating the ultrahigh-purity powder. A method for fabricating an ingot according to the embodiment comprises the steps of: preparing a raw material; filling the raw material in a crucible; and growing a single crystal from the raw material, wherein the raw material comprises an agglomerate raw material in which fine particles are agglomerated, and the agglomerate raw material has a granular shape.

A rolling bearing, particularly a slewing connection (1), comprising an outer bearing ring (2) and an inner bearing ring (3) and rolling elements arranged between said outer and inner bearing rings for rolling contact with associated raceways, a stop means for limiting an angle of rotation of the rolling bearing being arranged within the rolling bearing, whereby a first solution offered by the invention, the outer bearing ring (2) comprises on an inner peripheral surface a recess (14) which extends in peripheral direction and is limited at two ends by a first stop lug (15), the inner bearing ring (3) comprises on an outer peripheral surface a guide groove (16) which extends in peripheral direction and is limited at two ends by a second stop lug (17), and a guide element (18) arranged in the guide groove (16) connects the inner and outer bearing rings (3,2) to each other by positive engagement.

Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises an insulating layer formed on the upper surface of a chip provided with a plurality of terminals on its one surface, a plurality of conductive layers formed on the insulating layer and spaced from each other by a designated distance so as to be connected to each of a plurality of the terminals, and a plurality of electrode surfaces formed on each of the upper surfaces of a plurality of the conductive layers. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.

A method for manufacturing a multilayered cell sheet characterized in fabricating a vascular bed that constructs a vascular network extending to the surface from a channel for perfusing a medium, the channel being embedded in a gel; and layering a cell sheet onto the vascular bed to construct a vascular network in the cell sheet. This manufacturing method makes it possible to construct a vascular network in the cell sheet and to fabricate a thick multilayered cell sheet in a simple manner by layering cell sheets. Such a thick multilayered cell sheet is useful as an in-vivo tissue substitute in regenerative medicine involving a variety of tissues.