43 results about "Scalable architecture" patented technology

The disclosed embodiments provide systems and methods for automated mapping of raw data into a data fabric. An innovative approach leveraging Artificial Intelligence (AI)-powered tools and a data fabric to automate the ingestion, transformation, and integration of raw data into a unified model is introduced. By automating the data mapping process, organizations can reduce reliance on manual methods and accelerate their ability to utilize robust insights for exposure management and attack surface reduction. The disclosed solution provides a scalable architecture for unifying cybersecurity signals across cloud and hybrid environments, enabling real-time decision-making and improved organizational resilience against cyber threats

The invention discloses a water supply network optimization scheduling system based on clustering grouping and Cauchy variation, and belongs to the field of water supply network optimization scheduling. Through a multi-dimensional comprehensive optimization algorithm, an intelligent water consumption prediction model, a self-adaptive pressure partitioning technology, an intelligent pump station collaborative scheduling system, a comprehensive cost-benefit analysis tool, real-time data-driven dynamic scheduling, an interdisciplinary technology fusion platform and an environment-friendly scheduling strategy, the intelligent pump station collaborative scheduling system and the comprehensive cost-benefit analysis tool are integrated. The intelligent and automatic management of the water supply pipe network is realized through the innovation points of intelligent control, automatic operation, modularized and extensible software architecture and the like; data are collected in real time by using the Internet of Things technology, high-precision water consumption prediction is performed in combination with a deep learning model, and the water supply efficiency is optimized and the operation cost is reduced by dynamically adjusting pressure partition and pump station collaborative scheduling; green energy is preferentially used, new function integration is supported through modular design and an extensible framework, the system adapts to the requirements of different regions and pipe networks, and the long-term sustainable development capacity of the system is improved.

A hybrid quantum-classical computing system designed to enhance AI applications by integrating classical computational methods with quantum computing power. The system incorporates a classical computing unit and multiple quantum computing units, each specialized for distinct algorithmic tasks. A control module within the classical unit, using predetermined decision logic, manages the distribution of tasks, selectively engaging quantum units for their unique capabilities to optimize efficiency. This scalable architecture allows for significant advances in AI, tackling complex, resource-intensive tasks by effectively harnessing the strengths of both quantum superposition and classical processing.

The system (108) in the present disclosure for service barring workflow is designed to automate and streamline the process of managing service barring actions in a telecommunications network It provides centralized control, efficient processing. and granular control over service restrictions by implementing a method (400) involving various nodes. Tracking Area Code (TAC) and Network administrators. The system (108) offers advantages such as enhanced operational efficiency. accurate enforcement of service barring rules. real-time monitoring. and reporting capabilities. It integrates with network elements and ensures compliance with regulatory requirements. With its flexible and scalable architecture, the system (108) enables administrators and users to efficiently handle service barring requests while maintaining a positive customer experience. Overall, the system (108) for service barring workflow optimizes the service management process. enhances security, and contributes to effective network control and customer satisfaction.

The invention discloses an AES encryption and decryption hardware implementation method based on an RISCV vector encryption and decryption expansion architecture, and belongs to the technical field of data encryption, and the method comprises the steps that an RISCV instruction set carries out vector expansion on AES encryption and decryption, in the AES encryption process, an initial round corresponds to a vaesz.vs instruction, a middle round corresponds to a vaesem.[ vv, vs] instruction, a final round corresponds to a vaesef.[ vv, vs] instruction, in the AES decryption process, the initial round corresponds to the vaesz.vs instruction, and in the AES decryption process, the middle round corresponds to the vaesef.[ vv, vs] instruction. The middle round corresponds to a vaesdm. [vv, vs] instruction, and the final round corresponds to a vaesdf. [vv, vs] instruction, so that the area of a chip can be reduced, the cost is reduced, the flexibility, modularization and extensible architecture design of hardware and software are enhanced, different platforms from embedded computing to high-performance computing can be easily adapted, and a solid foundation is provided for evolution and customization of a future cryptographic algorithm; and the encryption processor architecture is promoted to develop towards a more efficient, more open and more customizable direction.

Scalable architectures, systems, and services are provided herein for generating jobs by applying user-specified rules to events in an action log framework (ALF) stream is disclosed. More specifically, collaboration environments can include features or mechanisms that allow end-users or collaborators to perform a variety of actions such as, for example, file uploads and previews, or collaboration operations such as, for example, task assignment and comments. These actions can be captured or logged by an action log framework and, as described herein, automatically translated into one or more jobs by applying customizable user-specified rules.

Enhanced Common Packet Radio Interface (eCPRI) based Fronthaul forms the foundation for open radio access network (O-RAN). O-RAN envisages splitting the radio into two parts, a Distributed Unit (DU) and Radio Units (RU), interconnected using high speed Fronthaul links. O-RAN and eCPRI for 5G / NR place demands for high speed Fronthaul with low latency, and high network bandwidth requirements. In the present disclosure, embodiments for configurable eCPRI Fronthaul solutions are disclosed. Various hardware accelerator implementations are presented for control plane and user plane traffic. The hardware accelerator implementation may support DU and RRU functionality required by eCPRI with minimal software intervention. The configurable eCPRI Fronthaul may support different data flows and meet different performance demands of DU and RRU. Scalable architecture may be applied for the configurable eCPRI Fronthaul to allow stacking of multiple hardware accelerators via a high-speed network interconnect, and overall performance and throughput may be improved.

The invention discloses a transaction platform system of a virtual product, and the system comprises a modular transaction engine which is used for carrying out the modular splitting of a transaction process of the virtual product, and comprises a commodity management module, a user management module, a risk control management module, an order management module, a settlement management module, an after-sales management module, and a financial management module; the dynamic rule engine is used for configuring transaction parameters in real time, and the transaction parameters comprise transaction timeliness, price strategies and delivery modes; and the user growth management module is used for constructing a growth model based on the user transaction data, and converting the transaction frequency and amount of the user into a user level and a right reward. According to the invention, an integrated system architecture of a modular transaction engine, a dynamic rule engine, a growth type user system, an extensible architecture and a full-link security mechanism is constructed, so that the defects in the prior art are overcome.

Techniques and apparatuses are described for scheduling using decoupled grant and accept stages. In example aspects, an arbiter (202) of a crossbar scheduler uses buffering to decouple the grant and accept stages (314 and 318) for scheduling. The buffering divides the scheduling operation into input scheduling (310) and output scheduling (312), which can be performed in parallel. With a decoupling circuit of the arbiter (202) providing the buffering, data flows in a pipeline fashion from an initiator (302) to a target (304) across at least two cycles. The decoupling of the grant and accept stages (314 and 318) provides additional flexibility in performing the input scheduling (310) using an input-first mode (322) or an output-first mode (324). By decoupling the grant and accept stages (314 and 318), the arbiter (202) can have a scalable architecture that supports high-speed and high-throughput scheduling.

Methods and systems are disclosed for automatic generation of content distribution images that include receiving user input corresponding to a content-distribution operation. The user input may be parsed to identify keywords. Image data corresponding to the keywords can be identified. Image-processing operations may be executed on the image data. Executing a generative adversarial network on the processed image data, which includes: executing a first neural network on the processed-image data to generate first images that correspond to the keywords, the first images generated based on a likelihood that each image of the first images would not be detected as having been generated by the first neural network. A user interface can display the first images with second images that include images that were previously part of content-distribution operations or images that were designated by an entity as being available for content-distribution operations.

Aspects of the disclosure are directed to dynamic error correction coding (ECC) disable control. In accordance with one aspect, the disclosure includes assigning each of a plurality of control status registers (CSRs) to each of a plurality of memory groups referenced by a group index to an indicator for error correction coding (ECC) disablement; and performing a dynamic ECC disablement for a plurality of data words for writing to one of the plurality of memory groups according to the indicator in an assigned each of the plurality of CSRs.

This invention discloses a general cognitive enhancement platform, system, method, and storage medium. The method includes: maintaining a scene registry, which stores the definition of at least one cognitive enhancement scene. Each scene definition includes a scene identifier, functional modules, a processing engine, and a pipeline mode; responding to requests to activate a specific cognitive enhancement scene; loading the corresponding functional modules and processing engine according to the scene definition in the scene registry and configuring the pipeline mode; processing input data through the processing engine to generate enhanced content via the functional modules; and presenting the enhanced content to the user. This invention also provides independent vision correction methods and systems, and real-time translation methods and systems. This invention achieves a scalable architecture for cognitive enhancement applications through a scene registry, solving the technical problems of closed architecture, lack of scalability, and repetitive functional development in existing technologies.

Disclosed is an electromagnetic-circuit co-design approach for massively reconfigurable, multifunctional, and high-speed programmable metasurfaces with integrated chip tiling. The ability to manipulate the incident electromagnetic fields in a dynamically programmable manner and at high speeds using integrated chip tiling approach is also disclosed. The scalable architecture uses electromagnetic-circuit co-design of metasurfaces where each individual subwavelength meta-element is uniquely addressable and programmable. The disclosed device comprises a large array of such meta-elements. The design relies on integrated high frequency switches designed in conjugation with meta-element for massive reconfigurability of incident amplitude and phase. The disclosed chip is multi-functional and can perform beamforming, high speed spatial light modulation, dynamic holographic projections, and wavefront manipulation.

The application provides an Internet of Things edge computing gateway system and method with an extensible architecture, and belongs to the technical field of Internet of Things applications. The gateway system comprises a hardware system and a software system. The hardware system supports multiple types of protocols and device access in physical connection. The software system adopts a micro-service architecture based on containers, and comprises a network access layer, a device abstraction layer, a custom logic layer and a cloud connection layer, four-layer systems, to provide multiple functional components such as device connection services, configuration management services, edge computing services and data uploading services. The gateway has wide applicability and can be applied to various application scenarios such as intelligent factories, smart homes and smart agriculture. The gateway has strong extensibility in terms of software and hardware functions, meets the flexible customization requirements of edge computing applications, has high reliability and security, and provides a user-friendly configuration management interface.

Embodiments relate to a waveform processing device. The device can include a first input node configured to receive a first signal and a second input node configured to receive a second signal. The device can include a pulse generator including a self-timed digital converter (DTC) with a clock generator (CLK). The device can include a switching network configured to be driven by an output from the pulse generator to modulate the first signal and the second signal in synchronization.

In one embodiment, an apparatus includes a first die adapted on a second die. The first die may have a plurality of cores, each of the plurality of cores associated with a first plurality of through silicon vias (TSVs), and the second die may have dynamic random access memory (DRAM). The DRAM of the second die may have a plurality of local portions, each of the plurality of local portions associated with a second plurality of TSVs, where each of at least some of the plurality of cores are directly coupled to a corresponding local portion of the DRAM by the corresponding first and second plurality of TSVs. Other embodiments are described and claimed.

The present invention relates to the field of intelligent service platforms, and discloses a university AI intelligent one-stop service system based on an agent platform, including: an SQL processing module for converting natural language input by a user into SQL statements of a target database; a vector library management module for docking and adapting with various mainstream open-source and closed-source vector libraries and interacting with different vector libraries through a unified API interface; an extensible architecture module that supports multiple models and multiple inference frameworks and processes data from databases, web pages or PDF files; a vertical domain expertise module for performing data preprocessing and pre-training models on university vertical domain data, outputting material completeness scores, missing item detection, and urgency classification information, and adjusting parameter settings according to industry characteristics, and customizing and optimizing the interaction experience through role-based prompt words. This application can intelligently process and analyze multi-source data, significantly improving the business handling efficiency and user experience of the university online service hall.

The invention provides a digital management method for small and medium-sized enterprises, which belongs to the technical field of digital management, and is characterized in that an extensible framework is constructed through integration of an open source ERP system and a low-code development platform, and modular configuration is realized in combination with enterprise scale parameters and business type parameters. The method comprises a main data management system based on a hybrid coding rule, a three-level data exchange system, a double-track digital governance mechanism and external system standardized interaction, and a technical debt management and control model and a disaster recovery test mechanism are introduced. According to the method, the problems of high digitalization cost, difficulty in customization, data islanding and the like of small and medium-sized enterprises are solved, low-cost rapid deployment, cross-platform data intercommunication, data quality controllability and service continuity guarantee are realized, and the digitalization management efficiency and the return on investment rate of the small and medium-sized enterprises are remarkably improved.

In one embodiment, the present disclosure pertains to data cleansing. In one embodiment, data cleansing is performed across a distributed master data store asynchronously in a scalable architecture, thereby allowing vast amounts of input records to be processed more efficiently.

A special waveform generation method of an extensible framework is characterized by comprising the steps that a Visual Basic language is used for compiling a visual interface, original code element data are received, and an upper computer unpacks the original code element data into multiple pieces of subpackage data with the size being 1 KB; the first file stores the addresses of all used FLASH blocks, the second file stores the lengths of all waveforms, and the third file stores the initial address of each waveform cached to an SRAM (Static Random Access Memory); 3 files are sent to the network chip, the network chip sends data to the M FLASH for solidification and then calls the data to the N SRAMs, the FPGA calls the data from the SRAMs according to requirements and sends special waveform code elements to the DAC, and the DAC generates specific baseband waveforms and sends the baseband waveforms to the excitation source.

A method for providing an extensible architecture to facilitate automated event management is disclosed. The method includes receiving an indication that relates to an occurrence of a first event, the indication including event data; parsing the event data to generate event messages that correspond to the first event, each of the event messages relating to a structured data set that is accessible within a network environment; applying, by using the at least one event message, a rule and a corresponding trigger to accounts that are associated with the first event; initiating resolution actions for each of the accounts based on the rule and the corresponding trigger; and modifying a resolution indicator that is associated with each of the accounts based on results of the resolution actions.

The disclosed protocol analyser (100) decodes and analyse PCIe signals between a host node (102) and a device node (104), the signals being routed through an interposer (106). The analyser comprises at least a pair of high data rate 1:3 fanout buffers (108). The signals from the interposer are fed to the buffers (108) to obtain three copies of the signals. Three transceivers (110a, 110b, 110c) receive the signals from the fanout buffers and each of them samples one of the three copies of the signals. A link training and status state machine decoder (112) detects a speed or a change in speed in the PCIe signals. Based on the detected speed it selects one of the tapped signals, for protocol decoding and analysis. A protocol analyser logic block (114) analyses one of the copies of the signals conforming to the relevant PCIe protocols, from Gen1 to Gen6.

Hardly any work in literature attempts employing Function-as-a-Service (FaaS) or serverless architecture to accelerate the training or re-training process of meta-learning architectures. Embodiments of the present disclosure provide a method and system for meta learning using distributed training on serverless architecture. The system, interchangeably referred to as MetaFaaS, is a meta-learning based scalable architecture using serverless distributed setup. Hierarchical nature of gradient based architectures is leveraged to facilitate distributed training on the serverless architecture. Further, a compute-efficient architecture, efficient Adaptive Learning of hyperparameters for Fast Adaptation (eALFA) for meta-learning is provided. The serverless architecture based training of models during meta learning enables unlimited scalability and reduction of training time by using optimal number of serverless instances. An analytical model for gradient based meta learning architectures that predicts training time required for the number of FaaS instances is provided which further enables estimating the cost incurred during training models in meta-learning.

Systems, devices, methods and architectures for quantum computing are disclosed. A system for controlling quantum elements includes input signal sources configured to generate signals, where each input signal source is coupled with at least one quantum element; and at least one controller configured to provide data signals comprising instructions, where the instructions are configured to cause the system to generate control sequences, where the sequences are configured to apply desired respective operation on the at least one quantum element, each control sequence includes a time-dependent series of control subsequences, and each control subsequence includes a signal generated by a single input signal source at a time interval, or defines a time interval during which the plurality of input signal sources does not generate signals; and apply the control sequences on the at least one quantum element.