1 results about "Sequence memory" patented technology

This invention discloses a low-instruction-overhead, reconfigurable normalization operator implementation method based on SIMD vector processing, relating to deep learning algorithm model technology and electronic information technology. The invention first divides the normalization operator into reduction and scalar operations, compiles the operations into a fixed sequence of M microcodes, preloads them into a microcode sequence memory, and configures a SIMD vector processing unit consisting of an instruction decoding unit, a hardware autonomous execution engine, and a memory access address generator. It continuously performs sequence length token and channel group scanning, performing P×N iterations on P groups of channels and N tokens, physically reusing the microcode sequence. The microcode pointer is automatically reset to zero, and intermediate result fusion is adaptively completed by scalar microcode operator encoding. Compared with existing GPU solutions, this method has better reconfigurability, lower execution cycle, and lower instruction overhead.