The invention provides a high-speed interface data sampling circuit and a
chip. A phase-locked loop of the high-speed interface data sampling circuit outputs a first
clock signal and a second
clock signal multiplied by the first
clock signal based on a received reference
clock signal; the logic
processing module carries out multi-stage trigger sampling on the first
clock signal according to the second
clock signal to obtain a target clock signal, and carries out multi-stage trigger sampling on the received
data signal based on the target clock signal, so that the target clock signal is sampled at a specified position of the
data signal; the problem of error codes caused by overlarge
phase difference between a clock signal and a
data signal can be effectively avoided, so that a better sampling effect and a lower error rate can be obtained during high-speed
data transmission; meanwhile, the sampling clock and the control clock for parallel-serial conversion can be cooperatively adjusted in phase, so that
time sequence deviation in a sampling path and an output path is compensated, and stable and reliable parallel data sampling and serial output of the high-speed interface can still be realized in different rate
modes.