20 results about "Current ramp" patented technology

A superconducting machine system includes a superconducting electrical machine and a cryogenic vessel encompassing the superconducting electrical machine. The superconducting machine system includes a ramp lead assembly disposed within a vacuum vessel wall and having a first end and a second end. The first end of the ramp lead assembly is coupled in a fixed manner to the vacuum vessel wall and the second end is coupled to a high temperature superconductor power lead coupled to the superconducting switch. The ramp lead assembly includes a non-conductive support and a metal rod. The ramp lead assembly includes a thermal storage device coupled to the metal rod. The thermal storage device is configured to store heat, to limit heat transfer along the metal rod, and to limit an increase in temperature along the ramp lead assembly during the energization of the superconducting electrical machine.

The invention discloses a resonant converter output overload and short circuit protection system and method without output current detection, and belongs to the technical field of power electronic converters. When a resonance tank current peak detection signal is equal to a ramp signal to trigger a comparator to output a high-level pulse, the edge triggers the microcontroller to interrupt, and the register value of the current ramp signal is captured immediately after interruption, so that a resonance current peak can be obtained. After an output overload and short circuit fault mark based on the value and the output voltage is triggered, the switching frequency is adjusted through the slope parameter self-adaptive controller to achieve output overload protection, and when the output overload is serious or short circuit occurs, rapid wave sealing protection can be achieved through a software code and a hardware comparator. And meanwhile, the soft start function of the resonant converter can be realized by gradually decreasing the initial value of the set slope descent rate cycle by cycle during starting. The control performance of the resonant converter is improved under the control of the peak current, and the output overload and short circuit protection function can be realized without adding an output current detection circuit.

The invention relates to the technical field of coatings, in particular to a PVD (Physical Vapor Deposition) coating process method applied to a galvanized sheet stamping die, which comprises the following steps of: pretreating the die, cleaning the surface of the die by a wet process, placing the die in a vacuum deposition cavity, vacuumizing, and heating to a preset temperature in an inert gas environment; plasma pretreatment is conducted on the surface of the mold, a high-power pulse magnetron sputtering cathode of a chromium target is selected to discharge in the argon working environment to generate plasma rich in chromium ions, and negative bias voltage is applied to the mold; starting at least one unbalanced magnetron sputtering cathode, gradually increasing the target current by the unbalanced magnetron sputtering cathode in a current ramp-up mode so as to improve the target voltage, and synchronously introducing nitrogen as a reaction gas, so that a nitride transition layer is deposited on the surface of the mold; and a high-power pulse magnetron sputtering cathode and an unbalanced magnetron sputtering cathode synchronously work on the transition layer to carry out multi-source reactive sputtering deposition, so that a multi-layer hard coating formed by alternating titanium aluminum vanadium and chromium nitride is formed. By combining the high-power pulse magnetron sputtering technology and the unbalanced magnetron sputtering technology, the problems that in the prior art, a coating is poor in adhesive force and insufficient in high temperature resistance are solved.

A system and method for measuring mutual inductance between adjacent first communication transmission line and second communication transmission line is disclosed. The system includes a mutual inductance measurement circuit that includes a coupling generator which biases the first communication transmission line with a current ramp signal; a sample and hold circuit which captures an induced voltage on the second communication transmission line using a switched capacitor storage element; a switched capacitor integrator configured to integrate the induced voltage onto an output voltage node; and a comparator configured to switch states once the switched capacitor integration has surpassed a reference trippoint.

The invention provides a slope working step charge and discharge control method based on dynamic scanning, which comprises the following steps that: after client software of a battery test system is opened, a channel to be tested is selected and slope working step information is edited, a client issues working steps to a middle computer through a TCP / IP (Transmission Control Protocol / Internet Protocol); the middle computer issues configuration to a specific channel of the lower computer through an RS485 bus when executing a slope step; the lower computer executes a voltage slope test or a current slope test according to the slope test type, if configuration abnormity exists, the test is paused and fed back to the middle computer and the client for prompting, and if not, all slope section tests and the cycle index are executed until the test is finished; charge and discharge of the battery are controlled by dynamically scanning slope steps, the stability, safety and reaction rate of the battery under different stresses are tested, test data are provided for research and development, stability and quick response of battery materials, and the requirements of users for slope testing of various batteries are met through self-definition.

A method and a controller for controlling a brushless DC motor are provided. A method for controlling a brushless DC motor having a plurality of phases, each phase being powered by a different leg of an inverter, the method comprising: generating a trapezoidal current reference signal for each phase of the brushless DC motor, the trapezoidal current reference signal having a current ramp-up phase having a stepped profile along which the current ramp-up phase is coupled to the current ramp-down phase, and a current ramp-down phase along which the current ramp-down phase is coupled to the current ramp-up phase; the trapezoidal current reference signal has a zero slope for a part of the current ramp-up stage and a non-zero slope in other parts, the current ramp-down stage has a stepped profile along which the trapezoidal current reference signal has a zero slope for a part of the current ramp-down stage and a non-zero slope in other parts; and adjusting the duty cycle of the switching control signal for each leg of the inverter such that the current through each inverter leg is forced to follow the trapezoidal current reference signal for the corresponding phase.

A power supply device applied to fuel cells, comprising a power conversion circuit and a control circuit. The power conversion circuit is configured to output corresponding power to a load on the basis of a power input signal of a fuel cell. The control circuit is configured to generate an input current control signal on the basis of an input power command and a power ramp rate command, or an input current command and a current ramp rate command, and a measured power value or a measured current value. On the basis of the input current control signal, the control circuit generates a control signal, and accordingly controls the power conversion circuit to adjust the power or current of the power input signal of the fuel cell. The input current of the power supply device can reach the expected target more quickly, and the power supply device is prevented from excessively drawing input power or current from the fuel cell. The present application also relates to an operation method.

A power management system for a display light emitting diode (LED) driver for an augmented reality / virtual reality (AR / VR) device mitigates (e.g., attenuates) an input peak power delivered to the LED driver from a DC source and decreases a voltage ramp rate of the LED driver while maintaining the default current ramp rate or vice versa. A liquid crystal on silicon (LCOS) digital process is used to provide a current reference with a slow ramp rate and / or to provide an offset. The offset (e.g., a delay) may be implemented between the voltage ramp and the current ramp to achieve a non-overlapping output voltage and output current.

This invention discloses a method for identifying server operational anomalies, relating to the field of electrical fault diagnosis technology. It addresses the problems of difficulty in detecting dynamic performance degradation of power supplies and high false alarm rates due to environmental noise. First, instantaneous voltage and current waveforms are synchronously acquired during load step transients. The transient response window is defined based on the current ramp-up slope, and the voltage drop amplitude is extracted. Then, the response window is aligned with the command trigger moment in the time domain, the lag time is calculated, and correlation analysis is performed with the voltage drop amplitude to accurately determine dynamic adjustment anomalies in the power supply circuit. If the dynamic adjustment is normal, the fundamental frequency of the instantaneous current waveform is removed, and a time-frequency decomposition algorithm is applied to calculate the energy spectral density and spectral entropy values ​​of each independent frequency band, constructing a frequency domain feature vector. Finally, the spectral correlation of adjacent nodes on the same busbar is used to separate common-mode interference from the external power grid, and internal hardware physical anomalies are determined only based on the remaining differential-mode components, achieving accurate identification of server power supply health and hardware faults.

Multiphase energy storage system comprising: - at least two energy storage cells (Z_k), each assigned an individually controllable phase angle (φ_k) relative to a common interconnect reference, - a control unit with an N-phase phase control loop (PLL) configured to charge the cells with phase shift (interleave operation) and discharge them in phase coherence within a defined focus window (Δt_focus), - the control unit temporally concentrates the stored co-energy of several cells onto a short output pulse of high instantaneous power (time focusing), - a side buffer bus (surge manifold, C_pool) with an active clamping path (AUX-FET, L_rec) that absorbs overshoot energy (W_overshoot) from switching and load transients and feeds it back into the cells or the DC link in a targeted manner, - a mirror pulse unit configured to generate a phase-conjugated current ramp pulse,which generates a targeted counter-oscillation to the transient and limits ringing to less than 10% of the peak value. The mirror pulse unit simultaneously feeds recoverable energy (W_rec) into the surge manifold, thereby combining transient attenuation and energy recovery in a single switching operation.

The invention relates to a temperature-limited fixed current ramp lead for a sealed low refrigerant superconducting machine. A superconducting machine system includes a superconducting electric machine and a freezing container surrounding the superconducting electric machine. A superconducting machine system includes a ramped lead assembly disposed within a vacuum vessel wall and having a first end and a second end. A first end of the ramp lead assembly is fixedly coupled to the vacuum vessel wall and a second end is coupled to a high temperature superconductor supply lead coupled to the superconducting switch. The ramp lead assembly includes a non-conductive support and a metal rod. The ramp lead assembly includes a thermal storage device coupled to the metal rod. The heat storage device is configured to store heat, limit transfer of heat along the metal rod, and limit a temperature increase along the ramp lead assembly during energization of the superconducting machine.

To mitigate voltage droop while reducing the power and space consumed on the board and reducing switching activity, a clock skipping scheme may be implemented for an FPGA. The clock skipping scheme may be implemented in the FPGA design via an Electronic Design Automation (EDA) tool. The EDA tool may define clock skipping cycles based on customer needs for current ramp up speed (e.g., for an inrush current or an operating current) and clock frequency. The EDA tool may adjust clock skipping based on a power target and / or usage conditions of a user software design. In addition to mitigating voltage droop and reducing space consumed on the board and power consumed by the FPGA, the clock skipping scheme may maintain a base clock frequency, enable timing closure at the base clock frequency, and alleviate the need to reclose timing during clock skipping operations.

A wearable monitoring system includes a first flexible substrate encapsulating a current ramping system to provide a current to an electrode in direct contact with a predetermined location of skin of a user to promote bodily fluid secretion, and a second flexible substrate placed over the predetermined location, the second flexible substrate having an integrated electrochemical sensor to determine bodily fluid concentration levels secreted through the skin.

An approach for controlling power distribution with respect to an ECB (electronic circuit breaker) is disclosed. The approach employs a microcontroller inside the ECB to directly control startup current, which facilitates optimization of startup and shutoff current ramp for specific switch and load types as well as mitigate the damaging negative voltages due to inductive "kick" at shutoff. Also, because of concurrent energy monitoring optimized for the MOSFET operating mode during startup, a pre-charge circuit is no longer needed. Furthermore, multiple overcurrent thresholds and energy limits allow for optimization of self-protection and system robustness. Downloadable thresholds provide flexibility to support variations in system configurations and ECB componentry.

An approach for controlling power distribution with respect to an ECB (electronic circuit breaker) is disclosed. The approach employs a microcontroller inside the ECB to directly control startup current, which facilitates optimization of startup and shutoff current ramp for specific switch and load types as well as mitigate the damaging negative voltages due to inductive “kick” at shutoff. Also, because of concurrent energy monitoring optimized for the MOSFET operating mode during startup, a pre-charge circuit is no longer needed. Furthermore, multiple overcurrent thresholds and energy limits allow for optimization of self-protection and system robustness. Downloadable thresholds provide flexibility to support variations in system configurations and ECB componentry.

An approach for controlling power distribution with respect to an ECB (electronic circuit breaker) is disclosed. The approach employs a microcontroller inside the ECB to directly control startup current, which facilitates optimization of startup and shutoff current ramp for specific switch and load types as well as mitigate the damaging negative voltages due to inductive “kick” at shutoff. Also, because of concurrent energy monitoring optimized for the MOSFET operating mode during startup, a pre-charge circuit is no longer needed. Furthermore, multiple overcurrent thresholds and energy limits allow for optimization of self-protection and system robustness. Downloadable thresholds provide flexibility to support variations in system configurations and ECB componentry.

A method of controlling a BLDC (brushless DC) motor having a plurality of phases each energized by a different leg of an inverter includes: generating a trapezoidal current reference signal for each phase of the BLDC motor that has a current ramp-up phase with a step profile along which the trapezoidal current reference signal has zero slope for a portion of the current ramp-up phase and non-zero slope elsewhere, and a current ramp-down phase with a step profile along which the trapezoidal current reference signal has zero slope for a portion of the current ramp-down phase and non-zero slope elsewhere; and adjusting a duty cycle of a switching control signal for each leg of the inverter, such that a current through each inverter leg is forced to follow the trapezoidal current reference signal for the corresponding phase. A corresponding controller is also described.

A formation process for a 48V platform sodium salt battery pack, belonging to the technical field of sodium salt battery packs. In order to solve the technical problem that when the existing technology forms a 48V platform sodium salt battery pack, the rapidly rising and falling voltage and current will affect the quality of the battery; the present invention uses a small current ramp charging method to ensure the performance of the battery pack, reduce the damage to the battery pack, set the current parameters according to the characteristics of the battery pack, and avoid the rapid rise and fall of voltage and current during the charging stage through stepped current lifting and constant current and constant voltage charging, which can reserve sufficient reaction time inside the battery pack, better match the performance of the sodium salt battery without self-discharge, make the analysis of battery performance more accurate, this process solves the problems of complex criteria and scattered parameters to be measured, deletes and simplifies some meaningless steps, and selects some representative monitoring points through multiple measurements and verifications for targeted detection, and the formation process time is short.

The invention provides a slope compensation circuit and a backlight display device. The slope compensation circuit comprises a first current generation module, a first current mirror module, a second current generation module and a second current mirror module, the first current generation module is electrically connected with the first current mirror module, and the second current generation module is electrically connected with the first current mirror module and the second current mirror module; the first current generation module generates a first current, the first current mirror module outputs a mirror current according to the first current, and the mirror current and the conduction time of the switching tube are in a linear function relationship; the second current generation module generates a second current according to the mirror current, the second current mirror module outputs a slope compensation current according to the second current, and the slope compensation current and the conduction time of the switching tube are in a quadratic function relationship. According to the slope compensation circuit, the problem that the linearly increased compensation current is difficult to meet the compensation intensity requirement when the turn-on time of the switch tube is obviously prolonged when the voltage conversion ratio of the existing slope compensation circuit is extremely high is effectively solved.

The present disclosure relates to a circuit (200) comprising: an output terminal (208) configured to be coupled with a load; a power source (202) configured to generate a current according to a current ramp such that the generated current exhibits a plurality of different current values within a range of current values from a minimum current value to a maximum current value during a predefined time period; a switching element (210) configured to selectively enable or disable delivery of the generated current to the output terminal (208); and a control circuit (212) configured to control the switching element (210) to deliver a predefined average current value at the output terminal (208) during a predefined time period.