5 results about "Current ramp" patented technology

The invention relates to the technical field of coatings, in particular to a PVD (Physical Vapor Deposition) coating process method applied to a galvanized sheet stamping die, which comprises the following steps of: pretreating the die, cleaning the surface of the die by a wet process, placing the die in a vacuum deposition cavity, vacuumizing, and heating to a preset temperature in an inert gas environment; plasma pretreatment is conducted on the surface of the mold, a high-power pulse magnetron sputtering cathode of a chromium target is selected to discharge in the argon working environment to generate plasma rich in chromium ions, and negative bias voltage is applied to the mold; starting at least one unbalanced magnetron sputtering cathode, gradually increasing the target current by the unbalanced magnetron sputtering cathode in a current ramp-up mode so as to improve the target voltage, and synchronously introducing nitrogen as a reaction gas, so that a nitride transition layer is deposited on the surface of the mold; and a high-power pulse magnetron sputtering cathode and an unbalanced magnetron sputtering cathode synchronously work on the transition layer to carry out multi-source reactive sputtering deposition, so that a multi-layer hard coating formed by alternating titanium aluminum vanadium and chromium nitride is formed. By combining the high-power pulse magnetron sputtering technology and the unbalanced magnetron sputtering technology, the problems that in the prior art, a coating is poor in adhesive force and insufficient in high temperature resistance are solved.

A system and method for measuring mutual inductance between adjacent first communication transmission line and second communication transmission line is disclosed. The system includes a mutual inductance measurement circuit that includes a coupling generator which biases the first communication transmission line with a current ramp signal; a sample and hold circuit which captures an induced voltage on the second communication transmission line using a switched capacitor storage element; a switched capacitor integrator configured to integrate the induced voltage onto an output voltage node; and a comparator configured to switch states once the switched capacitor integration has surpassed a reference trippoint.

This invention discloses a method for identifying server operational anomalies, relating to the field of electrical fault diagnosis technology. It addresses the problems of difficulty in detecting dynamic performance degradation of power supplies and high false alarm rates due to environmental noise. First, instantaneous voltage and current waveforms are synchronously acquired during load step transients. The transient response window is defined based on the current ramp-up slope, and the voltage drop amplitude is extracted. Then, the response window is aligned with the command trigger moment in the time domain, the lag time is calculated, and correlation analysis is performed with the voltage drop amplitude to accurately determine dynamic adjustment anomalies in the power supply circuit. If the dynamic adjustment is normal, the fundamental frequency of the instantaneous current waveform is removed, and a time-frequency decomposition algorithm is applied to calculate the energy spectral density and spectral entropy values ​​of each independent frequency band, constructing a frequency domain feature vector. Finally, the spectral correlation of adjacent nodes on the same busbar is used to separate common-mode interference from the external power grid, and internal hardware physical anomalies are determined only based on the remaining differential-mode components, achieving accurate identification of server power supply health and hardware faults.

An approach for controlling power distribution with respect to an ECB (electronic circuit breaker) is disclosed. The approach employs a microcontroller inside the ECB to directly control startup current, which facilitates optimization of startup and shutoff current ramp for specific switch and load types as well as mitigate the damaging negative voltages due to inductive “kick” at shutoff. Also, because of concurrent energy monitoring optimized for the MOSFET operating mode during startup, a pre-charge circuit is no longer needed. Furthermore, multiple overcurrent thresholds and energy limits allow for optimization of self-protection and system robustness. Downloadable thresholds provide flexibility to support variations in system configurations and ECB componentry.

The invention provides a slope compensation circuit and a backlight display device. The slope compensation circuit comprises a first current generation module, a first current mirror module, a second current generation module and a second current mirror module, the first current generation module is electrically connected with the first current mirror module, and the second current generation module is electrically connected with the first current mirror module and the second current mirror module; the first current generation module generates a first current, the first current mirror module outputs a mirror current according to the first current, and the mirror current and the conduction time of the switching tube are in a linear function relationship; the second current generation module generates a second current according to the mirror current, the second current mirror module outputs a slope compensation current according to the second current, and the slope compensation current and the conduction time of the switching tube are in a quadratic function relationship. According to the slope compensation circuit, the problem that the linearly increased compensation current is difficult to meet the compensation intensity requirement when the turn-on time of the switch tube is obviously prolonged when the voltage conversion ratio of the existing slope compensation circuit is extremely high is effectively solved.