7 results about "Radar system design" patented technology

The invention relates to the field of radar system design, in particular to a chaotic orthogonal waveform design method suitable for a one-transmitting multi-receiving radar system. Comprising the following steps: setting a group of M mutually different initial conditions for a radar system with a one-transmitting and M-receiving architecture; respectively substituting the M initial conditions into a chaotic system equation for numerical integration to obtain M chaotic time sequences; the M chaotic time sequences are preprocessed, and an orthogonal waveform set comprising M radar baseband waveforms which are orthogonal to one another is generated; performing linear superposition on M mutually orthogonal radar baseband waveforms in the orthogonal waveform set to form a combined transmitting signal; performing emission and distributed echo receiving on the combined emission signal to obtain a digitized mixed baseband echo signal; and carrying out separation and matched filtering processing on the mixed baseband echo signal at a receiving end. According to the invention, the problem that signals are difficult to effectively separate at a plurality of receiving ends in the existing one-transmitting-multiple-receiving system is solved.

The invention provides a time sequence control method and system for a target indication radar signal processing system, and belongs to the technical field of radar system design, and the method comprises the steps: an upper computer transmits protocol information to a signal processing board through serial port communication, the signal processing board analyzes a protocol, then forwards the protocol to a DA signal generation board and an AD signal collection board, and transmits the protocol information to the DA signal generation board and the AD signal collection board; parameter setting of each board card is completed, and a setting response is returned to the upper computer; after receiving a parameter setting correct response, the upper computer issues echo data to the DA signal generation board, and the DA signal generation board caches the echo data and generates an echo data loading completion signal; the signal processing board loads a completion signal according to echo data and generates a synchronizing signal to control the DA signal generation board to generate an echo signal, the AD signal acquisition board acquires the echo data and preprocesses the echo data, a preprocessing result is sent to the signal processing board to be processed, and finally the processing result is transmitted back to the upper computer. The invention provides an efficient and flexible sequential logic architecture.

The invention discloses a software and hardware design method of a radar frequency agility control system based on an RFSoC, and the method employs a ZYNQ chip and a radio frequency front-end receiving and transmitting assembly to carry out the design of a radar system, and employs an upper computer to carry out the control and transmission of frequency agility parameters. Waveform generation is carried out through a ZYNQ chip, AD / DA conversion is carried out, frequency agility control is carried out through a control radio frequency front-end transceiving assembly, and rapid response to interference changes can be realized through efficient processing and real-time control. According to the RFSoC-based radar frequency agility control system digital signal processing platform, radar waveform generation and inter-frame agility, inter-pulse agility and shield agility of radio frequency can be realized according to radar application scene requirements.

A design method for a phased array radar system based on antenna and RF transceiver integration is disclosed. The phased array radar system includes: a phased array antenna feed system connected to an integrated channel module; a secondary power supply module connected to power the phased array antenna feed system, the integrated channel module, and a signal processing module; the integrated channel module connected to the signal processing module; the phased array antenna feed system includes a basic module and waveguide sum and difference circuits; the basic module is packaged using wafer-level packaging technology, consisting of a multi-channel silicon-based CMOS T / R chip, an antenna, and a substrate; the integrated channel module includes a transceiver frequency converter chip and a frequency synthesizer; the transceiver frequency converter chip includes a transmit link and a receive link; the receive link includes a sum and receive channel, an azimuth difference receive channel, and an elevation difference receive channel. This invention adopts a phased array radar integration design concept based on silicon-based chip design, significantly reducing system cost and achieving miniaturized design.

The application belongs to the technical field of radar system, and particularly relates to a general radar timing real-time generation and updating method based on FPGA. The application specifically comprises establishing a radar working mode table according to different radar systems, and updating radar working mode parameters in real time for each CPI. When the radar working mode parameters are updated, a timing state machine in a reference timing module is used to switch and control a timing generation counter in real time. Thus, the timing pulses required by the radar system can be generated in real time and can be updated in real time. The application overcomes the poor generalization of the conventional radar timing module, and only needs to design different working mode tables for different radar systems to complete the generation of timing pulses in different working modes without updating the FPGA program of the timing module. Meanwhile, the application can realize the real-time switching of the timing in different working modes through the ping-pong switching of the timing state, thereby improving the stability of the radar system working.

The application discloses a kind of L wave band wide-beam high-power array surface design method and array surface, belong to radar system design and electronic countermeasure technical field, by inputting design into self-built optimization algorithm and optimizing, obtain N el ×N az Phase shift value, that is, by using the mode of equal amplitude and different phase, a wide-beam working mode with a beam width greater than 20°×20° is realized, which overcomes the defect that the existing technology needs to close part of the function by using the mode of equal amplitude and same phase, resulting in lower radiation power, and can increase the radiation power by more than 10.7dB, thereby expanding the range of the array, solving the contradiction between wide-beam and high-power in the array, and realizing wide-beam working mode and high-power at the same time.

The invention provides a synthetic aperture radar (SAR) four-dimensional imaging interference suppression method and system, and belongs to the technical field of satellite-borne radar system design and signal processing. The method comprises the steps that target four-dimensional information is coarsely reconstructed through pixel-by-pixel joint optimization; interference enhancement and residual calculation; carrying out space-time clustering interference detection and suppression; and target four-dimensional information is accurately reconstructed through pixel-by-pixel joint optimization. The system comprises a pixel-by-pixel optimization module for realizing the method, an interference enhancement and residual calculation module, a space-time clustering interference detection and suppression module and the like. According to the method, the problem of radio frequency interference suppression faced by SAR four-dimensional imaging is solved, the imaging precision and robustness in a complex scene are remarkably improved, and the method is suitable for the fields of resource investigation, disaster monitoring and the like.