80results about "Time-varying network" patented technology

The present invention proposes a new method and apparatus for the improvement of digital filterbanks, by a complex extension of cosine modulated digital filterbanks. The invention employs complex-exponential modulation of a low-pass prototype filter and a new method for optimizing the characteristics of this filter. The invention substantially reduces artifacts due to aliasing emerging from independent modifications of subband signals, for example when using a filterbank as an spectral equalizer. The invention is preferably implemented in software, running on a standard PC or a digital signal processor (DSP), but can also be hardcoded on a custom chip. The invention offers essential improvements for various types of digital equalizers, adaptive filters, multiband companders and spectral envelope adjusting filterbanks used in high frequency reconstruction (HFR) systems.

A sampling system arranged such that a modulated signal received by an antenna and input via a low noise amplifier and a band-pass filter is sampled at a sampling frequency higher than the signal band of the modulated signal by a first sample and hold circuit and is input to an analog decimation filter to remove a frequency component which may turn out to be aliasing noise. The output of the analog decimation filter is sampled with a sampling frequency lower than the sampling frequency of the first sample and hold circuit by a second sample and hold circuit and is digitized by an A / D converter to be demodulated by a demodulator. The sampling system which can convert the modulated signal into a low frequency without using the highly precision mixer circuit or a filter having sharp characteristics may be provided by constructing as described above.

In the hold phase, two negative feedback circuits constituted by the negative feedback capacitors 6p and 6m and two positive feedback circuits constituted by positive feedback capacitors are provided between an input terminal and an output terminal of an operational amplifier. Here, in a sampling phase before a hold phase, charges according an input signal V1p is stored in each of the capacitors, and charges according to an input signal V1p are stored in each of the capacitors. As a result, a gain of the switched capacitor amplifier circuit is derived from (Ca+C) / (Ca−Cx) wherein Ca indicates an electrostatic capacitance of the negative feedback capacitors, and Cx indicates an electrostatic capacitance of the positive feedback capacitors, and thus the gain can be increased without significantly increasing an electrostatic capacitance ratio.

A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.

A magnet-free non-reciprocal device realized using modulated filters. The device includes one or more filters in one or more branches, where each branch connects two ports or a port and a central node. The poles and zeros of each of the first, second and third filters are modulated in time such that degenerate modes at each pole and zero is split thereby destructively interfering at one or more output ports and adding up at another output port allowing non-reciprocal transmission, isolation and / or non-reciprocal phase shift. The device is able to realize a magnet-free full-duplex communication scheme implementing a magnet-free circulator for radio frequency cancellation or a magnet-free isolator or gyrator.

The invention provides a high-frequency-selectivity radio-frequency front end suitable for nano-scale. The front end comprises a high-frequency input matching network, a lower-noise transconductor, a load network and a passive frequency mixer, wherein the passive frequency mixer is arranged on an output node of the input matching network or the low-noise transconductor or the load network; impedance conversion is adopted by the input matching network and the load network to realize high Q values and high frequency selectivity for filtering out-of-band interference; a radio-frequency signal is filtered by using the high-Q-value input matching network, and is then amplified by using the transconductor and the load of the high-Q-value load network which is subjected impedance conversion; a high-frequency signal is converted to a low-frequency signal by performing down-conversion with the passive frequency mixer for processing with an analog or digital baseband. The radio-frequency front end has the advantages of low power consumption, high image rejection ratio, high out-of-band linearity, strong gain configurability, no need of off-chip SAW (Surface Acoustic Wave) filter and the like, and is suitable for application to a future multifunctional integrated radio-frequency chip.

To eliminate the problem that, in the conventional car-mounted electronic control device the size of an IC diode becomes bigger because the CPU handles a considerable amount of input and output and the ECU becomes bigger to maintain a filter constant of a noise filter. The patent relates to the car-mounted electronic control device which includes a core integrated circuit device has a microprocessor. A first ancillary integrated circuit device has an indirect parallel input circuit that receives low-speed digital signals parallel, and the first ancillary integrated circuit device outputs the received digital signals serially to the core integrated circuit device. A second ancillary integrated circuit device has a multi-channel A / D converter that receives analog signals parallel and converts those into digital signals, and the second ancillary integrated circuit device outputs the digital signals serially to the core integrated circuit device. The core integrated circuit device generates control signals based on the received signals and outputs the control signals to control object devices.

The present invention provides a signal processor including a microprocessor for generating and supplying a control signal pulse train, a gain control circuit having a first switching device opened / closed by the control signal pulse train and resistors for determining an amplification factor with respect to a signal voltage as input and varying the resistances of the resistors in response to a pulse duty of the control signal pulse train, thereby controlling the amplification factor with respect to the signal voltage as input, and a switched capacitor filter circuit having second switching devices opened / closed by the control signal pulse train and a charging / discharging capacitor connected to the second switching devices, thereby adjusting filter characteristics in response to the pulse frequency of the control signal pulse train. The control signal pulse train is supplied commonly to the first and second switching devices.

To miniaturize and standardize an on-vehicle electronic controller by improving an input filter circuit in the device. Direct input interface circuits and a direct output interface circuit are connected to a data bus of a microprocessor, which has a nonvolatile memory for storing a control program and so on and a RAM memory for computing. ON / OFF signals inputted from indirect input interface circuits are transmitted to the RAM memory via a variable filter circuit, in which a filter constant is set by a constant setting register, and interactive serial communication circuits. A filter constant stored in the nonvolatile memory is stored in the constant setting register via the interactive serial communication circuits.

In order to reduce capacitance of a feedback section of an operational amplifier provided in a semiconductor integrated device, an active filter of the present invention includes an operational amplifier in which a plurality of capacitive elements are connected between (i) an output terminal and (ii) an inverting input terminal or an input terminal. This arrangement does not require any special technique and amendment of an ordinary integrated circuit process. Further, this arrangement ensures small capacitance in the feedback section of the operational amplifier, while preventing deterioration in S / N ratio, and increases in switching noise and power consumption.

The invention is concerned with broadband low loss switch filter group of surface acoustic wave. The group relates to tow groups of multi-throw switch with one knife and some filters of surface acoustic wave. One group switch joins up the imports of some filters of surface acoustic wave, the other group joins up the fan-outs of some filters of surface acoustic wave and the tow groups of switch is corresponding to each other. The structure to said filter of surface acoustic wave is longitudinal coupling resonant to realize the low loss. Different channels adopt some different longitudinal coupling structure to get as same bandwidth as possible for each channel. The base plate is LiNbO3, LiTaO_3, and so on. This invention affords a kind of switch filter group of surface acoustic wave for broad band to communications system (single channel relative bandwidth is 2%-7.3%), low loss (containing the switch, less than 6.5dB) and higher stop-band limit (more than 40 dB ).

A method and apparatus for selective programmable filtering using analog circuits with time-varying components (e.g., resistances, capacitances) is presented. An analog front end receives an electronic signal and filters said signal by a passive or active continuous-time filter, having a combination of equivalent memory-less (e.g., resistive) and memory (e.g., capacitive or inductive) elements. A variable resistor circuit allows switching through a range of values to control one or more of the equivalent resistances of the passive or active continuous-time filter. The variable resistors are controlled using a control circuit to periodically modulate the resistances in the continuous-time filter between periodic sampling instances, such as during analog to digital conversion. Such periodic modulation of the resistances in the continuous-time filter allows for the programming and enhancement of the selectivity of said filter.

The present invention proposes a new method and apparatus for the improvement of digital filterbanks, by a complex extension of cosine modulated digital filterbanks. The invention employs complex-exponential modulation of a low-pass prototype filter and a new method for optimizing the characteristics of this filter. The invention substantially reduces artifacts due to aliasing emerging from independent modifications of subband signals, for example when using a filterbank as an spectral equalizer. The invention is preferably implemented in software, running on a standard PC or a digital signal processor (DSP), but can also be hardcoded on a custom chip. The invention offers essential improvements for various types of digital equalizers, adaptive filters, multiband companders and spectral envelope adjusting filterbanks used in high frequency reconstruction (HFR) systems.

A rectangular parallelepiped projecting portion (21) having a height of HB and a width of WB is formed on a silicon substrate, and a gate oxide film is formed on a part of the top surface and the side surface of the projecting portion (21), thereby generating a MOS transistor. By connecting in parallel a p-channel MOS transistor and an n-channel MOS transistor produced as described above, a switch of a switched capacitor circuit is configured, thereby reducing a leak current and a DC offset of the switched capacitor circuit.

A low-noise switched-capacitor circuit with a built-in amplifier relates to a switched-capacitor circuit. The low-noise switched-capacitor circuit comprises a switched-capacitor circuit and an active amplifier, wherein the switched-capacitor circuit includes a switch, a capacitor and an amplifier; the input terminal of the active amplifier is connected with the switch; the output terminal of the active amplifier is connected with the capacitor; and the capacitor is connected with the negative input terminal of an operational amplifier. The low-noise switched-capacitor circuit can be used for a switched-capacitor amplifier, a switched-capacitor integrator and other switched-capacitor circuits of other types to meet the requirement for low noise of the system and simultaneously reduce the occupied chip areas and the power consumptions of the capacitor and the operational amplifier. The low-noise switched-capacitor circuit can maximally reduce the desired chip area and the power consumption for the switched-capacitor circuit during low-noise operation, so that the noise index of the switched-capacitor circuit is not restricted by sampling noise, i.e. KT / C noise, of the capacitor.

In order to reduce capacitance of a feedback section of an operational amplifier provided in a semiconductor integrated device, an active filter includes an operational amplifier in which a plurality of capacitive elements are connected between (i) an output terminal and (ii) an inverting input terminal or an input terminal. This arrangement does not require any special technique and amendment of an ordinary integrated circuit process. Further, this arrangement ensures small capacitance in the feedback section of the operational amplifier, while preventing deterioration in S / N ratio, and increases in switching noise and power consumption.

A low pass filter circuit includes an amplifier having a single-ended output. A first line and a second line are arranged to receive a differential signal. A first switch selectively connects the first line to a first input of the amplifier in a first cycle of operation having a first observation window. A second switch selectively connects the second line to a second input of the amplifier in a second cycle of operation having a second observation window that is at least partially coincident with the first observation window. A signal measuring stage that is supplied with a modulated input signal generates the differential signal. The signal measuring state has an input switch to reverse a polarity of the differential signal applied to the first and second lines of the low pass filter circuit.

In one embodiment, the modulator in an analog-to-digital converter includes a first reset switch and second reset switch, each controlled by a reset signal. The first reset switch is connected in a first reset feedback path between an input and an output of an integrator stage, and the second reset switch connected in a second reset feedback path between the input and the output of the integrator stage.

A receiver includes a sample and hold module, a discrete time filter module, and a wireless frequency to baseband conversion module. The sample and hold module is operable to sample and hold an inbound wireless signal at a rate corresponding to a multiple of a carrier frequency of the inbound wireless signal to produce a frequency domain sample pulse train. The discrete time filter module is operable to filter the frequency domain sample pulse train to produce a wireless frequency pulse. The wireless frequency to baseband conversion module is operable to convert the wireless frequency pulse to a baseband digital signal.

A receiver includes a bandpass filter module, a sample and hold module, first and second discrete time filter modules, and first and second conversion modules. The bandpass filter module is operable to filter an inbound wireless signal. The sample and hold module is operable to sample and hold the filtered inbound wireless signal to produce a frequency domain sample pulse train. The first discrete time filter module is operable to filter the frequency domain sample pulse train to produce a first filtered sample pulse. The second discrete time filter module is operable to filter the frequency domain sample pulse train to produce a second filtered sample pulse. The first conversion module is operable to convert the first filtered sample pulse into a first inbound baseband signal. The second conversion module is operable to convert the second filtered sample pulse into a second inbound baseband signal.

A delay circuit is disclosed. A switched-capacitor group includes a plurality of switched-capacitor units, each of which have a switching element and a capacitive element charged / discharged by turning on / off the switching element. The switched-capacitor units are connected such that the input signal is input in common to all of the switched-capacitor units and the capacitive elements are charged as well such that the capacitive elements are discharged to allow the output signal to be output from the switched-capacitor units. A switching control unit performs on / off control of the switching elements to cause the capacitive elements to be charged in sequence based on the input signal, causing the capacitive element charged last time to be discharged to allow the output signal to be output in sequence from the switched-capacitor units, and performs control of all of the switching elements to be turned off upon on / off switching of the switching elements.

Provided is a wideband amplifier which can provide an increased operation bandwidth without being limited by manufacturing process. A source follower circuit having a MOS transistor and constant-current supplies is provided in parallel to a MOS transistor serving as an amplifier of the input stage. Furthermore, the sources of the MOS transistor serving as the output of the source follower circuit are connected to the output nodes of the input stage amplifier via phase compensation capacitors, respectively. This configuration provides an increased phase allowance to the wideband amplifier, thereby providing an improved operation bandwidth without being limited by the manufacturing process employed.

The present invention relates to a switch capacitance second order band-pass filter which is provided with four programmable capacitors, if two integrating capacitor values of the filter are C1 and C2 respectively, capacitance values of four programmable capacitor are Alpha1C1, Alpha2C2, Alpha3C1, Alpha4C2, wherein, Alpha1-Alpha4 satisfies: Alpha1=Alpha2=Omega0T, Alpha3=1 / Q, Alpha4=KT. Wherein, Omega0 is filter center frequency, Q as filter figure of merit, and K as filter gain coefficient. Thereby the three parameters can be adjusted independently. The present invention also puts forward continuous time RC structure with above band-pass filter and difference structure.

A receiver includes a sample and hold module, a discrete time filter module, and a conversion module. The sample and hold module is operable to sample and hold a first inbound wireless signal and a second inbound wireless signal to produce a frequency domain sample pulse train. The discrete time filter module is operable to filter the frequency domain sample pulse train to produce a first filtered sample pulse corresponding to the first inbound wireless signal and to produce a second filtered sample pulse corresponding to the second inbound wireless signal. The conversion module is operable to convert the first filtered sample pulse into a first inbound baseband signal and to convert the second filtered sample pulse into a second inbound baseband signal.