31results about How to "Avoid volume increase" patented technology

A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the like, the stress is dispersed to the main wall part and the sub-wall part, and hence peeling between layers and a crack are unlikely to occur, as compared with the conventional art. Further, even if the crack and the like occur at the corner, moisture from the outside hardly reaches the integrated circuit part when the main wall part and the sub-wall part are coupled to each other. For this reason, it is possible to ensure an extremely high moisture resistance.

A fluid pump includes a case including a pump chamber, a reserve tank for storing spare liquid and located in the case but outside the pump chamber and formed so that a space independent of the pump chamber is defined by the reserve tank, a fluid path forming member arranged inside the reserve tank and including a discharge path communicating between a discharge port and the pump chamber, and a communication hole which is formed in a side of the fluid path forming member so as to assume such a position that the communication hole faces an inside of the reserve tank so that the hole communicates between the discharge path and the inside of the reserve tank, the communication hole being sized so that air in the pump chamber is allowed to flow through the hole into the reserve tank.

A method of designing a semiconductor integrated circuit based on the TPI technique, comprising: (A) selecting a target node from a plurality of nodes included in a design circuit; (B) inserting a test point at the target node; (C) designating a delay time with respect to a test point path that is a path connected to the test point; and (D) laying out the design circuit such that a delay time of the test point path becomes the designated delay time. The (A) selecting includes: (A1) calculating delay times of fan-in paths and fan-out paths with respect to each of the plurality of nodes; and (A2) selecting the target node from the plurality of nodes based on the calculated delay times.

A hybrid vehicle equipped with an internal combustion engine and a motor-generator for running the vehicle, includes: a power storage device to be supplied to the motor-generator; a current leakage detection circuit detecting a decrease in insulation resistance, the current leakage detection circuit being electrically connected to a negative electrode of the power storage device; an electrical heated catalyst device; and a power supply device that converts electric power from the power storage device into energization power of the electrical heated catalyst device by a power conversion path passing through an insulating mechanism. The power supply device includes a switching device. The switching device is opened when the electrical heated catalyst device is energized, and is closed when the decrease in insulation resistance of the electrical heated catalyst device is detected.

The present invention is directed to facilitate debugging in a semiconductor integrated circuit device including a plurality of microprocessors. A semiconductor integrated circuit device includes: a plurality of processors; a plurality of debug interfaces enabling debugging of the corresponding processors; a plurality of common terminals shared by the plurality of debug interfaces; a selection circuit capable of selectively connecting the plurality of debug interfaces to the common terminals; and a controller capable of controlling selecting operation in the selection circuit in accordance with a predetermined instruction. A first selector capable of selectively connecting the plurality of debug interfaces to a TRST terminal in the terminal group conformed with the JTAG specifications, and a second selector capable of selectively connecting the plurality of debug interfaces to terminals other than the TRST terminal are provided. With the configuration, even in the case where the number of processors increases, the invention can flexibly address the increase.

A bezel member ( 52 ) to which a lens ( 54 ) which transmits light from a light source ( 37 ) is supported on a main body ( 30 ) to be fixed to a vehicle body ( 11 ). A spherical surface ( 52 a) is formed on one of the main body ( 30 ) or a bezel member ( 52 ), and sliding members ( 34 ) for being pressed against the spherical surface ( 52 a) are formed on the other one of them, so that the bezel member ( 52 ) can be rotated with respect to a supporting member ( 33 ) of the main body ( 30 ) and fixed to a given position. Since a metal plate is used as the sliding members ( 34 ) in this interior illumination lamp ( 10 ), a problem such that the light source cannot be fixed to the desired direction due to abrasion or change of properties of the felt sliding member as in the related art due to the temperature or deterioration with age can be solved. Also, in comparison with the case in which the spring or the like is employed, increase in cost due to increase in the number of parts can be avoided.

When the degree of matching between patterns decreases due to a pattern fluctuation or an appearance fluctuation that has occurred during manufacturing steps, a heavy work burden would be placed on an operator. A data processing unit of a pattern matching apparatus calculates a threshold for determination of matching between a first template image and a partial region of a search target image obtained by capturing an image of the surface of a sample, on the basis of a result of evaluation of a similarity between the search target image and a second template image, the second template image having been captured in a wider range than the first template image.

The invention provides two methods for forming a silicon-on-insulator (SOI) structure provided with a stepped oxidization buried layer. The first method comprises the following steps of: providing a first region and a third region used for forming a source region and a drain region respectively, and a P-type semiconductor substrate of a second region on which a grid electrode, a grid electrode insulating layer and a hard mask layer are formed, wherein a BOX layer is arranged in the substrate, and a P-type element heavily-doped region corresponding the drain region is formed below the BOX layer; forming a side wall for covering the hard mask layer, the grid electrode and the grid electrode insulating layer; forming an N-type source region and an N-type drain region; performing oxygen ion implantation on the substrate positioned below the BOX layer corresponding to the source region and the drain region except the side wall; and performing high-temperature annealing to form an oxygen ion implantation region and the BOX layer into a stepped oxidization layer. The other method comprises the following steps of: forming an N-type doped region on the top layer of the substrate; and forming the source region and the drain layer in the doped region. Due to the adoption of the technical scheme provided by the invention, the short-channel effect of an existing SIO structure can be avoided.