38 results about "Process alignment" patented technology

The present invention discloses an alignment device for alignment between a mask and a working table of a lithography machine, and can determine a basic alignment position by one time alignment with at least four marks. Compared with the prior art, the motion process required by the alignment of the mark is further reduced, thus further reducing the time cost of the alignment and improving the working efficiency of the system. Meanwhile, the present invention has a plurality of ways for processing alignment signals, can obtain different alignment accuracy, and can combine the further optimization of two aspects of the alignment accuracy and alignment efficiency by the selection of different processing strategies for the alignment signals based on the needs of users, and the detection of image quality can be realized.

The invention provides a project process workflow system based on plan templates aiming at problems existing in workflow technology, such as ''non compilation'' and so on. The invention also provides a corresponding method. The project process workflow system realizes an improvement for existing workflow system via a method of defining the typical plan templates according to a unit task formed bypacking work and corresponding workflow engine technology. The plan templates generate a progress schedule according to each specific project process, so as to drive the workflow. The invention can modify the progress schedule in the course of processing, namely realizing process adjustment in the course of processing the process. The invention makes the project process workflow system more flexible and more preciseness via technical means such as plan template technology, unit task technology and the corresponding workflow engine technology and so on. The invention also can satisfy requirements of running in the project process.

A method, apparatus and a system, for provided for performing an automated process flow adjustment. A semiconductor wafer is processed based upon a routing plan and a predetermined schedule. A fault detection relating to the processing of the semiconductor wafer is performed. Dynamically modifying the predetermined routing plan or the predetermined schedule based upon the fault detection. A predetermined process material delivery plan is dynamically modified based upon the modifying of the routing plan or modifying of the predetermined schedule.

The invention discloses a kind of system and method to automatically measure radio-frequency identification system, the system comprises: control panel, virtual terminal and load server. The method includes: run multiple virtual terminals simultaneously according to the tested system architecture on the load server, supports a wide range of environment, automatically calculate service response time, repeat load scenes easily, verify if the application process adjustment have a favourable impact on the service performance. Test the whole structure of application system, analyze problems and gives out solutions to help optimize application performance of middleware and information networks, used for RFID-based enterprise MES, CRM, ERP systems, or public information service platform for the public to inquire information. The present invention provides an ideal means of authentication before put on line, the virtual terminal simplify the difficulties of testing, improve test efficiency, simplifies configuration process through typical scenes and typical user behavior, and achieve computer-aided decision-making through automatic analysis of test card.

The invention discloses a business flow control method, a method for requesting business processing, and corresponding devices and systems. The business flow control method comprises steps that a business processing request which is sent by a calling party and corresponds to a special business is received; through a level state machine pre-generated for the special business, a business flow of the special business is controlled; the level state machine comprises a main state machine and at least one sub state machine, the main state machine corresponds to a sub task sequence of the special business and comprises states corresponding to each sub task of the special business; the sub state machine corresponds to the sub tasks and comprises states corresponding to each operation link of the sub tasks. The method is advantaged in that the sub state machine corresponding to the sub tasks can be reused, flexibility of business flow adjustment is improved, system development and maintenance cost is reduced, and production capability and quality of a software system can be improved.

This invention relates to a kind of fiber-optic gyro based, full station instrument combination orientation mode, and applies to plotting work. In plotting scene, the invention connects fiber-optic gyro(1) with full station instrument telescope(3) by adaptor(2), and make optical fibre gyro can follow full station instrument telescope simultaneously do 180 degree turning reel full station instrument cross shaft, respectively on two horizontal positions of east and west direction of gyro axis that differ by 180 degree; each horizontal position process 2 x 2 position gyro data acquisition on full station instrument perpendicular tray that differ by 180 degree; using formula to count out full station instrument collimation axis true azimuth, survey station meridian convergence angle, then can obtain full station instrument collimation axis grid azimuth, realize full station instrument orient. The invention structure is simple, not need to process alignment error calibration, just simple operation can realize full station instrument orient on only one control point situation. The invention can be used for town, forest, and mountainous area such on distressed area's plotting work.

The invention relates to an FOG process alignment method. The FOG process alignment method includes the steps of providing a glass panel with a first alignment mark; photographing the glass panel to generate first image information, and transmitting the first image information to an image processing module; generating second image information with a second alignment mark signal, and transmitting the second image information to the image processing module, wherein the first image information and the second image information are processed through the image processing module to be transmitted to a display module; displaying the image information received from the image processing module through the display module; adjusting the position and the size of a second alignment mark through an alignment mark control module to obtain new second image information, and displaying the new second image information through the display module; placing an FPC with a third alignment mark above the glass panel; photographing the FPC to generate third image information, and displaying the third image information through the display module; adjusting the position of the FPC so that the second alignment mark can be aligned with the third alignment mark. The FOG process alignment method is high in binding accuracy and high in product yield, and the production efficiency can be improved.

A business process (BP) adaptation system (400) includes a High-Variability enriched Goal Model (HVGM) (402) that captures and refines goals of a business process (BP) while modeling alternative options where the model captures non-functional or quality attributes used in an evaluation of a performance of the BP and an estimation of how various BP alternatives affect the quality attributes. The system further includes a High-Variability workflow-level/directly Executable Model (HVEM) (404), where the system is based on goal modeling and analysis for eliciting intentions behind a BP to achieve a desired goal and the HVGM explicitly models non-functional or quality concerns. The system can further include a semi-automatic generator (604) of BP metrics based on the quality attributes specified in the HVGM and a runtime infrastructure (610) where each deployed BP instance reflects a configuration selected for that instance in a corresponding portion of the HVGM.

A laser process alignment measuring method applicable to a reel-to-reel manufacturing process including a laser process stage, wherein before at least one laser process stage, marks, patterns or surfaces (4,9) are made with printing ink on the base or carrier material of the web (2), and on which the laser beam used can make a mark (7, 10), for example, by removing or changing the printing ink, whereby at the laser process stage, another mark is plotted with the laser beam on the mark et al. printed with printing ink, and the position of the mark et al. printed with printing ink (4, 9) and the mark plotted with the laser (7, 10) are read optically to measure the alignment of the printing ink stage and the laser process stage.

A method for processing a wafer is provided in the present invention, even during halfway of cutting the wafer when the broken cutting tool is changed into new cutting tool, need to processing pre-cutting treatment, not need to discharge the wafer in the halfway, and not need to process alignment again, can highly-effective process the wafer. During the cutting halfway of wafer (W) of cutting working procedure, when changing the cutting tool into new cutting tool (33b'), leading the wafer in the cutting halfway to maintain holding on a suction cup work bench (20a), leading the false wafer (DW) to maintain on one suction cup work bench (20b) without holding the cutting halfway wafer (W), using with a cutting unit (30b) mounted with new cutting tool (33b') to execute pre-cutting for cutting the false wafer (DW).

The invention provides a method for processing alignment mark measuring signals. The method comprises the following steps of: after sampling an alignment signal, fitting the signal by a fitting model to solve the best alignment position; performing model fitting by using a result acquired by light intensity sampling and position sampling; fitting the period of the signal while fitting model parameters so as to determine the phase of the signal; and finally solving and determining the best alignment position.

The invention discloses a method for optimizing wafer exposure sequences. The method comprises the following steps: firstly, providing a to-be-exposed wafer; presetting a plurality of lens heating level values; detecting the current lens heating level value; and finally selecting an exposure path to expose the silicon wafer according to the current lens heating level value. According to the method for optimizing the wafer exposure sequences disclosed by the invention, different exposure sequences are selected according to the lens heating values; the movement of a slide holder is reduced; the lens heat effect is avoided; meanwhile, improvement of the capacity is taken into account; by virtue of the method for optimizing the wafer exposure sequence disclosed by the invention, a relatively good process alignment precision can be obtained; and the yield of a product is improved.

The invention discloses an exposure method adopting a lithography machine. The method comprises the following steps of: 101. transferring silicon wafers to a silicon wafer carrying stage; 102. opening vacuum equipment to ensure the silicon wafer carrying stage to attract the silicon wafers; and 103. aligning the silicon wafers and exposing the chips on the silicon wafers in batches, wherein the chips are exposed at intervals in the exposure path during exposure of each batch. The method provided by the invention has the following beneficial effects that: the high temperature chips can be ensured to be cooled so that deformation can not be transferred to the adjacent chips; a better process alignment progress can be obtained; and high homogeneity between silicon wafers and between batches can be realized in the continuous working process of the lithography machine.

The invention discloses an array substrate, a liquid crystal display panel and a display device. Each sub-pixel comprises two sub-sub-pixels arranged in a second direction; and a switching transistorcorresponding to each sub-pixel is arranged between the two sub-sub-pixels and connected with the two sub-sub-pixels. Every two adjacent columns of sub-pixels in a first direction are used as one unitgroup; and any two adjacent unit groups are staggered by N sub-sub-pixels in the second direction. Therefore, for the overall array substrate, every two switching transistors are distributed uniformly in the second direction in each unit group. For a black matrix, one switching transistor needs to cover the widest part, so that the pocking mark feeling can be effectively improved by being compared with the prior art. Moreover, the grid lines correspondingly connected with each switching transistor are arranged between the two sub-sub-pixels in each sub-pixel; and thus in one sub-pixel, self compensating of the capacitance difference between the pixel electrode and the grid line caused by process alignment can be realized by utilizing the two sub-sub-pixels.

The invention discloses a self-alignment process for improving the performance of a safe working area of a gate-controlled power device. Before heavily doped P-type injection is carried out, a pad structure is formed in the direction of a gate end toward an emitter contact hole, and then the pad structure is used as a barrier for heavily doped P-type injection. After heavily doped P-type injectionis carried out, the pad structure is removed. According to the invention, the width of the pad structure can be adjusted by adjusting process parameters such as deposition time of a nitride layer, gas flow rate and pressure, so as to shorten the distance between a heavily doped P-type area and a gate to within 1 micron; the performance of the safe working area of the gate-controlled power deviceis greatly improved; the pad structure is used as the barrier; self-alignment of heavily doped P-type injection can be realized without the barrier of a photoresist; the influence of the deviation ofphotolithography process alignment between the emitter contact hole and the gate on the device is fundamentally eliminated; and the process provided by the invention is simple, and is conductive to improving the performance consistency of the device.

The invention discloses a photoetching alignment method used in a manufacturing process of a semiconductor device. When a process alignment layer or a photoetching alignment mark is not clear while a base layer has a photoetching alignment mark with a concave-convex type step structure, the process alignment layer is subjected to photoetching alignment; the photoetching alignment method used in manufacturing of the semiconductor device comprises a step of forming secondary alignment marks on the process alignment layer after the process alignment layer is formed on the base layer and before the process alignment layer is subjected to photoresist uniformization. By adoption of the photoetching alignment method, the technical problem of difficulty in identifying unclear marks in exposure of many layers caused by complex structure of the semiconductor device in the manufacturing process of the existing semiconductor device can be solved; mark signals with steps and hard to identify can be optimized; and in addition, the execution steps are simple and easy to implement.

The invention discloses a wafer object table temperature control system of a lithography machine and a control method thereof. The temperature control system comprises a silicon wafer object table, a mask plate and a lithography machine light source, as well as a temperature measurement device with a temperature sensor, an element and a computing control system; a silicon wafer holding area and a temperature measurement area are arranged on the silicon wafer object table; the silicon wafer holding area is located at the front end of the temperature measurement area; the temperature measurement device with the temperature sensor is arranged in the temperature measurement area; the element is located between the lithography machine light source and the mask plate; and the temperature measurement device, the computing control system and the element are connected in series to form a temperature control loop. Through the temperature control system and the control method thereof, the temperature of a silicon wafer during exposure can be controlled, which is beneficial to prevent the deformation of the silicon wafer caused by the temperature, so that better process alignment precision can be obtained and high uniformity among silicon wafers and batches during the continuous service of the lithography machine can be realized.

A method of forming measuring targets for measuring the dimensions of a substrate during a substrate manufacturing process is provided. First, a board having a base layer and a conductive layer is provided, wherein the conductive layer is disposed on a surface of the base layer. Then, at least one through hole is formed in the board as a measuring target for measuring the dimensions of the substrate. Next, a plated via is formed in the through hole as another measuring target for measuring the dimensions of the substrate. Thereafter, a patterned dielectric layer is formed on the board to expose the plated via as a next measuring target for measuring the dimensions of the substrate. In the present invention, measuring targets are formed during a substrate manufacturing process and the dimensions of the substrate are measured instantly. The accuracy in process alignment is improved without increasing the fabrication cost.