Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

72results about "Material work function voltage" patented technology

Method and system for detecting metal contamination on a semiconductor wafer

A method to detect metal contamination on a semiconductor topography is provided. The semiconductor topography may include a semiconductor substrate or a dielectric material disposed upon a semiconductor substrate. The metal contamination may be driven into the semiconductor substrate by an annealing process. Alternatively, the annealing process may drive the metal contamination into the dielectric material. Subsequent to the annealing process, a charge may be deposited upon an upper surface of the semiconductor topography. An electrical property of the semiconductor topography may be measured. A characteristic of at least one type of metal contamination may be determined as a function of the electrical property of the semiconductor topography. The method may be used to determine a characteristic of one or more types of metal contamination on a portion of the semiconductor topography or the entire semiconductor topography. A system configured to detect metal contamination on a semiconductor topography is also provided. An oven may be incorporated into the system and may be used to anneal the semiconductor topography. The system may also include a device that may be configured to deposit a charge on an upper surface of the semiconductor topography. A sensor may also be included in the system. The sensor may use a non-contact work function technique to measure an electrical property of the semiconductor topography.
Owner:KLA TENCOR TECH CORP

Method and system for detecting metal contamination on a semiconductor wafer

A method to detect metal contamination on a semiconductor topography is provided. The semiconductor topography may include a semiconductor substrate or a dielectric material disposed upon a semiconductor substrate. The metal contamination may be driven into the semiconductor substrate by an annealing process. Alternatively, the annealing process may drive the metal contamination into the dielectric material. Subsequent to the annealing process, a charge may be deposited upon an upper surface of the semiconductor topography. An electrical property of the semiconductor topography may be measured. A characteristic of at least one type of metal contamination may be determined as a function of the electrical property of the semiconductor topography. The method may be used to determine a characteristic of one or more types of metal contamination on a portion of the semiconductor topography or the entire semiconductor topography. A system configured to detect metal contamination on a semiconductor topography is also provided. An oven may be incorporated into the system and may be used to anneal the semiconductor topography. The system may also include a device that may be configured to deposit a charge on an upper surface of the semiconductor topography. A sensor may also be included in the system. The sensor may use a non-contact work function technique to measure an electrical property of the semiconductor topography.
Owner:KLA CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products