13results about "Measurment by measuring phase" patented technology

Provided is a time to digital converter that outputs time interval digital data having multiple bits according to a time interval from a first timing to a second timing, the time to digital converter including a first circuit configured to generate lower order bits among the multiple bits, a second circuit configured to generate higher order bits among the multiple bits, and a third circuit configured to synchronize the first circuit and the second circuit by generating a second signal with use of a first signal output from the first circuit and outputting the second signal to the second circuit, in which the first signal is generated by using a signal with multiple bits among the lower order bits.

This application provides a wide-range 1PPS time difference measurement method, system, device, and medium. The method includes: acquiring a first 1PPS signal and a second 1PPS signal; conditioning and synchronizing the two 1PPS signals respectively; inputting the processed two 1PPS signals into a multi-phase sampling module for multi-phase sampling to generate an M-phase base clock sequence for phase interpolation; a high-linearity multi-phase clock interpolator, based on a phase control word, performs multi-phase weighted mixing based on a target phase interpolation clock on the M-phase base clock sequence; triggering time measurements when the first 1PPS signal and the second 1PPS signal arrive respectively, forming a first timestamp for the first 1PPS signal and a second timestamp for the second 1PPS signal respectively; and generating a time difference measurement result for the two 1PPS signals based on the difference between the first timestamp and the second timestamp. This application achieves wide dynamic range and high-precision 1PPS time difference measurement.

The invention discloses a method and system for suppressing non-pulse noise to accurately measure pulse arrival time, and the method comprises the steps: S1, generating pulsar simulation parameters which comprise a rotation period P, a flow density S1250 and a pulse arrival phase delay standard deviation sigma delta p; s2, constructing a pulsar standard contour Q (x), and generating based on a pulse contour type Ptype, a sub-pulse number and a sub-pulse contour shape; s3, simulating multi-epoch observation data, injecting noise, adding phase delay delta p, and generating an average contour q (x); s4, judging a pulse region: positioning a candidate pulse region through baseline identification, and screening a final pulse region according to a contour type; s5, calculating a phase difference delta x between the standard contour and the average contour by using a phase gradient method; and S6, comparing a difference value between the phase difference delta x and the analog phase delay delta p, and verifying whether higher timing accuracy is obtained by removing the noise in the non-pulse region or not. The pulsar timing precision is remarkably improved by reducing noise interference in a non-pulse area, and the pulsar timing method is suitable for a high-precision scientific target.

A pulse signal conversion unit (10) converts an input signal into a pulse signal having a pulse length corresponding to the magnitude of the input signal. A measurement unit (20) measures a first edge time difference between a pair of edges of the pulse signal. A division unit (28) divides the data using the first edge time difference by a second edge time difference in the cycle of a reference clock.

Provided is a time to digital converter that outputs time interval digital data having multiple bits according to a time interval from a first timing to a second timing, the time to digital converter including a first circuit configured to generate lower order bits among the multiple bits, a second circuit configured to generate higher order bits among the multiple bits, and a third circuit configured to synchronize the first circuit and the second circuit by generating a second signal with use of a first signal output from the first circuit and outputting the second signal to the second circuit, in which the first signal is generated by using a signal with multiple bits among the lower order bits.

To achieve accurate time digital conversion.SOLUTION: A time digital conversion device outputs time digital data having a plurality of bits and according to the time from first timing to second timing. The time digital conversion device comprises: a first circuit that generates lower bits of the plurality of bits; a second circuit that generates upper bits of the plurality of bits; and a third circuit that generates a second signal by using a first signal output from the first circuit and outputs the second signal to the second circuit, to synchronize the first circuit and the second circuit with each other. The first signal is generated by using signals of a plurality of bits of the lower bits.SELECTED DRAWING: Figure 5

The invention discloses a pulsar time measurement method using a multi-component template and a least square method, and the method comprises the following steps: S1, specifying a pulsar P, obtaining the average pulse contour of N times of radio observation of the pulsar P, each average pulse contour containing K data points; s2, assuming that M linearly independent pulse components exist in the pulse profile, each pulse component contains S peaks, and each peak has three parameters of position, intensity and width, and fitting to obtain a standard pulse profile of each pulse component; s3, fitting an average pulse profile obtained by observation of the pulsar by using the standard pulse profile of each pulse component to obtain a linear coefficient and a phase difference of the pulse components; and S4, calculating the pulse arrival time corresponding to the specific average pulse contour by using the phase difference. According to the invention, the effect of the least square method on the aspect of multi-parameter fitting is utilized, and the calculated amount and error of measuring the pulse arrival time by using the multi-component standard pulse profile are reduced.

The application discloses a high-precision event timing measurement system and method based on event synchronous trigger sampling, comprising an event pulse trigger synchronous clock generator, a standard time base signal generator, a system clock generator, a high-speed analog-digital conversion module, a fine timing module, a coarse timing module, a ambiguity discrimination module and an event time calculation module. According to the application, the size of the event trigger synchronous sampling clock frequency and the stability of the standard time base signal frequency can be flexibly adjusted according to the actual measurement precision requirement, so as to meet the high-precision measurement requirement of the event timing in different application scenarios.

To provide a time difference digital conversion circuit that can measure a width time of a pulse to be measured while suppressing fluctuation due to PVT variation.SOLUTION: One TDC 24 digitally converts the time difference between a pair of edges of a pulse PW to be measured using a delay time generated by an RDL. The TDC 24 measures a first edge time difference between a pair of edges of the pulse PW to be measured and a second edge time difference in a period of a reference clock SCLK in a time-division manner. A divider 28 calculates a result of dividing the first edge time difference by the second edge time difference, at least to the decimal point.SELECTED DRAWING: Figure 1

The invention discloses a double-edge quantizer and a high-resolution time measurement quantization circuit. The double-edge quantizer comprises a band-enabled NAND gate RS latch LATCH1 and a band-enabled NOR gate RS latch LATCH2, the LATCH1 and the LATCH2 are connected in parallel, rising edge phase discrimination and falling edge phase discrimination can be carried out on input periodic signals respectively, and phase discrimination results are output. Compared with a conventional NAND gate RS latch, the LATCH1 is additionally provided with a tube P3 and a tube P4, a grid electrode of the tube P3 is connected with a power supply, and a grid electrode of the tube P4 is connected with an enable signal EN; compared with a conventional NOR gate RS latch, the LATCH2 is additionally provided with an N7 tube and an N8 tube, a grid electrode of a P8 is grounded, a grid electrode of the N7 tube is connected with an inverse signal ENB of an enable signal, and the P3 tube and the N8 tube play roles in balancing and symmetry of a circuit structure; and when the EN and the ENB are enabled, Q1B and Q2B signals are respectively preset as a high level and a low level.

The invention provides a wide-range 1PPS time difference measurement method, system and device and a medium. The method comprises the steps that a first 1PPS signal and a second 1PPS signal are obtained, signal conditioning and synchronization are conducted on the two 1PPS signals respectively, the two processed 1PPS signals are input into a multi-phase sampling module for multi-phase sampling, and an M-phase basic clock sequence used for phase interpolation is generated; the high-linearity multi-phase clock interpolator executes multi-phase weighted mixing on the M-phase basic clock sequence based on a phase control word, interpolates a clock based on a target phase, triggers time measurement when a first 1PPS signal and a second 1PPS signal arrive, and forms a first timestamp of the first 1PPS signal and a second timestamp of the second 1PPS signal; and generating a time difference measurement result of the two 1PPS signals according to a difference value between the first timestamp and the second timestamp. According to the invention, wide-dynamic-range and high-precision 1PPS time difference measurement is realized.

The invention provides a time-to-digital converter, a distance measuring apparatus, a moving object, and an apparatus. A time-to-digital converter for outputting time-interval digital data having a plurality of bits corresponding to a time interval from a first timing to a second timing, the time-to-digital converter including: a first circuit configured to generate a low-order bit among the plurality of bits; a second circuit configured to generate a high-order bit of the plurality of bits; and a third circuit configured to synchronize the first circuit and the second circuit by generating a second signal using a first signal output from the first circuit and outputting the second signal to the second circuit, wherein the first signal is generated by using a signal having a plurality of bits of the low-order bits.

A measurement is made of jitter present in a jittery clock signal. A digital sinusoid generator circuit clocked by the jittery clock signal generates a pulse density modulation (PDM) signal corresponding to a sinusoid waveform. The PDM signal is converted by a sigma-delta modulator circuit to an oscillating frequency signal with an output of digital values digital values indicative of oscillating frequency signal phase. Responsive to the jittery clock signal, the digital values indicative of oscillating frequency signal phase are sampled. A digital differentiator circuit determines a digital difference between consecutive samples of the digital values indicative of oscillating frequency signal phase. The digital difference is processed by a digital signal processing circuit to generate a frequency spectrum and determine from signal-to-noise ratio a measurement of jitter in the jittery clock signal.