31results about How to "Optimize write performance" patented technology

The invention provides a split grating flash memory and a manufacture method thereof. The split gate flash memory comprises a semiconductor substrate, a gate oxide and split structure units, wherein the gate oxide is positioned on the surface of the semiconductor substrate; and the split structure units are positioned on the gate oxide. Each split structure unit is provided with a floating gate, a gate medium layer, a control gate, a first side wall layer, a second side wall layer, a third side wall layer, a word line and side walls, wherein the floating gate is positioned on the gate oxide, and the surface of the floating gate is in a cambered shape with an inclined angle; the gate medium layer is positioned on the surface of the floating gate; the control gate is positioned on the gate medium layer; the first side wall layer is positioned on the control gate; the second side wall layer is positioned on the inner side wall of the control gate; the third side wall layer is positioned in the first side wall, the second side wall layer, the gate medium layer and the inner side wall of the floating gate; the word line is positioned between two split structure units and fills a gap; and the side walls are positioned at the outside walls of the split structure units. The invention improves the performance of flash memory erasure or writing and the electric performance of the flash memory.

The invention discloses a method for realizing service callback based on a message queue and a search engine, belongs to the field of information technology service, and aims to solve the technical problem of how to ensure high performance of callback service realization and meet actual use of business requirements. According to the technical scheme, the method specifically comprises the following steps: a client initiates a service function request; the business background decides to request the server to initiate a callback service according to the business function request; the server initiates a callback service request, and request information enters a RabbitMq message queue; the request information is subjected to persistence and enters an Elasticsearch search engine; the Consumer executes a callback service according to the callback rule; and the server updates the data record according to the execution result of the callback service.

The embodiment of the invention provides a data query method and device, an index generation method and device and electronic equipment. The data query method comprises the steps that to-be-queried information used for querying multi-dimensional data is obtained, and the to-be-queried information comprises information of first multi-dimensional data to be queried; a first one-dimensional code corresponding to the first multi-dimensional data and a preset bitmap index storing a multi-dimensional data index are obtained, and the multi-dimensional data index is generated according to a second one-dimensional code corresponding to second multi-dimensional data; collecting a bitmap block file corresponding to the first one-dimensional code according to the bitmap index; According to the obtained bitmap block file, obtaining first multi-dimensional data queried by the to-be-queried information. Through the embodiment of the invention, the retrieval efficiency is higher.

The invention relates to an SRAM memory unit, a memory array and a memory. The SRAM storage unit includes: a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first pass transistor, a second pass transistor, a first double-gate PMOS transistor, and a second double-gate PMOS transistor . The invention can solve the problem that the writing operation failure of the SRAM storage unit may exist.

An overlay optimizer can prevent cross-volume moves to optimize the performance of a write filter. The overlay optimizer can be configured to detect when a file move is being attempted and can modify the handling of the file move so that a cross-volume move is not performed. In the case where the file move would result in a file being moved from the volume where the overlay cache is implemented, the overlay optimizer can create a copy of the target directory tree in the overlay cache and redirect the move to the newly created directory. In the case where the file move would result in a file being moved to the volume where the overlay cache is implemented, the overlay optimizer can forgo redirection so that the file will be moved within the same volume.

The invention discloses a method for scanning error bits. The method comprises the following steps: S1, averagely dividing a first data partition of a storage unit into N equal second data partitions; S2, forming a third data partition by using the second data partitions, scanning the third data partition and setting the permissible number of the error bits; S3, comparing the actual number of the error bits of the third data partition with the permissible number of the error bits, if the actual number of the error bits is greater than the permissible number of the error bits, executing step 4, if not, executing step 5; S4, carrying out one-time programming operation on the storage unit and returning to carry out the step S3; and S5, recording the current actual number of the error bits of the third data partition. According to the method, the qualification rate of storage chips can be adjusted through modifying the setting conditions; the corresponding data region and the error correcting capability of the own ECC (Error Correction Code) of a controller can be adjusted on the basis of final statistical results; and therefore, a better write performance is obtained.

The invention provides a split grating flash memory and a manufacture method thereof. The split gate flash memory comprises a semiconductor substrate, a gate oxide and split structure units, wherein the gate oxide is positioned on the surface of the semiconductor substrate; and the split structure units are positioned on the gate oxide. Each split structure unit is provided with a floating gate, a gate medium layer, a control gate, a first side wall layer, a second side wall layer, a third side wall layer, a word line and side walls, wherein the floating gate is positioned on the gate oxide, and the surface of the floating gate is in a cambered shape with an inclined angle; the gate medium layer is positioned on the surface of the floating gate; the control gate is positioned on the gate medium layer; the first side wall layer is positioned on the control gate; the second side wall layer is positioned on the inner side wall of the control gate; the third side wall layer is positioned in the first side wall, the second side wall layer, the gate medium layer and the inner side wall of the floating gate; the word line is positioned between two split structure units and fills a gap; and the side walls are positioned at the outside walls of the split structure units. The invention improves the performance of flash memory erasure or writing and the electric performance of the flash memory.

[Problem] To provide an actuator arm and a method for manufacturing same in which extremely few oxide particles are detached from the surface of an aluminum alloy actuator arm. [Solution] The problem is solved by an actuator arm in which protrusions due to oxide particles (30) do not exist on the surface (S) of the aluminum alloy actuator arm (1), the average diameter (D) of pits (40) comprising traces where the oxide particles (30) were removed being 1 to 5 µm. In such a case, it is preferable that the pits (40) in the range of ½ to 2 times the average diameter of the pits (40) are in a range of 10 to 100 per a measured region 20 µm square, and the reflection rate of the surface (S) of the actuator arm (1) is 10 to 40% within a range of wavelengths from 500 to 600 nm. Such an actuator arm (1) can be produced by causing the arm (1) to contact a solution containing fluoride ions after chemical polishing.

The embodiment of the invention relates to a garbage collection method and device, and the method comprises the steps: receiving a writing instruction of a software system under the condition that a solid state disk supports a writing instruction for one time; when the write instruction is a write-once instruction, writing the data into a pre-allocated first block group according to the write-once instruction; when the write instruction is a common write instruction which is not written once, writing the data into a pre-allocated second block group according to the common write instruction; and in the garbage collection process, the second block group is scanned, and the first block group is not scanned. The garbage collection efficiency can be improved, and then the write-in performance of the solid state disk is optimized.

The present invention overcomes the limitations of the existing RAID technology on the storage medium and storage space of each sub-disk, and provides a high-performance and high-reliability wide-striped disk array based on asymmetric hybrid disk mirroring and a data storage method thereof. The disk array includes at least two physical storage pools, each physical storage pool is composed of the same storage medium, the disk array contains at least two different storage media, and the disks of at least two storage media are used to form a mirror disk in a mirroring manner, A plurality of mirror disks form a wide-stripe mirror group; the disk array also includes a controller connected to each physical storage pool for controlling data writing and reading. The data is stored in at least two physical storage pools, and the data is read from the physical storage pool with a faster reading speed.

The embodiment of the invention discloses a read-write method and system for a database. The method comprises the steps of: transversely cutting record data according to a main keyword into a plurality of data segments, wherein each data segment is stored as a write copy and corresponding read copies, and the write copy is stored in form of line storage, so that the write performance of the database is optimized; the read copies are stored in form of column storage, and data in each read copy is organized in different manners, so that the read performance of the database is optimized. According to the method, an overall index and a local index are further established, so that the operating position of data to be written or to be read can be quickly positioned when data is written or read. According to the embodiment of the method or system, not only is data quickly written, but also data can be quickly read.

The invention discloses a tungsten-titanium alloy nanocrystalline floating grid structure used for a flash memory, pertaining to the technical field of micro-electronics. The structure comprises a silicon substrate as well as a silicon oxide layer, a high k (dielectric constant) thin film, a tungsten-titanium alloy nanocrystalline charge storage layer, a barrier layer and a grid material layer which are covered on the silicon oxide layer successively. The structure improves memory properties of a non-volatile memory unit of the floating grid structure, such as programming / erasing efficiency, programming / erasing (P / E) speed, effective charge memory power, data maintenance property and programming / erasing tolerance. The invention also discloses a method for manufacturing the tungsten-titanium alloy nanocrystalline floating grid structure. The method is simple and convenient and is compatible with the traditional CMOS silicon planar technology.

The present invention provides a method for writing data based on memory replacement, the realization process of which is as follows: setting up the memory structure, independently designing the part used for data reading and writing in the memory, and integrating two integrated circuits with exactly the same capacity ; Perform memory switching, the system starts in general mode when it is just started, and after running for a period of time, the system-related applications are completely loaded, and the memory management unit detects the capacity used by the stack according to the switching mode set by the system, and then according to The actual capacity plus a certain amount of redundancy sets the stack area, then detects the memory used for reading, and adds a certain amount of redundancy to set the read memory, and the remaining memory is completely mapped to the write memory to complete the memory switching process . Compared with the prior art, the method for writing data based on memory replacement can smooth the entire writing process by replacing the memory when writing files, improve the writing performance, have strong practicability, and be easy to popularize.

There is provided a tape recording apparatus system capable of improving writing performance and maintaining tape recording density, for a multiple data writing request accompanied by a lot of synchronization requests from a host. The system is a tape storage system including two or more tape drives each of which has a tape mounted thereon and is provided with a buffer divided in fixed-length segments, and connected to a host that sends multiple data and a synchronization request at a predetermined timing to these tape drives. This tape recording system is provided with: a tape drive connected to the host, receiving the multiple data sent from the host, and, when the segment of the buffer is accumulated and filled with data, writing the accumulated data onto a tape; and another tape drive connected to the tape drive, receiving the multiple data sent from the host via the tape drive, and dumping a predetermined number of data accumulated in the segments onto a tape at a timing of receiving the synchronization request.

The invention relates to an SRAM memory unit, a memory array and a memory. The SRAM storage unit includes: a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first pass transistor, a second pass transistor, a first double-gate NMOS transistor, and a second double-gate NMOS transistor . The invention can solve the problem that the writing operation failure of the SRAM storage unit may exist.

The invention relates to a SRAM memory cell, a memory array and a memory. The SRAM memory cell comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first transmission transistor, a second transmission transistor, a first dual-gate PMOS transistor, a second dual-gate PMOS transistor, a first dual-gate NMOS transistor and a second dual-gate NMOS transistor. The SRAM memory cell solves the problem that the existing SRAM memory cell has write operation failure possibility.

The invention discloses a storage system and a method for implementing the same. The storage system comprises a disc array and a storage control device, wherein the disc array comprises at least one solid-state disc and at least one non-solid-state disc; the storage control device is configured to respond to entering into a clearing mode, scanning and moving data blocks in the at least one non-solid-state disc in the disc array to form more continuous idle blocks. The storage system provided by the invention has better reading and writing performance, higher data reliability and usability and lower cost.

A system and method for a solid state drive comprising a system controller and one or more extender devices coupled to the system controller is disclosed, where each extender device is coupled to a plurality of NAND storage devices and each NAND storage device comprising a plurality of NAND flash memory cells.