43 results about "Real error" patented technology

A system and method for superimposing a sequence number of a packet into the CRC segment of the packet thereby allowing more bandwidth in the payload portion of the packet for carrying data is described. Also described is a method of acquiring additional information on the type of error in a packet, e.g., data transmission errors or sequence errors, from analyzing a CRC error. For example, a reported CRC error can be the result of the receipt of a packet with a sequence number the receiver is not expecting (which is a normal occurrence on transmission links due to transmitters resending packets that a receiver has already accepted) or can result from a real error in the transmission of a packet. A first error code check (CRC) value is calculated for the payload segment of a data packet. A second CRC value is calculated for the sequence number of the data packet. The first CRC value and the second CRC value are combined thereby creating a third CRC value. The third CRC value is then combined with the payload segment of the data packet thereby creating a data packet that can be transmitted across the link.

The invention relates to a strapdown inertial/satellite integrated navigation detecting system and a simulation testing method thereof. The system comprises a strapdown inertial subsystem, a satellite navigation subsystem, a navigation module and a control and display module, wherein the control and display module is connected with the strapdown inertial subsystem and the satellite navigation subsystem respectively to transmit track information; the strapdown inertial subsystem and the satellite navigation subsystem are respectively connected with the navigation module to transmit angular speed, accelerated speed and satellite signals; the output end of the navigation module is connected with the control and display module to feed an integrated navigation result back to the control and display module to form a closed-loop system. The system has real error characteristics. According to the system, optional tracks can be generated and do not need to be carried by actual carriers, so that the research and development cycle of an integrated navigation system is shortened, and the research and development cost is reduced; the real-time dynamic simulation on carrier movement according to a preset track can be realized and finished, and the universality is very strong.

A method, a use of the method, a system, a use of the system, a computer program code element, and a computer readable medium for automatically isolating primary faults out from a system log including actual error messages in a system controlled by an object oriented program. Messages are isolated through clustering.

A method is provided to accurately predict the probability of successfully recovering frames of (coded) information received over a wireless link, without having to decode the frame. This method, which consists of three steps, requires only limited information about the received signals and the forward error correction code and retransmission scheme being used. First, the signal to noise ratio (SNR) of each of the received signals is measured, where the average SNR is determined for multiple segments that together constitute the frame. Next, an algorithm is employed that takes these SNR values as inputs and determines the so-called effective SNR. The algorithm translates the measured SNR values using an appropriate convex metric, and subsequently combines the resulting values, thereby factoring in the effects of fading, multi-path, and other signal degradations. In the third stage, the effective SNR is used to determine the frame error rate by using a look-up table of a single reference curve that specifies the frame error rate of the actual error control code over an additive white Gaussian noise channel. This suffices to accurately predict the performance of a wide range of mobile communication channels. This method can be applied to a variety of retransmission strategies, including hybrid automatic-repeat request (ARQ) and incremental redundancy (IR) and combinations of these two strategies.

The invention discloses a flow error correction method for a time difference type ultrasonic heat meter. The flow error correction method comprises the steps of selecting three basic flow points which are respectively distributed in three regions within a full-measuring-range flow range, and setting a standard compensation correction curve within the full-measuring-range flow range under the water temperature being M DEG C and a standard compensation correction curve of different water temperatures under the full-measuring-range water temperature on the errors of the basic flow points; performing calibration correction on the flow points under the water temperature being M DEG C, and saving a non-corrected flow value, an error correction compensation coefficient and the water temperature during calibration; correcting the compensation coefficient and the water temperature according to the errors of the basic flow points during calibration, and upwards or downwards moving the two standard compensation correction curves in a subsection manner according to the region to obtain real compensation correction curves of the ultrasonic heat meter; obtaining a real error correction compensation coefficient according to the two real compensation correction curves. According to the flow error correction method, the accuracy of the full-measuring-range water temperature and the flow error within the full-measuring-range flow range can be guaranteed, and the production efficiency is improved.

The invention discloses a fault-tolerant error correction decoding method and a fault-tolerant error correction decoding device of a quantum circuit, and a chip, which relate to the technical field ofartificial intelligence and quanta. The fault-tolerant error correction decoding method comprises the following steps of: acquiring real error symptom information of a quantum circuit, wherein the real error symptom information is obtained by performing noisy error symptom measurement on the quantum circuit by adopting a quantum error correction code; decoding the real error symptom information to obtain a logic error class and perfect error symptom information corresponding to the real error symptom information; and determining error result information of the quantum circuit according to thelogic error class and the perfect error symptom information, wherein the error result information is used for indicating data quantum bits with errors in the quantum circuit and corresponding error types. According to the fault-tolerant error correction decoding method and the fault-tolerant error correction decoding device, fault-tolerant error correction decoding is equivalent to a classification problem, so that an efficient neural network classifier is suitable to be adopted for performing fault-tolerant error correction decoding on the error symptom information, the fault-tolerant errorcorrection decoding speed is increased, and real-time fault-tolerant error correction decoding can be realized.

The invention discloses an ultra-short-term wind power probability prediction method, which collects historical data of a wind farm and obtains a training sample set. According to the historical dataof the influencing factors, the input variables are generated and the sample set is obtained. Wavelet decomposition and wavelet coefficient reconstruction are used to get wavelet sample set. The parameters of each wavelet sample set are trained by the limit learning machine, the prediction model of wavelet limit learning machine is obtained, a test set is brought into the network to obtain a wavelet ultra-short-term point prediction value, the training error of each wavelet limit learning machine model and the point prediction value are stored and added and averaged, Gaussian distribution function of wavelet model training error is obtained by estimating the Gaussian distribution parameter of the real error of the model. The ultra-short-term probability prediction interval of wavelet can be obtained by the prediction value of the joint point according to the confidence requirement.

The invention relates to the technical field of software testing, in particular to a software multi-error positioning method and processing device based on particle swarm optimization. The error positioning range is reduced according to the dynamic slice; a theory and a method of a particle swarm optimization algorithm are combined; a fitness function constructed by a doubtful degree calculation formula is expanded based on the program frequency spectrum information and a program execution result, so that the optimal solution is obtained and mapped to the real error position, multiple errors in the software can be effectively recognized, the software error positioning efficiency can be remarkably improved, and therefore the problems that the current multi-error positioning effect is poor,and the efficiency is low, are solved.

The invention discloses a novel on-site power meter calibration instrument. The novel on-site power meter calibration instrument comprises a tong-type ammeter and a direct-current compensation circuit, wherein an alternating-current/direct-current detection circuit is arranged in the tong-type ammeter and used for detecting alternating current and direct current of the ammeter; the direct-current compensation circuit is used for neutralizing magnetic fluxes generated by direct-current components of the tong-type ammeter. In the calibration instrument, alternating current and direct current passing through the tong-type ammeter are detected by the alternating-current/direct-current detection circuit composed of hall elements; the calibration instrument is driven by the direct-current compensation circuit, and a reverse magnetic flux is injected into the iron core of the tong-type ammeter through compensation coils, so that the magnetic core in the tong-type ammeter cannot be saturated, real errors of a power meter can be accurately measured when the direct-current components are included in loads, the measurement accuracy of the tong-type ammeter is improved, and the actual problem of the measurement difference between an on-site customer power meter and a total measuring meter is solved.

The invention discloses a human-computer interaction system based on error cause analysis. The system comprises an exercise module, an error book module, a class monitoring module, a big data center and an error cause analysis engine. The exercise module is used for collecting first-level error cause data of students for wrong questions and storing the collected first-level error cause data to thebig data center; the error book module is used for collecting secondary error cause data of the students for the errors and storing the collected secondary error cause data to the big data center; the error cause analysis engine is used for generating predicted error cause data of the error problem according to the first-level error cause data and the second-level error cause data of the error; and the course monitoring module is used for calling the predicted error cause data of the error questions under the knowledge points and generating third-level error cause data of the error questionsunder the knowledge points. According to the invention, in the learning process of students, the real error causes of the students can be collected.

The invention discloses an error code returning method. Fixed error codes which correspond to error information in a one-to-one mode are converted into random virtual error codes at a back-end, and the virtual error codes are returned to be displayed at a front-end. The invention further discloses an error code returning device. By means of the error code returning method and device, the virtual error codes returned for the same error are not necessarily the same, a malicious user is prevented from speculating real error information through multiple times of analyses and speculation on the error codes, and safety performance of operating systems or websites is improved.

The present invention provides a method and system for quantifying a bug preventability measure of a bug prediction technique. In accordance with a disclosed embodiment, the method may include applying a weighted recursive function, on an actual bug count of each version of an application, for computing a golden bug count of the each version. Further, the method shall include deriving a set of source code parameters of the application and applying a linear regression model, on the set of source code parameters of the each version of the application in order to calculate a predicted bug count for the each version. A bug deviation ratio, which shall be indicative the bug preventability measure, can be defined as a ratio of the weighted aggregated deviation and the weighted quadratic aggregation.

The invention discloses a multi-feature fusion neural machine translation error detection method based on data enhancement training, which is used for artificially classifying and concluding real error sentences, counterfeiting a large amount of data through a data enhancement method, and enhancing the effect and robustness of a machine translation error detection model. In addition, source text and translation length ratio information and translation language model PPL score feature information are added into model input, so that the classification accuracy of the error detection model is further improved, and based on the error detection scheme, the detection result can be used for subsequent error correction and can also be used for error prompt, and translation user experience is provided; the invention can also be used for evaluation indexes of machine translation effects.

The invention belongs to the technical field of communication anti-jamming, and especially relates to an MIMO (Multiple Input Multiple Output) technology, a PSM (Precoding Aided Spatial Modulation) technology and a power allocation technology. The invention provides a power allocation method based on reducing an upper bound of the real error bit probability. The invention proposes an optimal adaptive power allocation algorithm based on convex optimization in view of the relatively poor bit error rate performance of a PSM-MIMO system when the channel condition is bad; and proposes a power allocation algorithm with low complexity and approaching the bit error rate performance of the optimal power allocation algorithm aiming at the problem that the first power allocation algorithm based on the convex optimization is higher in computational complexity.

The invention discloses a method for scanning error bits. The method comprises the following steps: S1, averagely dividing a first data partition of a storage unit into N equal second data partitions; S2, forming a third data partition by using the second data partitions, scanning the third data partition and setting the permissible number of the error bits; S3, comparing the actual number of the error bits of the third data partition with the permissible number of the error bits, if the actual number of the error bits is greater than the permissible number of the error bits, executing step 4, if not, executing step 5; S4, carrying out one-time programming operation on the storage unit and returning to carry out the step S3; and S5, recording the current actual number of the error bits of the third data partition. According to the method, the qualification rate of storage chips can be adjusted through modifying the setting conditions; the corresponding data region and the error correcting capability of the own ECC (Error Correction Code) of a controller can be adjusted on the basis of final statistical results; and therefore, a better write performance is obtained.

The invention provides a simple self-adaptive improvement method of a timing error discriminator, which is characterized by comprising the following steps of: (1) a loop convergence stage; Step (2), aloop stable tracking stage: the robustness of the loop to the signal intensity change is enhanced by utilizing simple normalization processing, and meanwhile, the direct estimation of a real error isalso obtained; And the treatment is simple, so that the method has very high feasibility in engineering practice.

The invention discloses a cloud platform chaos test method and device, and the method comprises the steps: obtaining a test result of a kth round of concurrent test of a to-be-tested cloud platform after a fault is injected into the to-be-tested cloud platform, and carrying out the statistics of an actual error rate of the kth round of concurrent test; estimating the predicted error rate of the (k + 1) th round of concurrent test by using the actual error rate of the kth round of concurrent test; judging whether the prediction error rate of the (k + 1) th round of concurrent test is greater than a preset threshold value or not; if yes, reducing the concurrent request amount; when the value is smaller than the preset threshold value, increasing the concurrent request quantity; and when the concurrence request quantity is equal to the preset threshold value, determining the concurrence request quantity of the kth round of concurrence test as the criticality of the to-be-tested cloud platform under the fault. According to the method, the concurrent request quantity of the current test is adjusted by using the historical test result, and the concurrent request quantity is adaptively adjusted after the fault is injected, so that the performance criticality of the cloud platform after the fault is injected is accurately tested, and the performance degradation condition of the cloud platform after the fault is determined.

A library of waivable images with corresponding waiver constraints is generated. Each of the waivable images is an image of a region of a reference design layout including a raw error as determined by an optical rule checks (ORC) program and does not require a correction for printability on a photoresist layer. A list of raw errors is generated by running the ORC program on a target design layout. Error region images corresponding to the list of raw errors are generated by selecting a region of the target design layout around points corresponding to the raw errors. A list of matches between the library of waivable images and the error region images is generated. By removing a subset of raw errors that correspond to a subset of the list of matches from the list of raw errors, a list of real errors is generated.

The invention discloses a method and a device for enhancing grammar error correction data based on a real error pattern. The method comprises the following steps: acquiring a to-be-noise-added statement and a noise adding strategy set; determining the noise adding probability of each word in the statement to be subjected to noise adding; randomly selecting a noise adding strategy from a noise adding strategy set according to the noise adding probability to carry out noise adding processing on the to-be-noise-added word; and constructing parallel statement pairs according to the error statements subjected to noise addition processing and the correct statements before noise addition processing. The noise adding strategy set comprises a real error pattern-based replacement strategy, a synonym replacement strategy, a function word replacement strategy, a similar spelling replacement strategy and a flexion replacement strategy. According to the embodiment of the invention, through introduction of real errors and simulation of various real errors, high-quality artificial error enhancement data which is more real and closer to real errors of learners can be generated; and various grammar errors can be manufactured through various types of noise schemes, and the method and the device can be widely applied to the technical field of data processing.

The invention discloses a physical layer transmission real error code collection device and equipment, and the device comprises an error code rate detection circuit and a data receiving and transmitting circuit connected with a physical coding sub-layer circuit PCS, and the data receiving and transmitting circuit comprises a CSR register access circuit, a data transmitting circuit, and a data receiving circuit. The CSR register access circuit is respectively connected with the data sending circuit and the data receiving circuit, the CSR register access circuit is further connected with an out-of-band access interface, and the data receiving circuit is provided with an output interface used for outputting stored data so as to detect the bit error rate of the data. According to the invention, a physical layer transmission error code can be collected and analyzed in real time when data is transmitted on a high-speed serial link; therefore, the data sent by the sender and the data receivedby the receiver can be analyzed to detect the bit error rate passing through the physical link, and the obtained distribution characteristics and rules of the bit error rate can lay a foundation forthe design of a link fault-tolerant function when the physical link cannot ensure reliable transmission.