30 results about "Program completion" patented technology

The invention provides an electronic design automation simulation system-on-chip double-rate synchronous dynamic random access memory verification method and verification system, a test device and computing equipment, the method is applied to a startup program, and the method comprises the following steps: obtaining a test case designed according to the characteristics of a double-rate synchronous dynamic random access memory needing to be verified; running a first-stage boot loader; running a second-stage boot loader, and completing initialization of the double-rate synchronous dynamic random access memory; running a third-stage boot loader, loading the test cases in sequence, and carrying out electronic design automation simulation verification; and outputting a verification result through the central processing unit to complete the characteristic verification of the double-rate synchronous dynamic random access memory. According to the technical scheme of the invention, the complexity of DDR verification can be reduced, and high-efficiency DDR verification is realized.

The invention discloses an online teaching method and system suitable for laser cutting, and relates to the technical field of laser cutting. The method comprises the following steps: S1, running a generated G code cutting file, pausing and recording a line number at a deviation position between a theoretical cutting point and an actual cutting position, selecting a preset operation mode for adjustment according to displayed data, and after adjustment is completed, covering an original file with edited data and reloading; or S2, a cutting program is input in a software editing interface, cutting parameters are set, the cutting parameters comprise the cutting speed and the process type, a cutting head is moved to a designated position to execute a cutting instruction, and by inserting related instructions and macro programs in a display list, definition and editing of all cutting contours are completed, and a G code program is generated. Through real-time deviation adjustment, a simplified operation process and a flexible adjustment mode, the precision, the adaptability and the operation convenience of the laser cutting process are improved, and the working efficiency and the cutting quality are remarkably improved.

The invention discloses an OTA security upgrading method. The method comprises the following steps: S1) dividing a storage area of an MCU into a Bootloader program starting area, an application program A area, an application program B area, a secret key A1 area and a secret key B1 area; s2) during first running, writing is completed through online burning of a Bootloader program containing a built-in secret key, and an application program and a 16-byte random number are written into an application program A area and a secret key A1 area respectively; s3), preparing a compiled Bin file; s4) carrying out OTA upgrading request by using the compiled Bin file; s5) comparing and verifying, and judging whether updating is carried out or not; s6, the working area and the idle area are alternated, and follow-up OTA upgrading starts from S3. The built-in key runs in a Bootloader program and is written in through online burning, and no leakage risk exists in the encryption process; meanwhile, the A1 area and the B1 area are set to serve as the data before encryption and the data after encryption in turn, so that iteration is performed once every time the encrypted data is upgraded, and the upgrading safety is greatly improved.

The embodiment of the invention discloses a task execution method and device, a storage medium and a program product, the method is applied to a graphics processor, and the graphics processor comprises an analyzer and an instruction processor; the method comprises the steps that a first program in a to-be-executed queue is parsed in response to a parser and issued to an instruction processor, a second program in the to-be-executed queue is parsed through the parser, and the parsed second program is issued to the instruction processor; the second program depends on the first program. According to the task execution method, the graphics processor can more efficiently process the program with the dependency relationship.

This invention provides a method and system for implementing a simulation interaction process between a PLC and an MES in the MES field. The method includes: S1: defining trigger signals and writing a business scenario signal interaction flowchart; S2: writing trigger signal scripts to implement business processing feedback logic; S3: configuring a signal generator; S4: configuring multiple workstations and specifying the line-start workstation as the entry point for the program; S5: importing the trigger script and generator configuration into the main program and starting the program; S6: debugging and verifying the PLC or MES program through process-driven execution, completing the debugging from a single workstation to the entire line of workstations. This invention achieves MES and PLC interaction process simulation through signal-triggered simulation. Whether it's the MES or PLC, process simulation is implemented during the development and design phase, correcting obvious errors in the design phase, advancing the debugging process, shortening the implementation cycle, and reducing economic costs.

The present invention discloses a method for processing pre - and post - test tasks applied to stress testing, including mounting an agent program on the server under test or the stress testing machine process; the stress testing platform sends a pre - test task script to the server under test or the stress testing machine through the gateway service to the agent program, and the agent program executes the pre - test task script; the result of the agent program executing the pre - test task script is returned to the stress testing platform, and the stress testing platform judges whether the execution result of the server under test or the stress testing machine passes according to the pre - configured settings; after the stress testing program is completed, the stress testing platform sends a post - test task script to the server under test or the stress testing machine through the gateway service to the agent program, and the agent program executes the post - test task. The present invention can judge whether the stress testing environment meets the expectations before stress testing or configure the business before stress testing, automatically clean up the garbage files and data generated during stress testing after stress testing, ensure that the accuracy of stress testing data is not affected by environmental problems, and improve the stress testing quality while improving the efficiency.

The application discloses a neural machine translation Internet of Things remote proof method for data flow attacks, which comprises an offline stage and a runtime verification stage. In the offline stage, a verifier and a prover first complete the negotiation of a symmetric key for subsequent remote proof, and at the same time, complete static plugging for a target program. A program control flow dataset is pre-constructed through fuzzy testing, a neural machine translation model is trained to establish the mapping of program input to an execution path, and a control flow graph is embedded to provide a structured prior for decoder attention. In the runtime verification stage, the verifier initiates a proof challenge to the prover, the prover provides the program input and the control flow path of the last execution, the verifier predicts a benign path from the program input by the neural machine translation model, and the difference between the benign predicted path and the actual path is used to judge the legitimacy of the prover. The application realizes accurate modeling of the program execution path, and shows effective detection capability for the abnormal path triggered by malicious input containing real vulnerabilities, and a good balance is achieved between detection coverage and running overhead.

The invention discloses a data processing method and a related device.The data processing method is applied to first equipment, and a kernel mode space of the first equipment comprises a first program containing business processing logic of data. The first device can receive to-be-processed data from the second device, and then calls the first program in the kernel mode space to execute service processing logic on the to-be-processed data. According to the embodiment of the invention, the service processing logic originally executed by the user mode program is completed through the first program in the kernel mode space, copying between the kernel mode and the user mode of the first equipment and frequent calling of a system are reduced, the expenditure of the first equipment is reduced, and the performance of the first equipment is improved.

A method of preventing unauthorized access to uninitialized memory. Registers are grouped into blocks, each of which has a corresponding validity bit. When data is written to a block of memory the validity bit is set to valid. A read function reads both the register data and the validity bit but if the validity bit is set to invalid dummy values are output. Once a program is complete, or before a fresh program the validity bits are reset to invalid.

The invention provides a BOOT upgrading method and device and a storage medium, and belongs to the technical field of computers.The BOOT upgrading method comprises the steps that a first BOOT program of a BOOT partition in a device storage is called, and an upgrading file package is downloaded to an application program partition in the device storage; wherein the upgrading file package comprises a second BOOT program and an upgrading auxiliary file; calling a first program in the upgrading auxiliary file, copying a second BOOT program stored in the application program partition to the BOOT partition to cover the first BOOT program, and completing BOOT upgrading. According to the application, the storage space of the application program partition is directly used for temporarily storing related programs and files required by BOOT upgrading, other storage spaces do not need to be additionally arranged for storing the programs and the files, and the application can be effectively suitable for BOOT upgrading under the scene that storage spaces of household storage devices, micro inverters, relays, standby power boxes and other devices are small.

Embodiments of the present application provide a server log generation method and apparatus, a nonvolatile readable storage medium, and an electronic device. The method comprises: when a target program in an operating system of a server starts to update target firmware in the server from a first version to a second version, acquiring first version information of the target firmware, and sending updating starting information to a baseboard management controller (BMC) of the server; and when the target program completes the updating of the target firmware from the first version to the second version, acquiring second version information of the target firmware, and sending updating ending information to the BMC. The present application solves the problem that a BMC cannot record version information of firmware in a log when a target program in an operating system of a server updates the firmware of the server.

This application discloses a task execution method, device, storage medium, and program product. The method is applied to a graphics processing unit (GPU), which includes a parser and an instruction processor. The method includes: in response to the parser completing the parsing of a first program in the execution queue and sending it to the instruction processor, parsing a second program in the execution queue through the parser, and sending the parsed second program to the instruction processor; the second program depends on the first program. This task execution method enables the GPU to process dependent programs more efficiently.

A static force calculation method for a prefabricated dam is characterized in that a large number of joints in the prefabricated dam are simulated based on a finite element method and a contact element method, and attributes of contact elements are superposed into an integral stiffness matrix by using a traditional finite element integration rule; the overall stiffness matrix of the prefabricated dam is ensured to be a symmetric positive definite matrix, a linear equation set is solved by using Cholesky decomposition, and the iteration convergence speed is improved by using a preprocessing conjugate gradient method, so that the calculation efficiency is ensured. C # and FORTRAN programming language writing programs are used in a mixed mode to obtain a model information file and a contact unit information file, and heavy pretreatment work of fabricated dam performance analysis is completed; writing a program to convert a calculation result file into a post-processing file; except for the calculation efficiency of the method, the whole process of the method is almost completed through a program, and the performance analysis efficiency of the prefabricated dam is greatly improved.

The application discloses a data processing method, device and equipment and a storage medium. The method comprises the following steps: acquiring log data; processing the log data by using an SQL statement executable by a Hive SQL engine; wherein the SQL statement is obtained by being customized according to the requirement of a data receiver; and responding to the data receiver based on the processing result of the log data. In this way, different SQL statements are customized according to different requirements of the data receiver, different MapReduce programs are obtained by analyzing the different SQL statements by using the Hive SQL engine, and different processing of the log data is completed by executing the different MapReduce programs. Compared with the prior art of directly developing corresponding MapReduce programs according to different processing requirements, the technical scheme of the application reduces the development cost.

1. The name of the design product: graphical user interface for baking program setting of electronic equipment. 2. The use of the design product: an electronic device. 3. The design points of the design product: in the front view. 4. The picture or photo that best indicates the design points: front view. 5. The design claimed contains color. 6. The use of the graphical user interface: the graphical user interface is used to display the automatic program completion interface of the baking equipment, prompt the user that the current automatic cooking has ended, and show the completion status, time-consuming information and subsequent operation options. 7. The human-computer interaction mode of the graphical user interface: the front view is an automatic completion interface, and the user starts and pauses the completed editing baking program by touching the start button and the pause button in the interface.

The embodiment of the application belongs to the field of artificial intelligence, is applied to the field of cross-platform interaction, and relates to a cross-platform task execution method and device, computer equipment and a storage medium, which comprises the following steps: acquiring a system image of a first platform and caching the system image into a Docker engine; acquiring machine resources of a second platform, deploying the Docker engine, and mounting a preset NAS mounting volume into the deployed Docker engine; acquiring a pre-created AI processing task through the Docker engine, taking the system image as an execution program, taking the machine resources as a configuration program, and completing AI processing system construction; calling the constructed AI processing system to run the AI processing task, acquiring a task execution result, and storing the task execution result in the NAS mounting volume. The application realizes cross-platform task execution in a state where business logic and configuration resources are highly separated across platforms through a NAS mounting volume and a Docker engine, and avoids excessive coupling among multiple platforms.

Embodiments of the present application relate to the technical field of electronic devices, and disclose an application program presentation method, an electronic device, and an external device. The method comprises: in response to a launching operation received by a collaborative application program, controlling the collaborative application program to send an application list request to an external device; controlling the collaborative application program to present a desktop editing window; in response to an editing operation inputted for a candidate application program in the desktop editing window, generating target application information; and controlling the collaborative application program to transmit the target application information to a desktop launcher, so that the desktop launcher presents a target application program. On the basis of the collaborative application program, the present embodiment can complete the task of presenting an application program across systems, and this manner is simple and rapid without manual back-and-forth switching between multiple systems. Secondly, the collaborative application program provided by the present embodiment actively requests the application information of the application program from a second operating system, and a first operating system does not need to work in a monitoring state all the time, so that the computing power resources can be saved.

The application discloses a PWM signal generation method based on GPIO and a timer, which comprises a main program, an interrupt service function program and a PWM generation subprogram.The main program completes initialization of various parameters according to user setting values, calls the PWM generation subprogram to complete PWM generation and to stop and judge signals.The interrupt service function program periodically enters a timer interrupt to complete an increment counting function according to an initialized unit clock value, and calls the PWM generation subprogram to generate each PWM signal.The PWM generation subprogram makes logical judgment according to various parameter values, sets corresponding GPIO to high or low, completes a PWM generation function, and simultaneously calls a closed-loop control algorithm to obtain various parameter values of the next period when a condition is met.The application can realize duty ratio, phase-shifting angle and frequency adjustment of the PWM by controlling a PWM generation logic timing sequence in a software programming mode, and can realize mixed regulation and control in multiple modes.

The invention belongs to the technical field of integrated circuit testing, and particularly relates to a field programmable gate array (FPGA) daughter board programmer based on SelectMap. The method is applied to a software and hardware cooperation digital IC test platform based on the FPGA, and rapid programming and reconfiguration of the daughter board FPGA are achieved through the SelectMap configuration interface. The programmer adopts a parallel data transmission mechanism, supports high-speed bit stream loading, and controls programming processes including idle, reset activation, programming neutralization, programming completion and other states through a state machine. The programmer integrates a cross-clock domain processing mechanism, is compatible with different clock frequencies, and has automatic error monitoring and state feedback functions. The problems of low efficiency and poor flexibility of sub-plate programming in a traditional test platform are solved, the configuration speed and reliability of the test platform are remarkably improved, and the method is suitable for verification and test scenes of large-scale digital ICs.

The invention relates to a rollback program upgrading method for programming in an application, which relates to the technical field of program upgrading, and comprises the following steps: splitting a preset storage area into a mark area and a detection area, setting an invalid mark bit for the mark area, and setting an effective mark bit for the detection area; a preset operation module is controlled to select and operate according to the effective mark bit, and trigger information is collected; when the trigger information is consistent with the preset reference information, erasing the partition corresponding to the invalid flag bit; transmission information is obtained through the triggering information and the marking area; and performing program input verification based on the transmission information and the invalid flag bit, and setting an effective flag bit for the flag area and an invalid flag bit for the detection area after the program is input and trial operation is passed. The method and the device have the effect of improving the usability of equipment operation during program upgrading.

The present invention relates to a method, device, medium and product for automatic compensation of right-angle head indexing. The method includes the following steps: obtaining a target angle value, determining whether the target angle value is an integer multiple of the preset indexing of the right-angle head, and if so, jumping to angle deviation compensation; angle deviation compensation, performing target angle compensation according to the current angle, target angle value and compensation value of the right-angle head; position deviation compensation, obtaining the position deviation value of the current angle and the position deviation value of the target angle value, and performing target position compensation according to the position deviation value of the current angle and the position deviation value of the target angle value. When the user performs indexing, he only needs to give the target angle, and the program automatically executes the indexing program to complete the right-angle head indexing; during the execution of the indexing program, the angle deviation compensation program and the position deviation compensation program are automatically called, without the user having to significantly change the processing program, the operation is simple, and the processing efficiency and processing accuracy are improved.

Presetting the memory protection key in dedicated memory is disclosed, including assigning, by a memory manager to a program, based on configuration information, one or more units of dedicated memory from a pool of dedicated memory, wherein the one or more units of dedicated memory is reserved for the program until program completion; and setting, by the memory manager based on the configuration information, a memory protection key for each frame in the one or more units of dedicated memory assigned to the program.

The embodiment of the invention relates to the technical field of electronic equipment, and discloses an application presentation method, electronic equipment and external equipment. The method comprises the steps of responding to a starting operation received by a collaborative application program, controlling the collaborative application program to send an application list request to external equipment, controlling the collaborative application program to present a desktop editing window, responding to an editing operation input to a candidate application program in the desktop editing window, generating target application information, and sending the target application information to the external equipment. And controlling the cooperative application program to transmit the target application information to the launcher, so that the launcher presents the target application program. According to the embodiment, the task of presenting the application programs in a cross-system mode can be completed based on the collaborative application programs, the mode is simple and rapid, and manual switching among multiple operation systems is not needed. And secondly, the collaborative application program provided by the embodiment actively asks for the application information of the application program from the second operating system, and the first operating system does not need to work in a monitoring state all the time, so that the computing power resource can be saved.

The invention provides a deep penetration particle transport parallel computing method, system and device and a storage medium, and relates to the technical field of nuclear radiation protection, and the method comprises the steps: completing a serial task through an MCNP program; a CPU / GPU collaborative algorithm based on MPI is called through an MCNP program, a simulation task is divided and mapped to a plurality of independent calculation units, and each independent calculation unit tracks the motion trail of each distributed particle and records key physical quantities; the recorded key physical quantity is reduced, and a final calculation result is output through an MCNP program. According to the technical scheme, after some necessary serial tasks are completed through an MCNP program, simulation tasks are divided according to the actual computing power and number of CPUs and GPUs on the basis of a CPU / GPU collaborative algorithm of MPI, and therefore parallel processing is conducted on subsequent computing tasks. According to the data processing mode, the calculation time cost can be reduced while the deep penetration shielding calculation precision is improved, and the calculation efficiency can be improved.

The present application relates to a kind of methods of resisting single event upset in FPGA program online upgrading process, belong to online upgrading field.The method of the present application includes: starting online upgrading: MCU receives online upgrading instruction, starts online upgrading program;The lower half area of FPGA external program memory is set as upgrade partition;FPGA loads partition as upper half area;Upgrade lower half area program;After lower half area program upgrading is completed, switch upgrade and load partition;The upper half area of FPGA external program memory is set as upgrade partition;FPGA default load partition changes to lower half area;Upgrade upper half area program;Complete online upgrading.The present application is stored redundantly to FPGA program and is upgraded by partition, cooperate with the flexible switching strategy of hardware dial switch, MCU, hardware two alternative circuit composition, so that upgrade area and load area are separated, completely eliminate the problem that FPGA cannot normally work due to incomplete update during FPGA program online upgrading process.

The invention provides a method of preventing unauthorized access to uninitialised memory. Registers are grouped into blocks, each of which has a corresponding validity bit. When data is written to a block of memory the validity bit is set to valid. A read function reads both the register data and the validity bit but if the validity bit is set to invalid dummy values are output. Once a program is complete, or before a fresh program the validity bits are reset to invalid.

The invention belongs to the technical field of aviation electromechanical communication, and relates to a rapid CAN port upgrading method for MPC5554 under the condition that a hardware watchdog is started. The problems that no BootLoader software configuration item exists, and a program cannot be upgraded under the condition that a hardware watchdog is additionally installed are ingeniously solved. The method comprises a set of general upper computer based on a BAM upgrading protocol, a set of minimum upgrading program CKFA and a set of full-function upgrading program LOAD. The method comprises the steps that firstly, upgrading of a minimum upgrading program CKFA is completed through a BAM program of the MPC5554, and it is ensured that upgrading work is completed before a watchdog is reset; then, a running CKFA program is utilized to complete upgrading of a formal LOAD program; and finally, finishing the upgrading of the APP program by using the running LOAD program. Through the cooperative design of software and hardware, the method for upgrading the MPC5554 based on the CAN protocol is realized, and the technical scheme is good in stability and has relatively high application and popularization values.

The present invention provides a method for effectively solving the problem of insufficient available memory in the process space of 32-bit programs, including the following steps: analyzing the source code of the main program, splitting the functional modules to obtain multiple sub-functional modules; developing a new program adapted to the sub-functional modules, adding a custom message processing function to the sub-programs of the sub-functional modules, unifying the scheduling interfaces of the sub-functional modules, and completing the program encapsulation of the sub-functional modules; creating a shared memory area, and within the shared memory area, fusing the windows of the main program and the sub-programs to obtain a unified interface; performing data interaction between windows and program function scheduling, and developing a fusion program to complete cross-process communication of window messages; wherein, socket technology is introduced for network communication between programs. The present invention can reduce memory occupancy, provide a set of application programs with complete functions, operability, and a complete, continuous, and unified human-computer interaction interface for users, and greatly optimize the user experience.

The invention relates to the technical field of chip simulation verification, in particular to an interrupt processing method for CPU simulation. Compared with the prior art, the method has the advantages that an interrupt identifier is newly added in a target program, and a firmware program actively acquires and sets an interrupt signal, so that global variable address conflicts caused by asynchronous execution of the program are effectively avoided; according to the interrupt identifier and the interrupt signal, a mechanism that the interrupt program is executed immediately and the main program waits for the completion of the interrupt program can be realized, two programs are prevented from operating a register at the same time, the atomicity of configuration logic is ensured, concurrent conflicts and sequential logic conforming to interrupt response priority are avoided, and the reliability of simulation is improved.

A system including a memory device and an operatively coupled processing device to perform operations including: responsive to detecting a power-up event, performing a first read strobe on a first set of a plurality of memory cells addressable by a first wordline, determining a value of a conductivity metric reflecting conductive states of one or more bitlines connected to the first set of the plurality of memory cells, determining, based on the value of the conductivity metric, a read level offset value for a second wordline, wherein the second wordline is adjacent to the first wordline, performing, using the read level offset value, a second read strobe on the second wordline, and responsive to determining that a value of a quality metric produced by the second read strobe satisfies a quality criterion, indicating that a programming operation performed on the second wordline was completed before a power off event.