11 results about "Program completion" patented technology

The application discloses a neural machine translation Internet of Things remote proof method for data flow attacks, which comprises an offline stage and a runtime verification stage. In the offline stage, a verifier and a prover first complete the negotiation of a symmetric key for subsequent remote proof, and at the same time, complete static plugging for a target program. A program control flow dataset is pre-constructed through fuzzy testing, a neural machine translation model is trained to establish the mapping of program input to an execution path, and a control flow graph is embedded to provide a structured prior for decoder attention. In the runtime verification stage, the verifier initiates a proof challenge to the prover, the prover provides the program input and the control flow path of the last execution, the verifier predicts a benign path from the program input by the neural machine translation model, and the difference between the benign predicted path and the actual path is used to judge the legitimacy of the prover. The application realizes accurate modeling of the program execution path, and shows effective detection capability for the abnormal path triggered by malicious input containing real vulnerabilities, and a good balance is achieved between detection coverage and running overhead.

The invention provides a BOOT upgrading method and device and a storage medium, and belongs to the technical field of computers.The BOOT upgrading method comprises the steps that a first BOOT program of a BOOT partition in a device storage is called, and an upgrading file package is downloaded to an application program partition in the device storage; wherein the upgrading file package comprises a second BOOT program and an upgrading auxiliary file; calling a first program in the upgrading auxiliary file, copying a second BOOT program stored in the application program partition to the BOOT partition to cover the first BOOT program, and completing BOOT upgrading. According to the application, the storage space of the application program partition is directly used for temporarily storing related programs and files required by BOOT upgrading, other storage spaces do not need to be additionally arranged for storing the programs and the files, and the application can be effectively suitable for BOOT upgrading under the scene that storage spaces of household storage devices, micro inverters, relays, standby power boxes and other devices are small.

The application discloses a data processing method, device and equipment and a storage medium. The method comprises the following steps: acquiring log data; processing the log data by using an SQL statement executable by a Hive SQL engine; wherein the SQL statement is obtained by being customized according to the requirement of a data receiver; and responding to the data receiver based on the processing result of the log data. In this way, different SQL statements are customized according to different requirements of the data receiver, different MapReduce programs are obtained by analyzing the different SQL statements by using the Hive SQL engine, and different processing of the log data is completed by executing the different MapReduce programs. Compared with the prior art of directly developing corresponding MapReduce programs according to different processing requirements, the technical scheme of the application reduces the development cost.

1. The name of the design product: graphical user interface for baking program setting of electronic equipment. 2. The use of the design product: an electronic device. 3. The design points of the design product: in the front view. 4. The picture or photo that best indicates the design points: front view. 5. The design claimed contains color. 6. The use of the graphical user interface: the graphical user interface is used to display the automatic program completion interface of the baking equipment, prompt the user that the current automatic cooking has ended, and show the completion status, time-consuming information and subsequent operation options. 7. The human-computer interaction mode of the graphical user interface: the front view is an automatic completion interface, and the user starts and pauses the completed editing baking program by touching the start button and the pause button in the interface.

The embodiment of the application belongs to the field of artificial intelligence, is applied to the field of cross-platform interaction, and relates to a cross-platform task execution method and device, computer equipment and a storage medium, which comprises the following steps: acquiring a system image of a first platform and caching the system image into a Docker engine; acquiring machine resources of a second platform, deploying the Docker engine, and mounting a preset NAS mounting volume into the deployed Docker engine; acquiring a pre-created AI processing task through the Docker engine, taking the system image as an execution program, taking the machine resources as a configuration program, and completing AI processing system construction; calling the constructed AI processing system to run the AI processing task, acquiring a task execution result, and storing the task execution result in the NAS mounting volume. The application realizes cross-platform task execution in a state where business logic and configuration resources are highly separated across platforms through a NAS mounting volume and a Docker engine, and avoids excessive coupling among multiple platforms.

The application discloses a PWM signal generation method based on GPIO and a timer, which comprises a main program, an interrupt service function program and a PWM generation subprogram.The main program completes initialization of various parameters according to user setting values, calls the PWM generation subprogram to complete PWM generation and to stop and judge signals.The interrupt service function program periodically enters a timer interrupt to complete an increment counting function according to an initialized unit clock value, and calls the PWM generation subprogram to generate each PWM signal.The PWM generation subprogram makes logical judgment according to various parameter values, sets corresponding GPIO to high or low, completes a PWM generation function, and simultaneously calls a closed-loop control algorithm to obtain various parameter values of the next period when a condition is met.The application can realize duty ratio, phase-shifting angle and frequency adjustment of the PWM by controlling a PWM generation logic timing sequence in a software programming mode, and can realize mixed regulation and control in multiple modes.

The invention belongs to the technical field of integrated circuit testing, and particularly relates to a field programmable gate array (FPGA) daughter board programmer based on SelectMap. The method is applied to a software and hardware cooperation digital IC test platform based on the FPGA, and rapid programming and reconfiguration of the daughter board FPGA are achieved through the SelectMap configuration interface. The programmer adopts a parallel data transmission mechanism, supports high-speed bit stream loading, and controls programming processes including idle, reset activation, programming neutralization, programming completion and other states through a state machine. The programmer integrates a cross-clock domain processing mechanism, is compatible with different clock frequencies, and has automatic error monitoring and state feedback functions. The problems of low efficiency and poor flexibility of sub-plate programming in a traditional test platform are solved, the configuration speed and reliability of the test platform are remarkably improved, and the method is suitable for verification and test scenes of large-scale digital ICs.

The embodiment of the invention relates to the technical field of electronic equipment, and discloses an application presentation method, electronic equipment and external equipment. The method comprises the steps of responding to a starting operation received by a collaborative application program, controlling the collaborative application program to send an application list request to external equipment, controlling the collaborative application program to present a desktop editing window, responding to an editing operation input to a candidate application program in the desktop editing window, generating target application information, and sending the target application information to the external equipment. And controlling the cooperative application program to transmit the target application information to the launcher, so that the launcher presents the target application program. According to the embodiment, the task of presenting the application programs in a cross-system mode can be completed based on the collaborative application programs, the mode is simple and rapid, and manual switching among multiple operation systems is not needed. And secondly, the collaborative application program provided by the embodiment actively asks for the application information of the application program from the second operating system, and the first operating system does not need to work in a monitoring state all the time, so that the computing power resource can be saved.

The present application relates to a kind of methods of resisting single event upset in FPGA program online upgrading process, belong to online upgrading field.The method of the present application includes: starting online upgrading: MCU receives online upgrading instruction, starts online upgrading program;The lower half area of FPGA external program memory is set as upgrade partition;FPGA loads partition as upper half area;Upgrade lower half area program;After lower half area program upgrading is completed, switch upgrade and load partition;The upper half area of FPGA external program memory is set as upgrade partition;FPGA default load partition changes to lower half area;Upgrade upper half area program;Complete online upgrading.The present application is stored redundantly to FPGA program and is upgraded by partition, cooperate with the flexible switching strategy of hardware dial switch, MCU, hardware two alternative circuit composition, so that upgrade area and load area are separated, completely eliminate the problem that FPGA cannot normally work due to incomplete update during FPGA program online upgrading process.

The invention belongs to the technical field of aviation electromechanical communication, and relates to a rapid CAN port upgrading method for MPC5554 under the condition that a hardware watchdog is started. The problems that no BootLoader software configuration item exists, and a program cannot be upgraded under the condition that a hardware watchdog is additionally installed are ingeniously solved. The method comprises a set of general upper computer based on a BAM upgrading protocol, a set of minimum upgrading program CKFA and a set of full-function upgrading program LOAD. The method comprises the steps that firstly, upgrading of a minimum upgrading program CKFA is completed through a BAM program of the MPC5554, and it is ensured that upgrading work is completed before a watchdog is reset; then, a running CKFA program is utilized to complete upgrading of a formal LOAD program; and finally, finishing the upgrading of the APP program by using the running LOAD program. Through the cooperative design of software and hardware, the method for upgrading the MPC5554 based on the CAN protocol is realized, and the technical scheme is good in stability and has relatively high application and popularization values.

The invention relates to the technical field of chip simulation verification, in particular to an interrupt processing method for CPU simulation. Compared with the prior art, the method has the advantages that an interrupt identifier is newly added in a target program, and a firmware program actively acquires and sets an interrupt signal, so that global variable address conflicts caused by asynchronous execution of the program are effectively avoided; according to the interrupt identifier and the interrupt signal, a mechanism that the interrupt program is executed immediately and the main program waits for the completion of the interrupt program can be realized, two programs are prevented from operating a register at the same time, the atomicity of configuration logic is ensured, concurrent conflicts and sequential logic conforming to interrupt response priority are avoided, and the reliability of simulation is improved.