34results about How to "Improve impedance continuity" patented technology

A signal transmission structure for connecting a coaxial cable connector is provided. The coaxial cable connector has a signal pin. The signal transmission structure includes a reference plane and a conductive layer, and the conductive layer is located on one side of the reference plane. Moreover, the conductive layer includes a signal perforated pad, a first line segment, a second line segment, and a compensation pad. The signal pin is suitable for threading the signal perforated pad. The first line segment is connected to the signal perforated pad, and the compensation pad is connected between the first line segment and the second line segment.

The invention proposes a connector (400) for surface mounting to a circuit substrate, the connector comprises an insulator (420), a center conductor (410) centrically mounted to the insulator and a shielding shell (430) externally mounted on the insulator, the shielding shell comprises a first portion for connecting the shielding shell with a connector and a second portion for surface mounting the connector to the circuit substrate, the second portion includes a body (432) and a plurality of solder legs (431) formed on the body, wherein the body comprises a shielding portion (434) surrounding an extending portion of the center conductor and at least one opening (433) configured to communicate inner space between the center conductor and the shielding portion with outside space of the connector when the RF connector is soldered to the circuit substrate.

The invention discloses an optical module and a welding method thereof. The optical module comprises a PCB, an optoelectronic component and a flexible circuit board which is connected with the PCB andthe optoelectronic component; wherein the optoelectronic component comprises a light emitting assembly, the light emitting assembly comprises a matching surface which is connected with the flexible circuit board in a matched mode, and an electric connecting part is arranged on the matching surface; the flexible circuit board comprises a bonding pad region which is adapted to the matching surface,the bonding pad region is provided with a grounding bonding pad used for being connected with the electrical connection portion, and a conductive region electrically connected with the grounding bonding pad, the conductive region is arranged on the side, opposite to the matching surface, of the flexible circuit board and is electrically fixed on the matching surface. According to the method, theconductive region is arranged on the flexible circuit board which is connected with the light emitting assembly in the optoelectronic component, so that comprehensive welding can be achieved between the flexible circuit board and the matching surface of the emitting light assembly, so that the backflow path of the high-speed signal is improved, the impedance continuity of the high-speed line is optimized, and the performance of the transmitting end eye diagram of the optical module is improved.

The invention discloses an ultra wide band quaternary array antenna apparatus used for a through-wall imaging radar. The antenna apparatus comprises a medium unit, an antenna unit, a parallel double-line feed unit, a reflection cavity and a connector. The antenna unit is printed on the bottom surface of the medium unit. The antenna unit is composed of a plurality of water-drop-shaped antenna arms. The parallel double-line feed unit comprises a first parallel double-line and a second parallel double-line which are X-shaped and which are respectively arranged on the upper surface and the lower surface of the medium unit. Terminals, approaching the antenna arms, of the parallel double-line separate according to index gradual changes, and are respectively connected with the corresponding antenna arms. A central point of the two parallel double-lines are connected with the connector through upper and lower end bonding pads. The reflection cavity is fixed with the edge of the medium unit and covers the antenna unit. One end of the connector is connected with the parallel double-line feed unit. The other end penetrates outside the refection cavity via a through hole in the middle of the reflection cavity and is fixed on the reflection cavity. The antenna apparatus of the present invention can be directly connected with a transmit-receive module through the connector, and the antenna apparatus has relatively good orientated radiation capability and broadband characteristics.

Wire bonds connect current-carrying edges of high-frequency planar conductors to other electrical devices. In one embodiment, planar transmission lines are interconnected using two wire bonds. One bond wire extends from an edge of a first center conductor to a corresponding edge of a second center conductor, and a second bond wire extends from the other edge of the first center conductor to the other edge of the second center conductor. Embodiments include center conductors at different heights and having different widths, and different electrical devices, such as semiconductor integrated circuits. In a particular embodiment, ball bonding is used. In some embodiments, a tack bond is included after a ball bond to allow closer attachment of the bond wire to the edge of the conductor.

The invention discloses an impedance optimization method of a circuit board via hole. The impedance optimization method comprises the steps: designing wiring on a circuit board according to a circuitboard design requirement; determining a target wire with via hole design according to the routing path of the wire; and carrying out size increase processing on the anti-bonding pads at the via holesin the GND layers adjacent to the input signal layer and the output signal layer of the target wire so as to enable the impedance at the via holes of the target wire to meet the impedance requirementof the wire. Therefore, the impedance continuity at the via hole is optimized by changing the shape of the anti-bonding pad at the wiring via hole, so the integrity requirement of a transmission signal is met under the condition that the process cost is not increased; moreover, the shapes of the anti-pads at the via holes in the GND layers adjacent to the input signal layer and the output signal layer of the wire are changed, so the impedance of the wire is not influenced while the impedance at the via holes is optimized. The invention also discloses a circuit board which has the same beneficial effects as the impedance optimization method.

The invention discloses a method for optimizing the impedance continuity of a PCB high-speed link. The PCB high-speed link comprises a main board and a receiving card, which are connected through a connector. The main board comprises a transmitting end and a capacitor, and the receiving card comprises a receiving end. The method comprises the following steps of adjusting the position of the capacitor, and performing time-domain reflectometer simulation according to different positions of the capacitor; comparing the high-speed link impedance and loss feature of the PCB under different positions of the specific capacitance; according to the comparing result, the optimal position of the capacitor can be determined. The invention is advantageous in that the time domain reflectometer result ofthe simulation link is conducted through changing the capacitance placement position, the capacitance placement position is optimized, so that the overall impedance continuity of the link is best, and the signal transmission quality is improved.

The invention provides a layer-changing wiring method and device and an integrated circuit system. According to the method, the position of each PIN in a BGA chip is determined on a PCB; a layer-changing threshold is set; a VIA hole corresponding to each PIN is formed in the PCB within the layer-changing threshold range; the VIA holes corresponding to the PINs are adjacent; PIN pairs are determined; symmetrical GND VIAs are arranged for VIA hole pairs corresponding to the PIN pairs; a corresponding signal line is led out for each PIN in the PIN pairs; and the signal line corresponding to each PIN is subjected to layer-changing wiring through the VIA holes in the corresponding VIA hole pair. By the layer-changing wiring method and device, the impedance continuity of line signals in the VIA hole positions is effectively improved.

The invention relates to an asymmetric through hole printed circuit board. The asymmetric through hole printed circuit board comprises a base layer, wherein the base layer is provided with a difference signal wire, an anti-pad and grounding through holes, the anti-pad is provided with three signal through holes, the three signal through holes are respectively provided with a transmission signal wire, end portions of the transmission signal wires are provided with connection pads, one end of the difference signal wire is bifurcated to form three opposite reception signal wires, end portions of the reception signal wires are provided with the connection pads, the grounding through holes are arranged between the adjacent transmission signal wires, and only two of the signal through holes are communicated with the difference signal wires through welding of the connection pads. The asymmetric through hole printed circuit board is advantaged in that good impedance continuity is realized, interference reduction is realized, and adjustment on signal through hole connection modes can be realized according to field demands.

The invention provides a printed circuit board which comprises a multilayer of conducting layers and a plurality of connecting structures which are spaced insulatively; each of the connecting structures penetrates through the conducting layers; the connecting structures are respectively connected with a first signal line and a second signal line located in two layers of the conducting layers; except for the conducting layers where the first signal line and the second signal line are located, the remaining conducting layers are provided with anti-bonding pads surrounding the connection structures; for the same connection structure, multiple anti-bonding pads, surrounding the connection structure, comprise adjacent anti-bonding pads and non-adjacent anti-bonding pads; the adjacent anti-bonding pads are the anti-bonding pads adjacent to the layer where any one of the first signal line and the second signal line is located; the non-adjacent anti-bonding pads are the anti-bonding pads having other conducting layers between the layer where any one of the first signal line and the second signal line is located; and the size of the adjacent anti-bonding pads is smaller than the size of thenon-adjacent anti-bonding pads in any direction parallel to the conducting layers. The invention further provides a display device. The printed circuit board and the display device are capable of improving the impedance continuity in a driving circuit board.

The invention provides a method for optimizing via hole anti-pad wiring, a circuit board, equipment and a storage medium. The method comprises the following steps: aiming at via hole anti-bonding pads with different sizes, performing traversal by taking a first numerical value of a first distance as an initial value and a second numerical value as a step length, and determining the corresponding first distance when the via hole impedance is minimum, wherein the first distance is the linear distance between the coupling position of the differential line in the via hole anti-bonding pad and the middle of the differential signal hole; when the routing mode in the anti-pad area is optimized, carrying out the back drilling on the signal holes in the anti-pad area. Based on the method, the invention further provides a printed circuit board, via hole anti-pad routing optimization equipment of the printed circuit board and a storage medium. According to the invention, the impedance characteristic of the via hole needs to be concerned when the high-speed link is designed, and when the impedance of the via hole is optimized, besides changing the size of the anti-pad, the wiring mode in the anti-pad area can be optimized, so that the impedance of the via hole is further optimized, the impedance continuity of the link is improved, and the signal transmission quality is improved.

A testing assembly for an electrical test of an electronic package is provided. The testing assembly includes a testing circuit board and a testing socket mounted thereon. The testing socket includes an insulating body and a plurality of pins. The insulating body has a holding surface for supporting a contact surface of the electronic package, and at least one low-dielectric constant region located between two neighboring pins, and the dielectric constant of the low-electric constant region is lower than other regions of the insulating body. In addition, the pins passing through the insulating body are configured as the electric channels between a plurality of contacts on the contact surface and a plurality of testing pads on a conductive layer on a surface of the testing circuit board. Furthermore, the pins include a signal pin, and one end of the signal pin is electrically coupled to the signal testing pad.

A signal transmission structure for connecting a coaxial cable connector is provided. The coaxial cable connector has a signal pin. The signal transmission structure includes a reference plane and a conductive layer, and the conductive layer is located on one side of the reference plane. Moreover, the conductive layer includes a signal perforated pad, a first line segment, a second line segment, and a compensation pad. The signal pin is suitable for threading the signal perforated pad. The first line segment is connected to the signal perforated pad, and the compensation pad is connected between the first line segment and the second line segment.

The invention relates to a manufacturing method for a printed circuit board and the printed circuit board. The manufacturing method comprises the following steps: respectively drilling a first sub-board and a second sub-board; respectively drilling the first sub-board and the second sub-board; carrying out the electroplating of the holes drilled in the sub-board and the second sub-board to obtainelectroplated holes; performing the back drilling of short columns generated by electroplating of the holes in the first sub-board and the second sub-board, and obtaining back holes; and carrying outthe stitching of the first sub-board and the second sub-plate to form a mother board. The printed circuit board is fabricated using the method as described above. Through the above-mentioned manufacturing method, the hole depth of a back drilling hole of a PCB product with the thickness of 10 mm or less can be controlled to be 8 mil, which greatly improves the impedance continuity of the via holeand improves the transmission loss of the via hole. Moreover, the method has a simple process flow and is compatible with a conventional PCB process.

A high-speed original cable electrical integrity test fixture comprises a lower shell, a PCB, an upper shell, an original cable, a pair of connectors, a pressing block and a rotating arm, wherein a top of the lower shell is provided with a plate groove; the PCB is connected into the plate groove, and a pair of signal lines extending from one end of the PCB to the other end of the PCB is arrangedon the PCB; the upper shell is connected to the top of the lower shell, and a pressing block groove is arranged in the upper shell; the original cable is connected to one end of the PCB, the originalcable includes a pair of wire ends, and each conductive end is electrically connected to one signal line; the pair of connectors is connected to the other end of the PCB, and each connector is electrically connected to one signal line; one end of the pressing block is rotatably connected into the pressing block groove, and the other end of the pressing block is used for pressing the pair of wire ends; and the rotating arm is rotatably connected to the top of the upper shell and is used for pressing the pressing block so as to press the pair of wire ends. The high-speed original cable electrical integrity test fixture provided by the invention is good in impedance continuity, avoids parameter distortion, and can be applied to tests of the original cables up to 20 GHz to 60 GHz.

The embodiment of the invention discloses an optical device integrated circuit structure and an assembly method, and the circuit structure comprises a first coplanar waveguide unit which comprises a first grounding strip, a first signal strip and a second grounding strip which are sequentially arranged from left to right; a second coplanar waveguide unit and the first coplanar waveguide unit are arranged at an interval, and the second coplanar waveguide unit comprises a third grounding strip, a third signal strip and a fourth grounding strip which are sequentially arranged from left to right; a first bonding wire is connected between the first signal strip and the third signal strip; a second bonding wire is connected between the first grounding strip and the fourth grounding strip; a third bonding wire is connected between the second grounding strip and the third grounding strip; and the second bonding wire and the third bonding wire intersect to form an intersection point S located above the first bonding wire. The embodiment of the invention has the advantage of good impedance continuity.

The invention discloses a circuit board which comprises a plurality of rows of pin units. The single-row pin unit is internally provided with anti-pad areas and backflow ground holes which are arranged in a staggered manner; a pair of signal holes arranged in the anti-pad area; the differential wires are distributed in a snakelike manner and are connected with the pair of signal holes in a one-to-one correspondence manner; the differential wires are arranged between two adjacent rows of pin units; the snakelike bulge on the differential wire is close to the backflow ground hole at the periphery of the snakelike bulge and is far away from the signal hole at the periphery of the snakelike bulge; the impedance adjusting part is arranged on the side, connected with the signal hole, of the differential wire and located in the anti-pad area. According to the invention, impedance continuity of high-speed signals at the joint of the circuit board and the connector can be improved, and insertion loss and differential reflection are reduced at the same time.

The invention discloses a packaging structure, a printed circuit board and electronic equipment. The packaging structure comprises a substrate, an electronic element and a bonding pad assembly, wherein the bonding pad assembly comprises a bonding pad body and a conductive body, the conductive body is arranged on the periphery of the bonding pad body, and the impedance of the bonding pad assembly is equal to preset impedance Z0; the electronic element is electrically connected with the bonding pad body, and the bonding pad body is connected with a signal line; the substrate comprises a conductive layer and a dielectric layer, the dielectric layer comprises a first dielectric layer, and the conductive layer comprises a first conductive layer; the bonding pad assembly and the signal line are arranged on the outer surface of the first dielectric layer, the first conductive layer is arranged on the side, which is away from the bonding pad assembly, of the first dielectric layer, the first dielectric layer is provided with a through hole, a conductive film is arranged on the inner surface of the through hole, and the conductive body is connected with the first conductive layer through the conductive film; and the conductive layer is provided with an opening structure, and the orthographic projection of the bonding pad body on the conductive layer is located in the opening structure. The packaging structure provided by the invention is beneficial to improving impedance continuity and improving a signal transmission effect.

The invention discloses an ultra wide band quaternary array antenna apparatus used for a through-wall imaging radar. The antenna apparatus comprises a medium unit, an antenna unit, a parallel double-line feed unit, a reflection cavity and a connector. The antenna unit is printed on the bottom surface of the medium unit. The antenna unit is composed of a plurality of water-drop-shaped antenna arms. The parallel double-line feed unit comprises a first parallel double-line and a second parallel double-line which are X-shaped and which are respectively arranged on the upper surface and the lower surface of the medium unit. Terminals, approaching the antenna arms, of the parallel double-line separate according to index gradual changes, and are respectively connected with the corresponding antenna arms. A central point of the two parallel double-lines are connected with the connector through upper and lower end bonding pads. The reflection cavity is fixed with the edge of the medium unit and covers the antenna unit. One end of the connector is connected with the parallel double-line feed unit. The other end penetrates outside the refection cavity via a through hole in the middle of the reflection cavity and is fixed on the reflection cavity. The antenna apparatus of the present invention can be directly connected with a transmit-receive module through the connector, and the antenna apparatus has relatively good orientated radiation capability and broadband characteristics.

The present application discloses a link, including: a first trace; a second trace; a via hole arranged between the first trace and the second trace; a first trace connected to both the first trace and the via hole A trace in the transition area; a trace in the second transition area connected to the second trace and the via; the trace in the first transition area and the trace in the second transition area are preset to improve the continuity of the link impedance Preset impedance value. It can be seen that the first transition area and the second transition area are arranged between the via hole and the first and second transition areas on both sides, and the first transition area and the second transition area are arranged between the first transition area and the second transition area. Also set the preset impedance value. By setting the optimal impedance value for the transition area routing, the impedance characteristics at the via hole can be changed, thereby optimizing the overall impedance value of the link. Therefore, there is no need to adjust the anti-pad , which can conveniently realize improving the continuity of link impedance and improving the quality of signal transmission. The present application also provides a server, which can also solve the above technical problems.

The invention relates to a manufacturing method for a printed circuit board and the printed circuit board. The manufacturing method comprises the following steps: respectively drilling a first sub-board and a second sub-board; respectively drilling the first sub-board and the second sub-board; carrying out the electroplating of the holes drilled in the sub-board and the second sub-board to obtainelectroplated holes; performing the back drilling of short columns generated by electroplating of the holes in the first sub-board and the second sub-board, and obtaining back holes; and carrying outthe stitching of the first sub-board and the second sub-plate to form a mother board. The printed circuit board is fabricated using the method as described above. Through the above-mentioned manufacturing method, the hole depth of a back drilling hole of a PCB product with the thickness of 10 mm or less can be controlled to be 8 mil, which greatly improves the impedance continuity of the via holeand improves the transmission loss of the via hole. Moreover, the method has a simple process flow and is compatible with a conventional PCB process.

The present disclosure provides a printed circuit board including a plurality of conductive layers separated by insulating medium and a plurality of connection structures. Each connection structure penetrates each of the conductive layers. The plurality of conductive layers comprises a first conductive layer in which first signal lines are located and a second conductive layer in which second signal lines are located, and the first and second signal lines are connected via the connection structures. Anti-pads surrounding the connection structures are provided on others of the plurality of conductive layers except the first and the second conductive layers. For a same connection structure, the anti-pads surrounding the connection structure include adjacent anti-pads and nonadjacent anti-pads. Size of the adjacent anti-pads in any direction parallel to the conductive layers is smaller than that of the nonadjacent anti-pads. The present disclosure also provides a display apparatus.

The invention provides a layer-changing wiring method, device and integrated circuit system. The method determines the position of each PIN pin in the BGA chip on the PCB board, sets the layer-changing threshold, and within the range of the layer-changing threshold, the PCB On the board, set the VIA holes corresponding to each PIN pin, and the VIA holes corresponding to the PIN pins are adjacent; determine the PIN pin pair, and set a symmetrical GND VIA for the VIA hole pair corresponding to the PIN pin pair; lead out each PIN pin in the PIN pin pair Corresponding signal lines; route the signal lines corresponding to each PIN through the VIA holes in the corresponding VIA hole pairs. The scheme provided by the invention effectively improves the impedance continuity of the line signal at the VIA hole.

The present application discloses a link including a first wire; a second wire; a via hole disposed between the first wire and the second wire; a first transition zone wire connected to the first wireand the via hole; a second transition zone wire connected to the second wire and the via hole. The first transition zone wire and the second transition zone wire are provided in advance with preset impedance values to improve link impedance continuity. It can be seen that by arranging the first transition zone wire and the second transition zone wire between the via hole and the first wire and between the via hole the second wire respectively, providing the first transition zone wire and the second transition zone wire with the preset impedance values, and setting the optimal impedance valuesfor the transition zones, the impedance characteristic at the via hole can be changed so as to further optimize the impedance value of the entire link. Thus, it is convenient to improve link impedance continuity and improve signal transmission quality without adjust an anti-pad. The application also provides a server which can also solve the above technical problem.

The invention provides a method for optimizing differential via hole impedance, a circuit board, equipment and a storage medium. The method comprises the following steps of: calculating the thickness of a via hole stub according to the wiring of a signal and the thickness of a printed circuit board; determining the back drilling depth of a signal hole according to the thickness of the via hole stub; and determining the back drilling depth of a ground hole according to the back drilling depth of the signal hole, and performing back drilling on the signal hole and the ground hole of the printed circuit board to be subjected to differential via hole impedance optimization, wherein the back drilling depth of the ground hole is not greater than the back drilling depth of the signal hole. The invention further provides a circuit board, equipment and a storage medium based on the method. The impedance property of the via hole needs to be concerned when the high-speed link is designed, and for the ultra-high-speed signal hole with back drilling, the reference ground hole can be subjected to back drilling design besides optimizing the size of the anti-bonding pad, so that the via hole impedance can be further optimized, the link impedance continuity can be improved, the signal reflection can be reduced, and the signal transmission quality can be effectively improved.

The invention provides an asymmetric multichannel radio frequency switch matrix device. The device comprises a PCB, a controller, N radio-frequency signal input ends, N radio-frequency signal output ends and 2N radio-frequency switches, the PCB comprises a surface signal layer and a bottom signal layer, the controller is connected with the 2N radio-frequency switches, and each radio-frequency switch is provided with N signal channels. According to the asymmetric multichannel radio frequency switch matrix device, the radio frequency signal input end and the radio frequency signal output end arearranged perpendicular to each other, so that the input signal line and the output signal line are also perpendicular to each other, the radio frequency wiring does not intersect on the surface signal layer and the bottom signal layer, the requirement for the number of layers of the PCB is low, and the size and cost of the multichannel radio frequency switch matrix are reduced.

The invention discloses a method for optimizing the impedance of a circuit board via hole. The routing on the circuit board is designed according to the design requirements of the circuit board; the target routing of the via hole design exists according to the routing path of the routing; the target routing of the target routing is The size of the anti-pads at the via holes on the adjacent GND layers of the input signal layer and the output signal layer are enlarged so that the impedance of the target trace via holes meets the trace impedance requirements. It can be seen that this application optimizes the impedance continuity at the via hole by changing the shape of the anti-pad at the via hole, so as to meet the integrity requirements of the transmission signal without increasing the process cost; moreover, what this application changes is The shape of the anti-pad at the via hole on the adjacent GND layer of the input signal layer and the output signal layer of the trace will not affect the impedance of the trace while optimizing the impedance of the via hole. The invention also discloses a circuit board, which has the same beneficial effects as the above impedance optimization method.

The invention provides a method for designing the impedance continuity of differential signal vias and coupling capacitors, and a PCB board. The method includes the following steps: connecting the differential signals laid on the inner layer from the inner layer to the top layer through the differential signal vias to complete and couple Connection of capacitors; Hollow out all the strata through which the differential signal vias pass to form a hollowed out area; Hollow out the second layer of stratum below the coupling capacitor; Drill ground holes on both sides of the differential signal vias, and in the third layer Lay the ground plane next to the square or rectangular area formed by the pad of the ground hole. It avoids the problem of small impedance caused by not hollowing out the capacitance reference formation and the large impedance caused by directly hollowing out the adjacent formation, and greatly optimizes the impedance continuity of the differential signal link with coupling capacitance. Combining the impedance discontinuities of signal vias and coupling capacitors into one design reduces the number of discontinuities and improves signal integrity.