34results about How to "Improve impedance continuity" patented technology

Wire bonds connect current-carrying edges of high-frequency planar conductors to other electrical devices. In one embodiment, planar transmission lines are interconnected using two wire bonds. One bond wire extends from an edge of a first center conductor to a corresponding edge of a second center conductor, and a second bond wire extends from the other edge of the first center conductor to the other edge of the second center conductor. Embodiments include center conductors at different heights and having different widths, and different electrical devices, such as semiconductor integrated circuits. In a particular embodiment, ball bonding is used. In some embodiments, a tack bond is included after a ball bond to allow closer attachment of the bond wire to the edge of the conductor.

A testing assembly for an electrical test of an electronic package is provided. The testing assembly includes a testing circuit board and a testing socket mounted thereon. The testing socket includes an insulating body and a plurality of pins. The insulating body has a holding surface for supporting a contact surface of the electronic package, and at least one low-dielectric constant region located between two neighboring pins, and the dielectric constant of the low-electric constant region is lower than other regions of the insulating body. In addition, the pins passing through the insulating body are configured as the electric channels between a plurality of contacts on the contact surface and a plurality of testing pads on a conductive layer on a surface of the testing circuit board. Furthermore, the pins include a signal pin, and one end of the signal pin is electrically coupled to the signal testing pad.

A signal transmission structure for connecting a coaxial cable connector is provided. The coaxial cable connector has a signal pin. The signal transmission structure includes a reference plane and a conductive layer, and the conductive layer is located on one side of the reference plane. Moreover, the conductive layer includes a signal perforated pad, a first line segment, a second line segment, and a compensation pad. The signal pin is suitable for threading the signal perforated pad. The first line segment is connected to the signal perforated pad, and the compensation pad is connected between the first line segment and the second line segment.

The invention discloses an ultra wide band quaternary array antenna apparatus used for a through-wall imaging radar. The antenna apparatus comprises a medium unit, an antenna unit, a parallel double-line feed unit, a reflection cavity and a connector. The antenna unit is printed on the bottom surface of the medium unit. The antenna unit is composed of a plurality of water-drop-shaped antenna arms. The parallel double-line feed unit comprises a first parallel double-line and a second parallel double-line which are X-shaped and which are respectively arranged on the upper surface and the lower surface of the medium unit. Terminals, approaching the antenna arms, of the parallel double-line separate according to index gradual changes, and are respectively connected with the corresponding antenna arms. A central point of the two parallel double-lines are connected with the connector through upper and lower end bonding pads. The reflection cavity is fixed with the edge of the medium unit and covers the antenna unit. One end of the connector is connected with the parallel double-line feed unit. The other end penetrates outside the refection cavity via a through hole in the middle of the reflection cavity and is fixed on the reflection cavity. The antenna apparatus of the present invention can be directly connected with a transmit-receive module through the connector, and the antenna apparatus has relatively good orientated radiation capability and broadband characteristics.

The present application discloses a link, including: a first trace; a second trace; a via hole arranged between the first trace and the second trace; a first trace connected to both the first trace and the via hole A trace in the transition area; a trace in the second transition area connected to the second trace and the via; the trace in the first transition area and the trace in the second transition area are preset to improve the continuity of the link impedance Preset impedance value. It can be seen that the first transition area and the second transition area are arranged between the via hole and the first and second transition areas on both sides, and the first transition area and the second transition area are arranged between the first transition area and the second transition area. Also set the preset impedance value. By setting the optimal impedance value for the transition area routing, the impedance characteristics at the via hole can be changed, thereby optimizing the overall impedance value of the link. Therefore, there is no need to adjust the anti-pad , which can conveniently realize improving the continuity of link impedance and improving the quality of signal transmission. The present application also provides a server, which can also solve the above technical problems.

The invention relates to a manufacturing method for a printed circuit board and the printed circuit board. The manufacturing method comprises the following steps: respectively drilling a first sub-board and a second sub-board; respectively drilling the first sub-board and the second sub-board; carrying out the electroplating of the holes drilled in the sub-board and the second sub-board to obtainelectroplated holes; performing the back drilling of short columns generated by electroplating of the holes in the first sub-board and the second sub-board, and obtaining back holes; and carrying outthe stitching of the first sub-board and the second sub-plate to form a mother board. The printed circuit board is fabricated using the method as described above. Through the above-mentioned manufacturing method, the hole depth of a back drilling hole of a PCB product with the thickness of 10 mm or less can be controlled to be 8 mil, which greatly improves the impedance continuity of the via holeand improves the transmission loss of the via hole. Moreover, the method has a simple process flow and is compatible with a conventional PCB process.

The present disclosure provides a printed circuit board including a plurality of conductive layers separated by insulating medium and a plurality of connection structures. Each connection structure penetrates each of the conductive layers. The plurality of conductive layers comprises a first conductive layer in which first signal lines are located and a second conductive layer in which second signal lines are located, and the first and second signal lines are connected via the connection structures. Anti-pads surrounding the connection structures are provided on others of the plurality of conductive layers except the first and the second conductive layers. For a same connection structure, the anti-pads surrounding the connection structure include adjacent anti-pads and nonadjacent anti-pads. Size of the adjacent anti-pads in any direction parallel to the conductive layers is smaller than that of the nonadjacent anti-pads. The present disclosure also provides a display apparatus.

The invention provides a layer-changing wiring method, device and integrated circuit system. The method determines the position of each PIN pin in the BGA chip on the PCB board, sets the layer-changing threshold, and within the range of the layer-changing threshold, the PCB On the board, set the VIA holes corresponding to each PIN pin, and the VIA holes corresponding to the PIN pins are adjacent; determine the PIN pin pair, and set a symmetrical GND VIA for the VIA hole pair corresponding to the PIN pin pair; lead out each PIN pin in the PIN pin pair Corresponding signal lines; route the signal lines corresponding to each PIN through the VIA holes in the corresponding VIA hole pairs. The scheme provided by the invention effectively improves the impedance continuity of the line signal at the VIA hole.

The present invention relates to a radio frequency connector suitable for surface mounting to a circuit board, the radio frequency connector includes an insulator, a central terminal mounted to the center of the insulator, and a shielding shell wrapped around the insulator, the shielding shell includes A first part and a second part for connecting the radio frequency connector to another radio frequency connector, the second part includes a main body and a plurality of solder feet formed on the main body, wherein the main body includes a shielding part , the inner surface of the shielding portion surrounds the protruding portion of the central terminal; and at least one opening configured to communicate with the protruding portion of the central terminal when the radio frequency connector is soldered to the circuit board. The inner space between the output part and the shielding part and the outer space of the radio frequency connector.

A connecting structure of a circuit board is provided. The connecting structure includes at least one connecting trace and at least one connecting pad. The connecting trace and the connecting pad are disposed on a surface, or inside of the circuit board. The connecting pad has a first end surface and a second end surface at two opposite end surfaces thereof. The first end surface is a convex curved surface and connected to the connecting trace, and a cross section area of the connecting pad is gradually increased from the first end surface.

The invention discloses a method for optimizing the impedance of a circuit board via hole. The routing on the circuit board is designed according to the design requirements of the circuit board; the target routing of the via hole design exists according to the routing path of the routing; the target routing of the target routing is The size of the anti-pads at the via holes on the adjacent GND layers of the input signal layer and the output signal layer are enlarged so that the impedance of the target trace via holes meets the trace impedance requirements. It can be seen that this application optimizes the impedance continuity at the via hole by changing the shape of the anti-pad at the via hole, so as to meet the integrity requirements of the transmission signal without increasing the process cost; moreover, what this application changes is The shape of the anti-pad at the via hole on the adjacent GND layer of the input signal layer and the output signal layer of the trace will not affect the impedance of the trace while optimizing the impedance of the via hole. The invention also discloses a circuit board, which has the same beneficial effects as the above impedance optimization method.

The invention provides a method for designing the impedance continuity of differential signal vias and coupling capacitors, and a PCB board. The method includes the following steps: connecting the differential signals laid on the inner layer from the inner layer to the top layer through the differential signal vias to complete and couple Connection of capacitors; Hollow out all the strata through which the differential signal vias pass to form a hollowed out area; Hollow out the second layer of stratum below the coupling capacitor; Drill ground holes on both sides of the differential signal vias, and in the third layer Lay the ground plane next to the square or rectangular area formed by the pad of the ground hole. It avoids the problem of small impedance caused by not hollowing out the capacitance reference formation and the large impedance caused by directly hollowing out the adjacent formation, and greatly optimizes the impedance continuity of the differential signal link with coupling capacitance. Combining the impedance discontinuities of signal vias and coupling capacitors into one design reduces the number of discontinuities and improves signal integrity.