6 results about "Hardware random number generator" patented technology

The invention discloses a meteorological data transmission method based on an edge protection gateway algorithm, and belongs to the technical field of data transmission, and the method comprises the steps: building communication connection with meteorological observation equipment through a serial port service controller, carrying out the standardization processing of data, and carrying out the fragmentation storage and backup; generating a random seed by using a hardware random number generator, generating a round key through a key expansion function, performing encryption operation on the grouped data, and calculating a message authentication code; sending a password suite list to establish handshake connection, exchanging a key through elliptic curve operation, segmenting compressed data into records, and adding an authentication tag for transmission; identity authentication is carried out by adopting a digital certificate, and security protection is carried out on data through a firewall state table and a feature matching algorithm. Through the scheme of the application, the security of meteorological observation data transmission can be improved, data leakage, tampering and attacking are prevented, and the security and reliability of meteorological data are guaranteed.

A hardware random number generator (HW-RNG) for drawing samples from a multivariate target distribution through simulation of a Markov chain is disclosed. The HW-RNG (100) has a pipeline architecture operating in cycles. The HW-RNG comprises sets of p-bit devices (112-1; 112-2; 112- N), a programming unit (150) to program the sets of p-bit devices according to a corresponding set of adaptive proposal distributions, selection circuitry (121) to select one of the sets of p-bit devices, a sampling circuit (130) configured to produce a candidate sample from the proposal distribution associated with a selected one of the sets of p-bit devices, and a scheduling unit (140). The scheduling unit (140) is configured to accept the candidate sample with an acceptance probability, and recompute at least one of the proposal distributions that is conditionally dependent on the accepted candidate sample. A programming phase for each set of p-bit devices lasts for x cycles, and there are N > x sets of p-bit devices.

A hardware random number generator (HW-RNG) and related method are disclosed. The HW- RNG comprises a sample generation stage, adapted to produce primary samples from a plurality of primitive probability distributions, a sample processing stage and a control unit. The sample generation stage includes sets of programmable p-bit devices, a programming unit to adjust the mean values for each set of p-bit devices, and a distinct sampling circuit for each set of p-bit devices. The sample processing stage comprises function logic blocks and selection circuitry configured to route at least one subset of the primary samples to a corresponding function logic block. The control unit is configured to obtain information relating to a composition of basis distributions representative of a target distribution, instruct the function logic block to perform at least arithmetic operation identified by the information, instruct the programming unit to program the sets of p-bit devices according to the composition of basis distributions, and generate the select signal to operatively couple the function logic block to sampling circuits that produce primary samples of random variables defined by the composition of basis distributions.

A hardware random number generator (HW-RNG) for drawing samples from a multivariate target distribution through simulation of a Markov chain is disclosed. The HW-RNG (100) has a pipeline architecture operating in cycles. The HW-RNG comprises sets of p-bit devices (112-1; 112-2; 112-N), a programming unit (150) to program the sets of p-bit devices according to a corresponding set of adaptive proposal distributions, selection circuitry (121) to select one of the sets of p-bit devices, a sampling circuit (130) configured to produce a candidate sample from the proposal distribution associated with a selected one of the sets of p-bit devices, and a scheduling unit (140). The scheduling unit (140) is configured to accept the candidate sample with an acceptance probability, and recompute at least one of the proposal distributions that is conditionally dependent on the accepted candidate sample. A programming phase for each set of p-bit devices lasts for x cycles, and there are N > x sets of p-bit devices.

Computer-implemented methods and systems for operating a plurality of Hardware Random Number Generators (HRNGs), (e.g., physical roulette wheels). An example method includes sequentially launching each of the plurality of HRNGs such that none of the plurality of HRNGs have a starting point occurring at the same moment in time. Methods for selecting one HRNG out of the plurality of sequentially launched HRNGs based on a timing of a placed and confirmed bet such that the selected HRNG is the HRNG of the plurality of HRNGs having the lowest time until reaching the resolution while fulfilling a predefined criteria are also included. Thereby advantages in terms of time efficiency, increased game cycle rates, and improved human-machine interaction are readily achievable.

The invention relates to the technical field of embedded software, and discloses an embedded key generation method and device based on a hardware random number generator, and the method comprises the steps: collecting an original random number outputted by the hardware random number generator in an embedded system; performing entropy enhancement processing on the original random number so as to improve the randomness quality of the original random number, and generating a random number seed; based on the random number seed, embedded system parameters are fused, nonlinear transformation is carried out through multi-round iteration, and an initial secret key is generated; and verifying the initial key, if the verification is passed, storing the initial key as a final key in a secure storage area, and if the verification is not passed, re-executing the key generation process. According to the method, the security risk caused by insufficient randomness and strong predictability of the traditional software key generation algorithm in the existing embedded system is effectively solved.