35 results about "Loop inductance" patented technology

The application relates to the technical field of fault prediction, and specifically discloses a gate loop inductance detection method for fault prediction, which comprises the following steps: collecting voltage signals of a gate drive node in continuous multiple switching cycles, converting the voltage signals into voltage values, and drawing a voltage waveform according to the voltage values; counting the number of times that a preset stable high level is greater than in the rising edge Si, and counting the number of times CS in all switching cycles; counting the number of times that a preset stable low level is less than in the falling edge Xi, and counting the number of times CX in all switching cycles; calculating the rising time and the falling time based on the voltage waveform, and averaging the rising slope and the falling slope; calculating the rising index and the falling index; and judging the fault cause based on the rising index, the falling index, the number of times CS and the number of times CX. The application realizes early fault identification and root cause differentiation by counting the gate waveform features of multiple switching cycles, and improves the diagnostic accuracy and the system reliability.

The application discloses a Marx generator inductance acquisition method, comprising the following steps: outputting single-stage area inductance according to the length and radius of the single-stage area in the single FMG discharge main circuit of the Marx generator; the single-stage area inductance comprises switch section inductance, high-voltage plate section inductance, capacitor section inductance and output section inductance; outputting backflow area inductance according to the distance between backflow plates, the width of the backflow area and the length of the backflow area in the single FMG discharge main circuit of the Marx generator; outputting output area inductance according to the length and radius of the output area in the single FMG discharge main circuit of the Marx generator; and outputting the total inductance of the Marx generator according to the single-stage area inductance, the backflow area inductance and the output area inductance and the number of the single-stage area, the backflow area and the output area in the single FMG discharge main circuit of the Marx generator. The method can more accurately acquire the Marx generator loop inductance.

The invention relates to a pulse power primary pulse generation assembly, in particular to a double-stacked type high-voltage large-energy-storage-density fast-discharging Marx movement, and solves the problems that an S-shaped generator of an existing primary pulse generation assembly in the technical field of pulse power is loose in structure, low in energy storage density and high in discharge efficiency. The technical problems that cascade triggering is difficult to achieve, and the difficulty of insulation and mechanical structure design is large exist in an in-line generator. The double-stacked high-voltage large-energy-storage-density fast-discharging Marx movement has the advantages that the structure is compact, the energy storage density can reach 16J / L, the working voltage can reach 3MV, the loop inductance is as small as 2.3 uH, the setting time jitter is less than 6ns, cascade expansion is facilitated, the reliability is high, triggering / charging introduction is convenient, and the service life is long (gt; 10000), which is provided by the invention.

The invention provides a control device and method of a pulse power supply system, electronic equipment and a medium. The control device comprises a load coil (1), a loop inductor (2), a switch assembly (3), a follow current assembly (4), a loop resistor (5), a capacitor bank protection assembly (9), a charging protection assembly (10), a charging control switch (11), a direct current charging power supply (12) and a plurality of capacitor banks. A load coil (1), a loop inductor (2), a switch assembly (3), a follow current assembly (4) and a loop resistor (5) are sequentially connected, a plurality of capacitor banks are respectively connected with a capacitor bank protection assembly (9), a charging protection assembly (10) and a charging control switch (11) which are in one-to-one correspondence, and a direct current charging power supply (12) is respectively connected with the load coil (1), the loop resistor (5), the plurality of capacitor banks and the charging control switch (11). Wherein the load coil (1) comprises a positive wave load coil and a negative wave load coil.

A multi-phase power converter includes a printed circuit board having a plurality of conductive layers in a spaced apart and parallel relationship. The plurality of conductive layers includes a plurality of power planes in an interleaved configuration with alternating positive and negative voltages and configured to conduct a relatively high current for supplying to a load. The multi-phase power converter also includes a plurality of switching transistors disposed on an upper surface of the printed circuit board and configured to selectively conduct the relatively high current. The conductive layers include at least one signal plane disposed between the plurality of power planes and a surface of the printed circuit board, the at least one signal plane transmitting signals for controlling operation of the plurality of switching transistors. A power converter phase includes a high-side transistor, a low-side transistor, and a driver circuit disposed adjacent to the transistors.

Systems and methods relate to accounting for insertion losses and / or loop inductance during the design and layout phase of a PCB. Insertion losses are measured along signal paths, and / or loop inductance is measured along current loops, and if measured values are above predefined maximums, a PCB designer is prompted to redesign the PCB layout.

The application discloses a high-heat-dissipation high-frequency power module and a manufacturing method thereof. The high-heat-dissipation high-frequency power module comprises an embedded circuit board, at least one high-frequency capacitor and insulating heat-conducting material, and power electrodes of at least two semiconductor power devices are connected in series to form at least one power conversion bridge arm. The area ratio of the power electrode wiring of the semiconductor power device projected on the surface of the embedded circuit board to the area of the semiconductor power device is more than 60%. The power conversion bridge arm is connected in parallel with the high-frequency capacitor to realize low-loop inductance interconnection. The application can realize high-frequency and large-current characteristics, has single-face high-heat-dissipation capacity and nearly ideal double-face high-heat-dissipation capacity. Due to excellent loop processing, the loop inductance of the bridge arm formed by two semiconductor power devices per 10 square millimeters is less than 2nH or even less than 1nH, which is suitable for MHz frequency requirement and is much higher than the current mainstream frequency of less than 100KHz.

Systems and methods involve considering insertion loss and / or loop inductance during design and layout phases of a PCB. The insertion loss is measured along the signal path and / or the loop inductance is measured along the current loop, and if the measured value is above a predefined maximum value, the PCB designer is prompted to redesign the PCB layout.

The invention relates to the technical field of chip series welding, and discloses a three-phase power bridge preparation process based on a multi-row chip series welding technology, and the preparation process comprises the following steps: S1, design and layout, S2, multi-beat chip mounting, S3, reflow soldering and silver sintering, S4, housing assembly and potting, and S5, testing and screening. A wiring pattern of a copper-clad ceramic substrate is designed, then a current path is optimized, loop inductance is minimized, the current distribution uniformity between parallel chips is ensured, enough safe creepage distances and electrical gaps between different potentials are ensured, and the electrical gaps comprise DC +, DC-and output U / V / W of each phase. Optimizing chip arrangement and copper layer thickness to facilitate conduction of heat to a radiator, balancing thermal coupling, space utilization rate and process feasibility, designing low-inductance routing for a gate drive signal, and forming a required copper circuit pattern through active metal brazing; and cleaning and surface treatment are carried out to improve the reliability of subsequent welding and bonding.

The low-stray-inductance and low-thermal-resistance power module comprises a first-layer DBC structure, a second-layer DBC structure, a third-layer DBC structure and a fourth-layer DBC structure which are sequentially stacked from top to bottom and comprise the micro-channels, and chip layers are arranged between the DBC structures respectively. A heat dissipation module integrated with a micro-channel is arranged between the second-layer DBC structure and the third-layer DBC structure, and a PCB containing a decoupling capacitor is further connected between the first-layer DBC structure and the second-layer DBC structure or between the third-layer DBC structure and the fourth-layer DBC structure in an integrated mode. The power module can obviously improve the thermal performance, reduce the thermal resistance, optimize the electrical performance, reduce the loop inductance and improve the power density in unit volume; through the arrangement of the structure, the volume power density of the power module is improved by more than 35%, real three-dimensional integrated heat dissipation is realized, the system reliability is improved, and the fault-free working time is obviously prolonged.

The invention relates to the technical field of fault prediction, and particularly discloses a grid loop inductance detection method for fault prediction, which comprises the following steps of: acquiring voltage signals of a grid driving node in a plurality of continuous switching periods, converting the voltage signals into voltage values, and drawing a voltage waveform according to the voltage values; counting the number of times in the rising edge Si which is greater than a preset stable high level, and counting the number of times CS in all switching periods; counting the number of times smaller than a preset stable low level in the falling edge Xi, and counting the number of times CX in the whole switching period; calculating a rise time and a fall time based on the voltage waveform, and averaging a rise slope and a fall slope; calculating a rising index and a falling index; and determining a fault cause based on the rising index, the falling index, the number of times CS and the number of times CX. According to the invention, by counting the grid waveform characteristics of a plurality of switching periods, early fault identification and root cause distinguishing are realized, and the diagnosis accuracy and the system reliability are improved.

The application provides a low-voltage electrical product large-current synthesis test system and method, which comprises: a current source system comprising a first switching valve connected in series with a low-voltage electrical product, a first loop inductor, a first charging capacitor, a first charging system connected in parallel with the first charging capacitor, a first discharging component, a first loop voltage measuring device and a first grounding switch; a voltage source system comprising a second loop inductor connected in series with the low-voltage electrical product, a second switching valve, a second charging capacitor, a second charging system connected in parallel with the second charging capacitor, a second discharging component, a second loop voltage measuring device and a second grounding switch; the first switching valve and the second switching valve are reverse-parallel thyristor valves; the current source system, the voltage source system and a third loop current measuring device are grounded through a common point. The application can perform a low-voltage electrical product large-current synthesis test with low risk.

This invention discloses a low-inductance power module substrate terminal structure. The structure includes a first connection terminal, a second connection terminal, and at least one double-layer power module substrate. Partial areas of the first and second connection terminals are arranged with vertical overlap and form a wiring end at their front ends. The first and second connection terminals each have an extension and a connection portion at their rear ends. The double-layer power module substrate includes a first substrate connection area and a second substrate connection area. The connection portion of the first connection terminal is integrally connected to the first substrate connection area, and the connection portion of the second connection terminal is integrally connected to the second substrate connection area. This structure reduces system loop inductance, effectively reduces voltage spikes during IGBT module turn-off, reduces switching losses, avoids electromagnetic interference, and ensures the performance of the three-phase inverter drive system.

A silicon substrate providing wafer-scale routing and power distribution includes a redistribution layer structure patterned across substantially the entire wafer. The redistribution structure contains signal paths and power meshes with co-planar return conductors that reduce loop inductance and voltage droop during high-speed switching. Multiple device-mount regions distributed over the wafer connect through these paths to support direct chip-to-chip communication without an organic interposer. Reticle-stitch redundancy, embedded decoupling, and isolation trenches improve continuity and reliability. The architecture enables large-scale multi-chip assemblies with uniform impedance, reduced parasitics, and efficient power delivery across the silicon plane.

The invention relates to a primary pulse source of pulse power, in particular to a high-voltage low-inductance pulse discharge module, and solves the problems that an existing single capacitor mode is loose in structure, low in energy storage density, complex in switch structure, insufficient in multi-channel discharge stability, limited by a capacitor charging threshold value under the same load condition, low in power consumption and the like. The technical problems that the peak value of the output voltage of a single discharge unit is relatively low due to the fact that the discharge unit in a double-capacitor mode is loose in structure, low in energy storage density, large in discharge loop inductance and low in discharge speed, the discharge peak value time generally reaches hundreds of nanoseconds or even several microseconds, and a trigger system for controlling discharge of the unit is complex and high in peak value exist in the discharge unit in the double-capacitor mode. The device comprises N discharge units, each discharge unit is of a cuboid structure and comprises a closed switch, two high-voltage connecting plates, four capacitor banks and four loop connecting plates, and each capacitor bank comprises M capacitors connected in parallel.

The invention relates to the technical field of power electronics, and discloses a single-stage bridgeless buck-boost AC-DC converter. Comprising an alternating current power supply Vg, a CL structure filter circuit, a first power switch tube S1, a second power switch tube S2, a third power switch tube S3, a fourth power switch tube S4, a fifth power switch tube S5, a sixth power switch tube S6, a first direct current inductor Ldc1, a first diode D1, a second diode D2, a first electrolytic capacitor C1, a second electrolytic capacitor C2, a first direct current load R1 and a second direct current load R2. Compared with a traditional AC / DC converter power loop, the AC / DC converter power loop has the advantages of being high in inductance utilization rate, small in loop inductance voltage drop, low in conduction loss, low in switching loss, capable of restraining leakage current and the like.

The utility model discloses a novel module packaging structure with a PCB, comprising a PCB, a plurality of power devices mounted on the surface of the PCB, a signal loop arranged on the surface of the PCB, a driving clamping part mounted on the surface of the signal loop, a signal terminal connected with the driving clamping part, the signal terminal arranged on the PCB, a capacitor mounted on the surface of the PCB, and a capacitor connected with the capacitor. Thin copper layers are installed on the upper side and the lower side in the PCB, and wiring of a power loop is achieved between the thin copper layers on the upper side and the lower side. Power devices in traditional packaging are arranged on the PCB in a single-tube surface-mounted device mode, the surface layer of the PCB is used for wiring of a signal loop, meanwhile, an MOS in a driving clamp can be arranged on the surface of the PCB through the surface-mounted technology so that more accurate driving can be achieved, two thin copper layers in the PCB are used for wiring of a power loop, and therefore the reliability of the PCB is improved. The PCB can realize internal double-layer wiring, so that the size of the module is more compact, and meanwhile, the laminated wiring can effectively reduce loop inductance.

The invention discloses a power module with variable parasitic parameters, which belongs to the technical field of power electronic devices and comprises a ceramic substrate, a circuit copper layer covering the ceramic substrate, a quick release base and a chip mounted on the circuit copper layer, and a power source electrode, a power drain electrode, a signal grid electrode and a signal source electrode which are welded on the circuit copper layer. A gate-source capacitor, a gate resistor and a drain-source capacitor are inserted into the quick-release base, so that parasitic parameters are quickly adjusted; the length of the inductance adjusting bonding wire is changed through the inductance adjusting bonding wire bonded on the circuit copper layer so as to adjust the parasitic inductance of the gate source driving loop. According to the power module provided by the invention, rapid replacement of a capacitor between a gate and a source, a gate resistor, a capacitor between a source and a drain and a gate-source driving loop inductor can be realized, rapid optimization of a plurality of numerical values is realized based on the same module, oscillation of driving voltage in a switching process is effectively relieved, and the speed of design iteration is greatly improved.

The invention relates to an output inductance balancing method of a multi-half-bridge module parallel system, in particular to a multi-half-bridge module parallel system with balanced output inductance and an output inductance balancing method. The half-bridge IGBT module mainly solves the technical problem that current sharing cannot be achieved due to the fact that direct current sides are asymmetrical and solidified when existing half-bridge IGBT modules are connected in parallel. According to the system, a high-inductance output path is designed for a half-bridge IGBT module connected to a low-direct-current inductance busbar, and a low-inductance output path is designed for a half-bridge IGBT module connected to a high-direct-current inductance busbar, so that accurate compensation for asymmetry of a direct-current side is realized, and main switch loop inductance of each parallel branch tends to be consistent. According to the invention, a complex active circuit does not need to be added, dynamic current unevenness between modules can be effectively suppressed in a compact space only by optimizing the mechanical structure of the output busbar, the reliability and the output capability of a system are remarkably improved, and the device is particularly suitable for high-power density application occasions such as locomotive traction, compact frequency converters and power supplies.

The utility model discloses a novel glue filling power module structure, and signal terminal installation arrangement is in the middle part of power module and extends upward, and power terminal arrangement is in the both sides of power module and extends outward, the root of signal terminal is connected on the insulating substrate of power module and drive board through pressure equipment and interference fit, the arrangement of signal terminal in the middle part of power module corresponds with drive board, and the arrangement of signal terminal is according to: there is shortening circuit loop between drive board and corresponding signal terminal, and the arrangement position of power terminal is flexibly laid out according to application demand. Through the application, built-in integrated drive board is at signal terminal, shortens circuit loop, reduces loop inductance, solves the cooperation problem of product and terminal drive board, and improves production efficiency.

A power electronic building block is provided, including capacitors, switch modules, a busbar arrangement, and at least one AC busbar. Connection points of the at least one AC busbar are arranged symmetrically along a first direction with respect to a plane perpendicularly intersecting the first direction, and the at least one AC busbar includes a hole elongated along the first direction and configured to balance one or more loop inductances between at least one AC external terminal point and the connection points. A modular multilevel converter (MMC) is also provided, including a plurality of converter arms each including at least one sub module formed by the PEBB.

The invention relates to an embedded power module, which comprises a substrate, a power device, a power copper layer and a signal copper layer, and is characterized in that the substrate comprises a circuit layer, the circuit layer is provided with an accommodating space, the power device is embedded in the accommodating space, and the power copper layer is pressed on one side, close to the power device, of the substrate; the power copper layer is pressed on the circuit layer and connected with the circuit layer and the power device through the first connecting through holes to form interconnection, the signal copper layer is pressed on the power copper layer and connected with the circuit layer and the power device through the second connecting through holes to form interconnection, and the circuit layer, the power copper layer and the signal copper layer are arranged in a laminated mode in the thickness direction of the substrate. Therefore, loop current positive and negative lamination is realized, loop inductance and stray inductance are reduced, and the performance of the power module is improved.

The invention discloses a high-speed transmission cable and a production process thereof, the high-speed transmission cable comprises at least two signal core wires, a first shielding layer, at least one ground wire, a second shielding layer and an insulating layer, and the at least two signal core wires are arranged in parallel; the first shielding layer wraps the at least two signal core wires; the ground wire is flat and is attached to the first shielding layer; the second shielding layer wraps the ground wire and the first shielding layer; the insulating layer wraps the second shielding layer. According to the technical scheme, the coupling area of the ground wire and the shielding layer can be remarkably increased, an electromagnetic field is more uniformly distributed along the circumferential direction of the cable, loop inductance and a common-mode radiation peak value are reduced, the shielding efficiency is improved under the high-frequency condition, the integrity of differential signals is kept, and meanwhile a geometric stability reference is provided for a continuous production process.

The invention provides a three-level embedded module, and relates to the technical field of power electronics, the three-level embedded module comprises a circuit board, the front surface of the circuit board is provided with signal pins and power terminals; and the plurality of chip units are embedded and integrated in the circuit board and are connected with the signal pins and the power terminal wires to form a three-level topological structure. The beneficial effects of the invention are that copper cladding in the PCB is adopted to replace tedious wiring and dispersed layout in a traditional scheme, the wiring path is shortened and optimized, stray and loop inductance are greatly reduced, and the circuit control precision and the whole machine efficiency are improved; the chip is embedded in the PCB, traditional shell packaging is omitted, the size of the whole machine is remarkably reduced, the PCB substrate has an insulation function, an insulation structure does not need to be additionally arranged, heat dissipation and safety regulation troubles are avoided, and the junction temperature of the chip is improved; the integrated design avoids uneven current caused by layout difference of discrete devices, the assembly process is simplified, compared with a traditional plastic shell module, the manufacturing cost is reduced, and reliability and economical efficiency are both considered.

The invention relates to the technical field of PCB design, in particular to an intelligent layout method and system for PCB elements. An intelligent layout system for PCB elements comprises a key load element management module, a region of interest layering module, a first capacitor candidate point pre-screening module, a second capacitor candidate point screening module, a capacitor candidate point primary layout module and a capacitor candidate point layout optimization module. In the topology analysis stage, a power supply output pin, a load power supply pin and a decoupling capacitor candidate point are abstracted into a power supply network triangular topology structure, accurate evaluation of the candidate point is achieved through electrical performance analysis, it is ensured that a high-frequency capacitor is close to a load, loop inductance is minimized, an intermediate-frequency capacitor is shared according to clusters, and a low-frequency capacitor is shared according to domains; therefore, effective suppression of the power supply noise on different frequency bands is realized.

The application relates to an embedded power module, which comprises a substrate, a power device, a power copper layer and a signal copper layer. The substrate comprises a circuit layer, the circuit layer is provided with a containing space, the power device is embedded in the containing space, the power copper layer is attached to one side of the substrate close to the power device, the power copper layer is connected with the circuit layer and the power device through first connecting through holes to form interconnection, the signal copper layer is attached to the power copper layer, the signal copper layer is connected with the circuit layer and the power device through second connecting through holes to form interconnection, and the circuit layer, the power copper layer and the signal copper layer are arranged in a laminated mode in the thickness direction of the substrate, so that the positive and negative loop currents are laminated, the loop inductance and the stray inductance are reduced, and the performance of the power module is improved.

The utility model relates to the technical field of semiconductors, in particular to a power module, a driving chip and electronic equipment, the power module comprises a lead frame, at least one MOS (Metal Oxide Semiconductor) tube chip and at least one diode chip, the MOS tube chip and the diode chip are directly connected to the lead frame, the anode of the diode chip is fixedly connected to the lead frame through one or more metal bulge structures, and the cathode of the diode chip is connected to the MOS tube chip through a bonding wire. According to the power module provided by the embodiment of the utility model, the chip is packaged in a small-size product, so that the problem of packaging resource waste caused by over-large power volume and over-small proportion of topology in a shell packaging module is solved; the MOS and the diode which is inversely mounted by using the inversion process are integrated on the same lead frame, so that the problems of large loop inductance, complicated packaging process and the like caused by the fact that the MOS and the diode are packaged in a separated lead frame in topology are solved.

The invention discloses a voltage harmonic distortion rate estimation method and system for a transformer full-voltage no-load test. Relates to the technical field of electrical engineering. Collecting system parameters of the full-voltage no-load test system and basic parameters of the target transformer; air-rising harmonic voltage of the full-voltage no-load test system is tested; obtaining the inductance of a test loop based on the system parameters and the basic parameters, and calculating the harmonic voltage drop of the full-voltage no-load test system; under the target test voltage, the voltage harmonic distortion rate is calculated according to the air-rising harmonic voltage and the harmonic voltage drop; guiding the full-voltage no-load test system to perform equipment type selection based on the voltage harmonic distortion rate; according to the scheme, on the basis of the full-voltage no-load test system and the target transformer, the harmonic distortion rate when the test system outputs the target voltage under the specific equipment parameters is quantitatively and accurately predicted; according to the invention, guess based on experience is converted into model selection based on calculation, unnecessary margin is avoided, and the portability of a test system and the convenience of field deployment are improved.

The embodiment of the invention discloses a method for forming a capacitor in a packaging substrate, the packaging substrate and a packaging chip. According to the embodiment of the invention, at least one opening structure is formed on a provided core plate, then a first electrode layer and a second electrode layer which cover part of the side wall of each opening structure are formed, and further a dielectric material layer located between the first electrode layer and the second electrode layer is formed, the opening structure comprises a groove partially penetrating through the core plate and / or a through hole penetrating through the core plate, the first electrode layer and the second electrode layer are electrically isolated from each other and are opposite in position, the first electrode layer and the second electrode layer are used as polar plates of the capacitor, and the dielectric material layer is used as a dielectric layer of the capacitor. According to the embodiment of the invention, the capacitor can be directly formed in the packaging substrate, so that the packaging size can be reduced, the loop inductance of the power distribution network is reduced, and the link parasitism is improved.

The utility model discloses a large-scale integrated chopper bridge circuit, which comprises an input end positive electrode / output end positive electrode, an input end negative electrode, a first chopper bridge circuit, a second chopper bridge circuit, a pilot arc bridge circuit, a floating voltage circuit, a first chopper bridge output end negative electrode, a second chopper bridge output end negative electrode and a pilot arc bridge output end negative electrode, the first chopping bridge circuit, the second chopping bridge circuit and the pilot arc bridge circuit are connected in parallel between the input end positive electrode and the input end negative electrode; the negative electrode of the output end of the first chopper bridge circuit, the negative electrode of the output end of the second chopper bridge circuit and the negative electrode of the output end of the pilot arc bridge circuit are connected through inductors. The utility model provides a large-scale integrated chopper bridge circuit, and the problem of magnetic bias of a transformer does not exist. Due to the fact that components are reasonable in layout and small in loop inductance, the power tube does not need a complex absorption circuit, even if rapid pulse control is carried out, the reliability of the power supply is not affected, and due to the fact that the bridge body power tube is high in driving frequency and externally connected with small output inductance, high-speed current control can be carried out during large-current droplet transition.