33results about How to "Improve input dynamic range" patented technology

An RF detector configured to provide two outputs, one being a function of the true RMS power level of an RF input signal, and the other being a function of the instantaneous / peak power of the RF input signal, normalized to the average power level. The RF detector includes a variable gain detection subsystem including a single detector or detector array that provides a representation of the power level of the RF input signal. The detector or detector array is common to both the RMS power detection channel and the instantaneous / peak power detection channel of the RF detector. A method of RF detection includes providing representations of the RF input signal at different gain levels, selecting one or more of the representations, and averaging the selected signals. The gain levels of the selected representations is adjusted to provide information about the average power level of the RF input signal.

The invention discloses a demodulator circuit for a UHF (Ultrahigh Frequency) radio frequency identification label chip. Aiming at the defect of smaller dynamic range brought by the substitution of a traditional grid-grounded MOS (Metal-Oxide Semiconductor) tube for a high-resistance resistor, the invention provides a demodulator circuit which comprises an overvoltage protection circuit and a mean value generating circuit. The demodulator circuit connects the grid of a first PMOS (P-Channel Metal Oxide Semiconductor) tube in the mean value generating circuit with the grid of a first NMOS (N-Channel Metal Oxide Semiconductor) tube in the overvoltage protection circuit, and the grid level of the first PMOS tube automatically varies with the source level thereof by the partial pressure action of a second PMOS tube and a second resistor when the source level of the first PMOS tube rises or falls so that the absolute values of a grid voltage and a source voltage of the first PMOS tube are kept stable, the first PMOS tube has stable equivalent resistance in a large dynamic range, and the demodulator circuit of the invention has greater dynamic input range compared with the traditional demodulator circuit.

The invention provides a low circuit sensitive Sigma-Delta modulator capable of increasing the input signal scope and improving the precision, which comprises a first analog subtractor, a first gain unit, at least one auxiliary quantizer, a second gain unit, a second analog subtractor, a internal Sigma-Delta modulation module, a shift register, a digital subtractor and a feedback digital to analog converter (DAC). The Sigma-Delta modulate not only reduces sensitivity to imperfection of assemblies, but also greatly improves input signal level while improving the precision.

The invention discloses a high-speed digital optical fiber isolation transmission device and method, and belongs to the field of high-speed digital isolation transmission control. A digital technologyand an optical fiber transmission technology are combined, so that the data transmission performance is excellent; an optical fiber is used for transmission, the device and the method have the advantages of high isolation voltage level, high anti-jamming capability, large input dynamic range, high response speed and the like, and high-speed and high-precision signal transmission can be realized in the high-voltage and strong-electromagnetic interference environment; a high-speed digital serial communication SERDES technology is adopted, low-speed parallel signals are converted into high-speedserial signals, and point-to-point double-wire data transmission is achieved, so that the transmission capacity and the system performance can be improved, and the communication cost is greatly reduced.

An RF detector configured to provide two outputs, one being a function of the true RMS power level of an RF input signal, and the other being a function of the instantaneous / peak power of the RF input signal, normalized to the average power level. The RF detector includes a variable gain detection subsystem including a single detector or detector array that provides a representation of the power level of the RF input signal. The detector or detector array is common to both the RMS power detection channel and the instantaneous / peak power detection channel of the RF detector. A method of RF detection includes providing representations of the RF input signal at different gain levels, selecting one or more of the representations, and averaging the selected signals. The gain levels of the selected representations is adjusted to provide information about the average power level of the RF input signal.

An RF detector configured to provide two outputs, one being a function of the true RMS power level of an RF input signal, and the other being a function of the instantaneous / peak power of the RF input signal, normalized to the average power level. The RF detector includes a variable gain detection subsystem including a single detector or detector array that provides a representation of the power level of the RF input signal. The detector or detector array is common to both the RMS power detection channel and the instantaneous / peak power detection channel of the RF detector. A method of RF detection includes providing representations of the RF input signal at different gain levels, selecting one or more of the representations, and averaging the selected signals. The gain levels of the selected representations is adjusted to provide information about the average power level of the RF input signal.

The invention discloses a photoreceiver preamplifier circuit with high sensitivity and a wide dynamic range. The circuit comprises a photodiode, a trans-impedance amplifier, a single-end-to differential amplifier, an output buffer circuit, a peak detection circuit and a direct current maladjustment eliminating circuit. Aiming at the input stage trans-impedance amplifier of the photoreceiver preamplifier circuit, the technical scheme designs a novel three-stage push-pull inverter structure, has the characteristics of high gain and low noise, and improves the sensitivity of the preamplifier; a virtual zero point is designed in a feedback loop, so that the work rate of the trans-impedance amplifier is improved, and the stability is increased; provides is a new automatic gain control technology with an adaptive function, so that the trans-impedance amplifier keeps bandwidth invariable and keeps the loop stable under the different optical input powers, and has the characteristic of wide dynamic range.

An optical receiver preamplifier includes an inverting amplifier 1 and a current-voltage conversion element 2 connected between input and output terminals of the inverting amplifier 1. The inverting amplifier 1 includes a first transistor 3 having a gate connected to the input terminal In of the inverting amplifier 1, a second transistor 4 having a source connected to a drain of the first transistor 3 and a gate to which a predetermined voltage Vb is applied, and a load 5 connected to a drain of the second transistor 4. A third transistor 6 is connected between the input terminal In of the inverting amplifier 1 and a source of the second transistor 4.

The invention belongs to the technical field of analog integrated circuitry and particularly provides a linear error amplifier with temperature compensation, comprising a PTAT (proportional to absolute temperature) current source, a common collector level shift circuit, a transconductance amplifier composed of an imbalance differential pair, and a frequency compensation network composed of C1, C2 and R1. The common collector level shift circuit raises low voltage to a higher one which is input to a secondary transconductance amplifier; the secondary transconductance amplifier is composed of an imbalance differential pair according to poly-hyperbolic tangent principle, with effective input voltage range widened and linearity improved; the PTAT current source provides tail current for the differential pair to compensate amplifier transconductance instability due to temperature changes; the frequency compensating network generates a suitable zero polar point so that the phase margin of the transconductance amplifiers reaches 60 degrees. The linear error amplifier disclosed herein has a wide dynamic voltage input range and low temperature sensitivity, and is suitable particularly for error amplifiers of DC-DC converters.

The invention is a CMOS voltage comparer, a multistage amplifier, where, for each one, the first output end is connected with the first input end by a switch and the second output end connected with the second input end by a switch, the two switches are opened or closed at the same time; the input end of each amplifier is connected with the output end of the previous amplifier and the switches of all the amplifiers are opened or closed at the same time; a double-arrival single-converting circuit with two input ends connected with two output ends of the last amplifier; a multistage output reshaping circuit, where one input end is connected with one output end of the double-arrival single-converting circuit; DC isolating capacitors, situated in front of the input ends of all the amplifiers and the double-arrival single-converting circuit; a first switch, where an input signal is connected to the primary amplifier through the first switch and then an DC isolating capacitor; a second switch, where the other input signal is grounded through the second switch and the second switch and all the switches of the multistage amplifier are opened or closed at the same time.

A sample and hold circuit including a first arrangement for receiving an input signal; a second arrangement for sampling and holding the signal in response to a control signal; and a third arrangement for minimizing the change in an input transistor's base current when the circuit switches from track to hold or hold to track and for keeping the collector emitter voltage constant at the input transistor. An arrangement is disclosed to increase the dynamic current accuracy of a current mirror for a diode connected transistor, by holding the voltage across one transistor in the current mirror constant. Another arrangement is disclosed for holding collector to emitter voltage constant for intermediate transistors resulting in improved gain accuracy and linearity. In one embodiment, a dummy leg is added to isolate the output voltage from switching transients that occur when an intermediate transistor is turned on at the transition from track to hold.

The invention discloses an electroencephalogram detection device. The device comprises preamplifying circuits, anti-aliasing filter circuits, analog-to-digital (AD) converters and an analytical computer, and is characterized in that: each of the preamplifying circuits, each of the anti-aliasing filter circuits and each of the AD converters are sequentially connected to form a sampling and AD conversion circuit respectively; a plurality of sampling and AD conversion circuits are connected in parallel to form a plurality of channels of data streams; and then the data streams are collected into a high-speed data stream through a high-speed data collection circuit, and the high-speed data stream is transmitted to the analytical computer for analysis and processing through a data transmission circuit. The invention also discloses an electroencephalogram detection method. By the electroencephalogram detection device, the requirement of simultaneously performing high-rate (10KHZ per channel) and high-precision (24bit) sampling on a plurality of channels of electroencephalogram signals can be met, so that the device has the characteristics of high stability, strong anti-jamming capability, wide frequency band range and the like.

An optical receiver preamplifier includes an inverting amplifier 1 and a current-voltage conversion element 2 connected between input and output terminals of the inverting amplifier 1. The inverting amplifier 1 includes a first transistor 3 having a gate connected to the input terminal In of the inverting amplifier 1, a second transistor 4 having a source connected to a drain of the first transistor 3 and a gate to which a predetermined voltage Vb is applied, and a load 5 connected to a drain of the second transistor 4. A third transistor 6 is connected between the input terminal In of the inverting amplifier 1 and a source of the second transistor 4.

An acoustic sensor is provided according to certain aspects for non-invasively detecting physiological acoustic vibrations indicative of one or more physiological parameters of a medical patient. The sensor can include an acoustic sensing element configured to generate a first signal in response to acoustic vibrations from a medical patient. The sensor can also include front-end circuitry configured to receive an input signal that is based at least in part on the first signal and to produce an amplified signal in response to the input signal. In some embodiments, the sensor further includes a compression module in communication with the front-end circuitry and configured to compress portions of at least one of the input signal and the amplified signal according to a first compression scheme, the compressed portions corresponding to portions of the first signal having a magnitude greater than a predetermined threshold level.

The invention discloses an automatic gain control circuit and method of a transimpedance amplifier circuit. The automatic gain control circuit comprises the transimpedance amplifier circuit, a reference voltage generation circuit and a resistance control circuit; the transimpedance amplifier circuit comprises an input bias resistor circuit, a forward amplifier and a feedback resistor circuit; the reference voltage generating circuit is correspondingly scaled according to the proportion of the transimpedance amplifier circuit and is used for outputting a reference voltage; the resistance control circuit comprises a low-pass filter circuit and a latch comparator, the output voltage of the trans-impedance amplifier passes through the low-pass filter circuit and is compared with the reference voltage through the latch comparator, and the latch comparator generates a digital control bit according to a comparison result, and adjusts the resistance values of the feedback resistance circuit and the input bias resistance circuit through the digital control bit, so the automatic gain control of the trans-impedance amplifier is realized. According to the invention, the dependency relationship between the maximum input current and the feedback resistance is weakened, and the input dynamic range is effectively enlarged.

The invention relates to an oscilloscope with an improved front-end circuit, the oscilloscope includes a front-end circuit and a control processing module, the front-end circuit includes an input stage buffer and addition circuit, a gain selectable amplification module, an A / D conversion circuit and a D / A conversion circuit , the input stage buffering and adding circuit sequentially passes through the gain optional amplification module and the A / D conversion circuit to the control processing module, the gain selection output end of the control processing module is connected to an input end of the gain optional amplification module , the other output terminal of the control processing module provides a front-end circuit bias signal through the D / A conversion module, and the bias signal is output to the input stage buffer and adding circuit. The oscilloscope of the present invention improves the minimum resolution of ADC input, reduces the demand for analog front-end gain, and uses the switching of amplifiers with several gains at the same time, combined with digital gain, which not only saves costs, but also improves the input ADC signal. signal-to-noise ratio.

The present invention comprises a pair of circuits (171, 172) within the first stage (100) of an AC signal pre-amplifier. The present invention reduces the current mismatch at the base of the first stage transistors (141, 142, 143, 144) resulting in faster switching times by reducing input stage offset and, hence improving input dynamic range.

The invention discloses an oximetry front-end direct-current filtering circuit applicable to a smart band. The oximetry front-end direct-current filtering circuit applicable to the smart band comprises a signal primary input end, wherein the signal primary input end is sequentially connected with a TIA (Totally Integrated Automation) circuit, a controllable bias reduction circuit, a secondary amplifying circuit, an ADC sampling circuit and a processor; a draw-off current circuit is also connected between the signal primary input end and the TIA circuit, and is connected with the processor; the processor is used for controlling the draw-off current circuit to adjust the current signal strength of the signal initial input end. The invention also discloses an adjustment method of the oximetry front-end direct-current filtering circuit applicable to the smart band, and the exposure intensity of an oximetry signal can be further improved without worrying about the saturation of the TIA circuit through adding the draw-off current circuit, so that the dynamic range of the TIA circuit is enlarged in another way. Meanwhile, by the adjustable draw-off current capacity of the draw-off current circuit and a feedback mechanism of the processor, the prime draw-off current capability can be adjusted in real time, and the oximetry front-end direct-current filtering circuit can adapt to different environments.

The invention provides a nonlinear mismatch compensation method for 4-TIADCs. According to the method, the processing of a nonlinear mismatch error is expanded to a four-channel system, the possibility of realizing relatively fast precise sampling is provided, and a relatively high demand for the 4-TIADCs is satisfied. According to the method provided by the invention, nonlinear characteristics of each channel are expressed through adoption of Taylor series with appropriate orders; slight oversampling is carried out on an input signal, thereby obtaining mismatch information; real-time estimation is carried out on the nonlinear mismatch error based on a normalized least mean squares (NLMS) algorithm; the NLMS algorithm is simple in structure; compared with a basic LMS algorithm, the NLMS algorithm has the advantage of wider input dynamic range; further nonlinear mismatch parameters of the 4-TIADCs is obtained; and moreover, reconstruction and correction are carried out on the nonlinear mismatch error through utilization of the estimated nonlinear mismatch parameters, thereby obtaining compensation output. An experimental test shows that the method is practicable and fast in convergence rate. The performance of the 4-TIADCs is improved.

The invention discloses an oximetry front-end direct-current filtering circuit applicable to a smart band. The oximetry front-end direct-current filtering circuit applicable to the smart band comprises a signal primary input end, wherein the signal primary input end is sequentially connected with a TIA (Totally Integrated Automation) circuit, a controllable bias reduction circuit, a secondary amplifying circuit, an ADC sampling circuit and a processor; a draw-off current circuit is also connected between the signal primary input end and the TIA circuit, and is connected with the processor; the processor is used for controlling the draw-off current circuit to adjust the current signal strength of the signal initial input end. The invention also discloses an adjustment method of the oximetry front-end direct-current filtering circuit applicable to the smart band, and the exposure intensity of an oximetry signal can be further improved without worrying about the saturation of the TIA circuit through adding the draw-off current circuit, so that the dynamic range of the TIA circuit is enlarged in another way. Meanwhile, by the adjustable draw-off current capacity of the draw-off current circuit and a feedback mechanism of the processor, the prime draw-off current capability can be adjusted in real time, and the oximetry front-end direct-current filtering circuit can adapt to different environments.

A CMOS voltage comparator, comprising: a multistage amplifier, the first output terminal of each stage amplifier is connected to the first input terminal through a switch, the second output terminal is connected to the second input terminal through a switch, and the two switches are connected simultaneously Open or closed; the input terminal of each stage amplifier is connected to the output terminal of the previous stage amplifier, and the switches of all amplifiers are opened or closed at the same time; double-ended input to single-ended output conversion circuit, the input terminal is connected to the output terminal of the last stage amplifier Connected; multi-stage output shaping circuit, the input end is connected to the output end of the double-ended input to single-ended output conversion circuit; the DC blocking capacitor is located before the amplifiers of all levels and the input end of the double-ended input to single-ended output conversion circuit; the first The switch, the input signal is connected to the first-stage amplifier after passing through the first switch and the DC blocking capacitor; the second switch, the input signal is grounded after passing through the second switch, and the second switch is opened or closed simultaneously with all switches of the multi-stage amplifier.

A receiver stage for receiving a receive signal comprises M receiving paths, each receiving path comprises a signal processor and K comparators. The signal processors of the M receiving paths are configured to generate, for each of the M receiving paths, an amplified version of the receive signal, such that an amplification gain of the respective receiving path increases from a first of the M receiving paths to a last of the M receiving paths. For each of the M receiving paths the K comparators of the respective receiving paths are configured to compare the amplified receive signal of the respective receiving path with a respective threshold value. For each of the M receiving paths the threshold value increases from a first of the K comparators to the last of the K comparators.

The invention discloses an integrating capacitor negative charge compensation circuit. The circuit comprises an integrator circuit, a first integrating capacitor switch and a first preset bias circuit. The first integrating capacitor switch is connected with an integrating capacitor in the integrator circuit in series, and the first preset bias circuit is connected to the two ends of the integrating capacitor in parallel. The first integrating capacitor switch is used for isolating the integrating capacitor from an amplifier in the integrator circuit when there are no input charges, and connecting the integrating capacitor with the amplifier in the integrator circuit when there are input charges. The first preset bias circuit is used for applying negative charges to the integrating capacitor when there are no input charges. According to the circuit of the invention, a bias voltage is preset for the integrating capacitor, negative charges are pre-stored on the capacitor, a smaller integrating capacitor under the same input dynamic range or a larger input dynamic range under the integrating capacitor with the same size can be achieved, and an integrator with a larger input dynamic range can be achieved when the layout area of an integrated circuit limits the size of a capacitor.

The invention relates to an air interface analyzing device of a TD-LTE (Time Division-Long Term Evolution) system. The air interface analyzing device of the TD-LTE system comprises an antenna unit, wherein the antenna unit is in wireless RF (Radio Frequency) communication with an RF unit, local oscillator signals of a first local oscillator unit and a second local oscillator unit are output to the RF unit, the output end of the RF unit is connected with the input end of an intermediate frequency unit, the output end of the intermediate frequency unit is connected with the input end of a controller through a transmission unit, and the controller is connected with a display unit which is used for displaying an analyzing result through a signal hierarchical analyzing unit. According to the air interface analyzing device of the TD-LTE system, disclosed by the invention, the power of an input TD-LTE signal can be controlled through the RF unit, and the maximum input signal ability of the TD-LTE signal can be increased; and through the intermediate frequency unit, the input dynamic range of the TD-LTE signal can be increased, the parallel processing can be conducted, the analyzing function of TD-LTE air interface signals of multiple frequency points can be achieved, and the analyzing accuracy of the TD-LTE air interface signals can be increased through the method of separately processing the upstream and the downstream of the TD-LTE signal.

The invention discloses a front-end circuit for a current input ADC (Analog to Digital Converter). An integrator is arranged between the ADC and a current input end, and the integrator is provided with an integrating capacitor. Particularly, the front-end circuit based on the integrator also comprises an overcurrent discharge circuit which comprises a detection module and a discharge module, wherein the detection module at least comprises a voltage comparator, one input end of the detection module is connected to a voltage output end V1 of the integrator, the other input end of the detection module is connected with a threshold voltage V(thr) of the integrator, the discharge module at least comprises a discharge capacitor C(dis), an electrode plate at one side of the discharge capacitor C(dis) is connected to a positive plate X1 of the integrating capacitor, one electrode plate at the other side of the discharge capacitor C(dis) is connected to a reference voltage end, and the discharge voltage V(f) in the circuit meets the following formula: V(f)=deltaV*C(dis) / C(int), wherein deltaV is the voltage drop of the reference voltage end. According to the front-end circuit disclosed by the invention, the input dynamic range of the current which is input in the ADC is obviously increased under the limit of the capacity of the integrator, the pressure occupied by the inner area of a chip due to the capacity expansion of the integrator is avoided, and a useful solution is supplied for simplifying a lastly connected ADC design.

The invention provides a self-adapting burst-mode signal receiving and regenerating amplifier, relating to the technical field of digital communication. The prior art has the defects of low receiving sensitivity and no self-adapting capability. The amplifier of the invention comprises an AC coupling circuit, a high-pass filtering circuit and a positive feedback amplifying circuit. By combining a series of high and low pass filters and a multistage amplifier, the bit-by-bit recovery of burst-mode signals is realized, and the receiving sensitivity is improved. The whole processes of input, amplification, regeneration and output of signals are automatically finished. The invention has perfect self-adapting functions.

The invention discloses a demodulator circuit for a UHF (Ultrahigh Frequency) radio frequency identification label chip. Aiming at the defect of smaller dynamic range brought by the substitution of a traditional grid-grounded MOS (Metal-Oxide Semiconductor) tube for a high-resistance resistor, the invention provides a demodulator circuit which comprises an overvoltage protection circuit and a mean value generating circuit. The demodulator circuit connects the grid of a first PMOS (P-Channel Metal Oxide Semiconductor) tube in the mean value generating circuit with the grid of a first NMOS (N-Channel Metal Oxide Semiconductor) tube in the overvoltage protection circuit, and the grid level of the first PMOS tube automatically varies with the source level thereof by the partial pressure action of a second PMOS tube and a second resistor when the source level of the first PMOS tube rises or falls so that the absolute values of a grid voltage and a source voltage of the first PMOS tube are kept stable, the first PMOS tube has stable equivalent resistance in a large dynamic range, and the demodulator circuit of the invention has greater dynamic input range compared with the traditional demodulator circuit.

The invention relates to an air interface analyzing device of a TD-LTE (Time Division-Long Term Evolution) system. The air interface analyzing device of the TD-LTE system comprises an antenna unit, wherein the antenna unit is in wireless RF (Radio Frequency) communication with an RF unit, local oscillator signals of a first local oscillator unit and a second local oscillator unit are output to the RF unit, the output end of the RF unit is connected with the input end of an intermediate frequency unit, the output end of the intermediate frequency unit is connected with the input end of a controller through a transmission unit, and the controller is connected with a display unit which is used for displaying an analyzing result through a signal hierarchical analyzing unit. According to the air interface analyzing device of the TD-LTE system, disclosed by the invention, the power of an input TD-LTE signal can be controlled through the RF unit, and the maximum input signal ability of the TD-LTE signal can be increased; and through the intermediate frequency unit, the input dynamic range of the TD-LTE signal can be increased, the parallel processing can be conducted, the analyzing function of TD-LTE air interface signals of multiple frequency points can be achieved, and the analyzing accuracy of the TD-LTE air interface signals can be increased through the method of separately processing the upstream and the downstream of the TD-LTE signal.