31results about How to "Manufacturing process is complex" patented technology

A semiconductor integrated circuit device includes: a switching current observer for observing a switching current; a leakage current observer for observing a leakage current; a comparator which compares the switching current and the leakage current with each other; a threshold voltage controller for controlling a substrate bias voltage in order to make a ratio of the switching current and the leakage current constant; a delay observer for observing a delay amount; and a power supply voltage controller for controlling a power supply voltage in order to keep the delay amount in a predetermined range. In the semiconductor integrated circuit device, a process which enables the minimization of an operation power is carried out by controlling the threshold voltage to make the ratio of the switching current and the leakage current constant at a given clock frequency and controlling the power supply voltage to guarantee the operating speed.

The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20, a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 having a first to a third region; removing an insulating film 24, the conductive film 22 and an insulating film 20 formed in the second region and the third region; forming an insulating film 38 in the second region and the third region; removing the insulating film 24 in the first region and the insulating film 38 in the third region; forming an insulating film 44 in the third region; after a conductive film 52 has been formed, patterning the conductive films 22, 52 in the first region to form a gate electrode 58; and patterning the conductive film 52 to form gate electrodes 62 in the second region and the third region while removing the conductive film 52 over the gate electrode 58.

A facial expression control device is provided. The facial expression control device of the present invention provides multiple structures and links, wherein the links are connected to the linking assembly; therefore varies facial expressions are expressed according to the combination of the structures and links. In this way, the facial expression is changed by means of the least actuators under the condition of maintaining the number of facial expression and imitation.

A carrying structure of electronic components is proposed. The carrying structure includes at least one supporting board with at least one cavity disposed thereon, at least one adhesive layer formed on the supporting board, and at least one electronic component having an active face and a non-active face located in the cavity. The gap between the cavity and the electronic component is filled with a portion of the adhesive layer, and thus the electronic component is fixed in the cavity of the supporting board.

This invention provides an array substrate, a method for fabricating the same, and an OLED display device. Each pixel unit of the array substrate comprises: a TFT drive layer; an OLED further away from the substrate than the TFT drive layer and driven by it, the OLED sequentially comprises a first electrode, a light emitting layer, a second electrode, wherein the first electrode is transparent, and the second electrode is a transflective layer, or the second electrode is transparent and has a transflective layer disposed thereon; a reflection layer disposed between the TFT drive layer and the OLED and forming a microcavity structure with the transflective layer, and a reflective surface of the reflection layer has a concave-convex or corrugated structure disposed thereon for causing diffuse reflection of light; and a color filter film disposed between the reflection layer and the OLED and located in the microcavity structure.

Disclosed is a touch window including a substrate, and an electrode part provided on the substrate to detect a position. The electrode part includes a base including an electrode.

An integrated optical transducer for detecting dynamic pressure changes comprises a micro-electro-mechanical system, MEMS, die having a MEMS diaphragm with a first side exposed to the dynamic pressure changes and a second side. The transducer further comprises an application specific integrated circuit, ASIC, die having an evaluation circuit configured to detect a deflection of the MEMS diaphragm, in particular of the second side of the MEMS diaphragm. The MEMS die is arranged with respect to the ASIC die such that a gap with a gap height is formed between the second side of the diaphragm and a first surface of the ASIC die and the MEMS diaphragm, the ASIC die and a suspension structure of the MEMS die delineate a back volume of the integrated optical transducer.

The disclosed subject matter provides a Fin-FET with a thinned-down InP layer and thinning-down method thereof. In a Fin-FET, the fin structure is made of InGaAs and an InP layer is formed to cover the fin structure. The InP layer is obtained from an initial InP layer formed on the fin structure through a thinning down process including converting a surface portion of the InP layer into a Phosphorus-rich layer and removing the Phosphorus-rich layer. The thickness of the ultimately-formed InP layer is less than or equal to 1 nm. According to the disclosed method, the InP layer in the Fin-FET may be easily thinned down, and during the thinning-down process, contamination may be avoided.

A non-volatile memory device includes first wiring structures elongated in a first direction and separated by a first gap region in a second direction, the first gap region comprising first dielectric material formed in a first process, second wiring structures elongated in a second direction and separated by a second gap region in a first direction, the second gap region comprising second dielectric material formed in a second process, and a resistive switching devices comprising active conductive material, resistive switching material, and a junction material, wherein resistive switching devices are formed at intersections of the first wiring structures and the second wiring structures, wherein the junction material comprising p+ polysilicon material overlying the first wiring material, wherein some resistive switching devices are separated by the first gap region and some resistive switching devices separated by the second gap region.

A motor includes a base plate, a stator, a rotor, a circuit board and a Hall element. The stator is disposed on the base plate. The rotor is disposed around the stator, and includes a rotating shaft and a magnetic assembly. The rotating shaft is extended to a center part of the stator. The magnetic assembly includes plural magnets. The circuit board is arranged between the stator and the base plate and comprises a Hall element. A first gap and a second gap are arranged between every two adjacent magnets. The first gap is in the vicinity of the Hall element, and opposed to the second gap. The distance of a vacant portion of the first gap is shorter than the distance of the second gap, thereby facilitating continuous and steady magnetic induction between the Hall element and the magnetic assembly.

A NAND flash memory includes a plurality of NAND flash memory structures separated by an insulating layer. In one embodiment of the present disclosure, the NAND flash memory structure includes a first bitline extending along a first direction, a first charge-trapping region positioned over the first bitline, a wordline positioned over the first charge-trapping region and extending along a second direction, a second charge-trapping region positioned over the wordline, and a second bitline positioned over the second charge-trapping region, wherein the first charge-trapping region and the second charge-trapping region are stacked along a third direction substantially perpendicular to the first direction and the second direction.